1 /* $NetBSD: e500_timer.c,v 1.2 2011/01/18 01:02:52 matt Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: e500_timer.c,v 1.2 2011/01/18 01:02:52 matt Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/kernel.h> 42 #include <sys/systm.h> 43 #include <sys/timetc.h> 44 #include <sys/intr.h> 45 #include <sys/cpu.h> 46 47 #include <uvm/uvm_extern.h> 48 49 #include <powerpc/spr.h> 50 #include <powerpc/booke/spr.h> 51 #include <powerpc/booke/cpuvar.h> 52 #include <powerpc/booke/e500reg.h> 53 #include <powerpc/booke/e500var.h> 54 #include <powerpc/booke/openpicreg.h> 55 56 /* 57 * Initially we assume a processor with a bus frequency of 12.5 MHz. 58 */ 59 static u_long ns_per_tick; 60 61 static void init_ppcbooke_tc(void); 62 static u_int get_ppcbooke_timecount(struct timecounter *); 63 64 static struct timecounter ppcbooke_timecounter = { 65 get_ppcbooke_timecount, /* get_timecount */ 66 0, /* no poll_pps */ 67 ~0u, /* counter_mask */ 68 0, /* frequency */ 69 "ppc_timebase", /* name */ 70 100, /* quality */ 71 NULL, /* tc_priv */ 72 NULL /* tc_next */ 73 }; 74 75 static inline uint32_t 76 openpic_read(struct cpu_softc *cpu, bus_size_t offset) 77 { 78 79 return bus_space_read_4(cpu->cpu_bst, cpu->cpu_bsh, 80 OPENPIC_BASE + offset); 81 } 82 83 static inline void 84 openpic_write(struct cpu_softc *cpu, bus_size_t offset, uint32_t val) 85 { 86 87 return bus_space_write_4(cpu->cpu_bst, cpu->cpu_bsh, 88 OPENPIC_BASE + offset, val); 89 } 90 91 int 92 e500_clock_intr(void *v) 93 { 94 struct trapframe * const tf = v; 95 struct cpu_info * const ci = curcpu(); 96 struct cpu_softc * const cpu = ci->ci_softc; 97 u_int nticks; 98 99 /* 100 * Check whether we are initialized. 101 */ 102 if (!cpu->cpu_ticks_per_clock_intr) 103 return 0; 104 105 /* 106 * Now let's how delayed the clock interrupt was. Obviously it must 107 * at least one clock tick since the clock interrupt. But it might 108 * be more if interrupts were blocked for a long time. We keep 109 * suubtracting an interrupts We should be 110 * [well] within a single tick. 111 * We add back one tick (which should put us back above 0). If we 112 * are still below 0, keep adding ticks until we are above 0. 113 */ 114 const uint64_t now = mftb(); 115 uint64_t latency = now - (ci->ci_lastintr + cpu->cpu_ticks_per_clock_intr); 116 #if 0 117 uint64_t orig_latency = latency; 118 #endif 119 if (now < ci->ci_lastintr + cpu->cpu_ticks_per_clock_intr) 120 latency = 0; 121 122 nticks = 1 + latency / cpu->cpu_ticks_per_clock_intr; 123 latency %= cpu->cpu_ticks_per_clock_intr; 124 #if 0 125 for (nticks = 1; latency >= cpu->cpu_ticks_per_clock_intr; nticks++) { 126 latency -= cpu->cpu_ticks_per_clock_intr; 127 } 128 #endif 129 130 ci->ci_ev_clock.ev_count++; 131 cpu->cpu_ev_late_clock.ev_count += nticks - 1; 132 133 /* 134 * lasttb is used during microtime. Set it to the virtual 135 * start of this tick interval. 136 */ 137 #if 0 138 if (nticks > 10 || now - ci->ci_lastintr < 7 * cpu->cpu_ticks_per_clock_intr / 8) 139 printf("%s: nticks=%u lastintr=%#"PRIx64"(%#"PRIx64") now=%#"PRIx64" latency=%#"PRIx64" orig=%#"PRIx64"\n", __func__, 140 nticks, ci->ci_lastintr, now - latency, now, latency, orig_latency); 141 #endif 142 ci->ci_lastintr = now - latency; 143 ci->ci_lasttb = now; 144 145 wrtee(PSL_EE); /* Reenable interrupts */ 146 147 /* 148 * Do standard timer interrupt stuff. 149 */ 150 while (nticks-- > 0) { 151 hardclock(&tf->tf_cf); 152 } 153 154 wrtee(0); /* turn off interrupts */ 155 156 return 1; 157 } 158 159 void 160 cpu_initclocks(void) 161 { 162 struct cpu_info * const ci = curcpu(); 163 struct cpu_softc * const cpu = ci->ci_softc; 164 165 cpu->cpu_ticks_per_clock_intr = (ci->ci_data.cpu_cc_freq + hz/2 - 1) / hz; 166 167 /* interrupt established in e500_intr_cpu_init */ 168 169 ci->ci_lastintr = ci->ci_lasttb = mftb(); 170 openpic_write(cpu, cpu->cpu_clock_gtbcr, 171 GTBCR_CI | cpu->cpu_ticks_per_clock_intr); 172 openpic_write(cpu, cpu->cpu_clock_gtbcr, 173 cpu->cpu_ticks_per_clock_intr); 174 175 init_ppcbooke_tc(); 176 } 177 178 void 179 calc_delayconst(void) 180 { 181 struct cpu_info * const ci = curcpu(); 182 183 ci->ci_data.cpu_cc_freq = board_info_get_number("timebase-frequency"); 184 ns_per_tick = 1000000000 / (u_int)ci->ci_data.cpu_cc_freq; 185 } 186 187 static u_int 188 get_ppcbooke_timecount(struct timecounter *tc) 189 { 190 return mftbl(); 191 } 192 193 /* 194 * Wait for about n microseconds (at least!). 195 */ 196 void 197 delay(unsigned int n) 198 { 199 uint64_t tb; 200 u_long tbh, tbl, scratch; 201 202 tb = mftb(); 203 /* use 1000ULL to force 64 bit math to avoid 32 bit overflows */ 204 tb += (n * 1000ULL + ns_per_tick - 1) / ns_per_tick; 205 tbh = tb >> 32; 206 tbl = tb; 207 __asm volatile ( 208 "1: mfspr %0,%4" "\n" 209 " cmplw %0,%1" "\n" 210 " blt 1b" "\n" 211 " bgt 2f" "\n" 212 " mfspr %0,%3" "\n" 213 " cmplw %0,%2" "\n" 214 " blt 1b" "\n" 215 "2:" "\n" 216 : "=&r"(scratch) 217 : "r"(tbh), "r"(tbl), "n"(SPR_TBL), "n"(SPR_TBU) 218 : "cr0"); 219 } 220 221 /* 222 * Nothing to do. 223 */ 224 void 225 setstatclockrate(int arg) 226 { 227 228 /* Do nothing */ 229 } 230 231 static void 232 init_ppcbooke_tc(void) 233 { 234 /* from machdep initialization */ 235 ppcbooke_timecounter.tc_frequency = curcpu()->ci_data.cpu_cc_freq; 236 tc_init(&ppcbooke_timecounter); 237 } 238