xref: /netbsd/sys/arch/powerpc/fpu/fpu_compare.c (revision bf9ec67e)
1 /*	$NetBSD: fpu_compare.c,v 1.1 2001/06/13 06:01:47 simonb Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)fpu_compare.c	8.1 (Berkeley) 6/11/93
45  */
46 
47 /*
48  * FCMPU and FCMPO instructions.
49  *
50  * These rely on the fact that our internal wide format is achieved by
51  * adding zero bits to the end of narrower mantissas.
52  */
53 
54 #include <sys/types.h>
55 
56 #include <machine/reg.h>
57 #include <machine/fpu.h>
58 
59 #include <powerpc/fpu/fpu_arith.h>
60 #include <powerpc/fpu/fpu_emu.h>
61 
62 /*
63  * Perform a compare instruction (with or without unordered exception).
64  * This updates the fcc field in the fsr.
65  *
66  * If either operand is NaN, the result is unordered.  For ordered, this
67  * causes an NV exception.  Everything else is ordered:
68  *	|Inf| > |numbers| > |0|.
69  * We already arranged for fp_class(Inf) > fp_class(numbers) > fp_class(0),
70  * so we get this directly.  Note, however, that two zeros compare equal
71  * regardless of sign, while everything else depends on sign.
72  *
73  * Incidentally, two Infs of the same sign compare equal (per the 80387
74  * manual---it would be nice if the SPARC documentation were more
75  * complete).
76  */
77 void
78 fpu_compare(struct fpemu *fe, int ordered)
79 {
80 	struct fpn *a, *b, *r;
81 	int cc;
82 
83 	a = &fe->fe_f1;
84 	b = &fe->fe_f2;
85 	r = &fe->fe_f3;
86 
87 	if (ISNAN(a) || ISNAN(b)) {
88 		/*
89 		 * In any case, we already got an exception for signalling
90 		 * NaNs; here we may replace that one with an identical
91 		 * exception, but so what?.
92 		 */
93 		cc = FPSCR_FU;
94 		if (ISSNAN(a) || ISSNAN(b))
95 			cc |= FPSCR_VXSNAN;
96 		if (ordered) {
97 			if (fe->fe_fpscr & FPSCR_VE || ISQNAN(a) || ISQNAN(b))
98 				cc |= FPSCR_VXVC;
99 		}
100 		goto done;
101 	}
102 
103 	/*
104 	 * Must handle both-zero early to avoid sign goofs.  Otherwise,
105 	 * at most one is 0, and if the signs differ we are done.
106 	 */
107 	if (ISZERO(a) && ISZERO(b)) {
108 		cc = FPSCR_FE;
109 		goto done;
110 	}
111 	if (a->fp_sign) {		/* a < 0 (or -0) */
112 		if (!b->fp_sign) {	/* b >= 0 (or if a = -0, b > 0) */
113 			cc = FPSCR_FL;
114 			goto done;
115 		}
116 	} else {			/* a > 0 (or +0) */
117 		if (b->fp_sign) {	/* b <= -0 (or if a = +0, b < 0) */
118 			cc = FPSCR_FG;
119 			goto done;
120 		}
121 	}
122 
123 	/*
124 	 * Now the signs are the same (but may both be negative).  All
125 	 * we have left are these cases:
126 	 *
127 	 *	|a| < |b|		[classes or values differ]
128 	 *	|a| > |b|		[classes or values differ]
129 	 *	|a| == |b|		[classes and values identical]
130 	 *
131 	 * We define `diff' here to expand these as:
132 	 *
133 	 *	|a| < |b|, a,b >= 0: a < b => FSR_CC_LT
134 	 *	|a| < |b|, a,b < 0:  a > b => FSR_CC_GT
135 	 *	|a| > |b|, a,b >= 0: a > b => FSR_CC_GT
136 	 *	|a| > |b|, a,b < 0:  a < b => FSR_CC_LT
137 	 */
138 #define opposite_cc(cc) ((cc) == FPSCR_FL ? FPSCR_FG : FPSCR_FL)
139 #define	diff(magnitude) (a->fp_sign ? opposite_cc(magnitude) :  (magnitude))
140 	if (a->fp_class < b->fp_class) {	/* |a| < |b| */
141 		cc = diff(FPSCR_FL);
142 		goto done;
143 	}
144 	if (a->fp_class > b->fp_class) {	/* |a| > |b| */
145 		cc = diff(FPSCR_FG);
146 		goto done;
147 	}
148 	/* now none can be 0: only Inf and numbers remain */
149 	if (ISINF(a)) {				/* |Inf| = |Inf| */
150 		cc = FPSCR_FE;
151 		goto done;
152 	}
153 	fpu_sub(fe);
154 	if (ISZERO(r))
155 		cc = FPSCR_FE;
156 	else if (r->fp_sign)
157 		cc = FPSCR_FL;
158 	else
159 		cc = FPSCR_FG;
160 done:
161 	fe->fe_cx = cc;
162 }
163