1 /* $NetBSD: fpu_mul.c,v 1.1 2001/06/13 06:01:47 simonb Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * @(#)fpu_mul.c 8.1 (Berkeley) 6/11/93 45 */ 46 47 /* 48 * Perform an FPU multiply (return x * y). 49 */ 50 51 #include <sys/types.h> 52 #if defined(DIAGNOSTIC)||defined(DEBUG) 53 #include <sys/systm.h> 54 #endif 55 56 #include <machine/reg.h> 57 #include <machine/fpu.h> 58 59 #include <powerpc/fpu/fpu_arith.h> 60 #include <powerpc/fpu/fpu_emu.h> 61 62 /* 63 * The multiplication algorithm for normal numbers is as follows: 64 * 65 * The fraction of the product is built in the usual stepwise fashion. 66 * Each step consists of shifting the accumulator right one bit 67 * (maintaining any guard bits) and, if the next bit in y is set, 68 * adding the multiplicand (x) to the accumulator. Then, in any case, 69 * we advance one bit leftward in y. Algorithmically: 70 * 71 * A = 0; 72 * for (bit = 0; bit < FP_NMANT; bit++) { 73 * sticky |= A & 1, A >>= 1; 74 * if (Y & (1 << bit)) 75 * A += X; 76 * } 77 * 78 * (X and Y here represent the mantissas of x and y respectively.) 79 * The resultant accumulator (A) is the product's mantissa. It may 80 * be as large as 11.11111... in binary and hence may need to be 81 * shifted right, but at most one bit. 82 * 83 * Since we do not have efficient multiword arithmetic, we code the 84 * accumulator as four separate words, just like any other mantissa. 85 * We use local variables in the hope that this is faster than memory. 86 * We keep x->fp_mant in locals for the same reason. 87 * 88 * In the algorithm above, the bits in y are inspected one at a time. 89 * We will pick them up 32 at a time and then deal with those 32, one 90 * at a time. Note, however, that we know several things about y: 91 * 92 * - the guard and round bits at the bottom are sure to be zero; 93 * 94 * - often many low bits are zero (y is often from a single or double 95 * precision source); 96 * 97 * - bit FP_NMANT-1 is set, and FP_1*2 fits in a word. 98 * 99 * We can also test for 32-zero-bits swiftly. In this case, the center 100 * part of the loop---setting sticky, shifting A, and not adding---will 101 * run 32 times without adding X to A. We can do a 32-bit shift faster 102 * by simply moving words. Since zeros are common, we optimize this case. 103 * Furthermore, since A is initially zero, we can omit the shift as well 104 * until we reach a nonzero word. 105 */ 106 struct fpn * 107 fpu_mul(struct fpemu *fe) 108 { 109 struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2; 110 u_int a3, a2, a1, a0, x3, x2, x1, x0, bit, m; 111 int sticky; 112 FPU_DECL_CARRY; 113 114 /* 115 * Put the `heavier' operand on the right (see fpu_emu.h). 116 * Then we will have one of the following cases, taken in the 117 * following order: 118 * 119 * - y = NaN. Implied: if only one is a signalling NaN, y is. 120 * The result is y. 121 * - y = Inf. Implied: x != NaN (is 0, number, or Inf: the NaN 122 * case was taken care of earlier). 123 * If x = 0, the result is NaN. Otherwise the result 124 * is y, with its sign reversed if x is negative. 125 * - x = 0. Implied: y is 0 or number. 126 * The result is 0 (with XORed sign as usual). 127 * - other. Implied: both x and y are numbers. 128 * The result is x * y (XOR sign, multiply bits, add exponents). 129 */ 130 DPRINTF(FPE_REG, ("fpu_mul:\n")); 131 DUMPFPN(FPE_REG, x); 132 DUMPFPN(FPE_REG, y); 133 DPRINTF(FPE_REG, ("=>\n")); 134 135 ORDER(x, y); 136 if (ISNAN(y)) { 137 y->fp_sign ^= x->fp_sign; 138 fe->fe_cx |= FPSCR_VXSNAN; 139 DUMPFPN(FPE_REG, y); 140 return (y); 141 } 142 if (ISINF(y)) { 143 if (ISZERO(x)) { 144 fe->fe_cx |= FPSCR_VXIMZ; 145 return (fpu_newnan(fe)); 146 } 147 y->fp_sign ^= x->fp_sign; 148 DUMPFPN(FPE_REG, y); 149 return (y); 150 } 151 if (ISZERO(x)) { 152 x->fp_sign ^= y->fp_sign; 153 DUMPFPN(FPE_REG, x); 154 return (x); 155 } 156 157 /* 158 * Setup. In the code below, the mask `m' will hold the current 159 * mantissa byte from y. The variable `bit' denotes the bit 160 * within m. We also define some macros to deal with everything. 161 */ 162 x3 = x->fp_mant[3]; 163 x2 = x->fp_mant[2]; 164 x1 = x->fp_mant[1]; 165 x0 = x->fp_mant[0]; 166 sticky = a3 = a2 = a1 = a0 = 0; 167 168 #define ADD /* A += X */ \ 169 FPU_ADDS(a3, a3, x3); \ 170 FPU_ADDCS(a2, a2, x2); \ 171 FPU_ADDCS(a1, a1, x1); \ 172 FPU_ADDC(a0, a0, x0) 173 174 #define SHR1 /* A >>= 1, with sticky */ \ 175 sticky |= a3 & 1, a3 = (a3 >> 1) | (a2 << 31), \ 176 a2 = (a2 >> 1) | (a1 << 31), a1 = (a1 >> 1) | (a0 << 31), a0 >>= 1 177 178 #define SHR32 /* A >>= 32, with sticky */ \ 179 sticky |= a3, a3 = a2, a2 = a1, a1 = a0, a0 = 0 180 181 #define STEP /* each 1-bit step of the multiplication */ \ 182 SHR1; if (bit & m) { ADD; }; bit <<= 1 183 184 /* 185 * We are ready to begin. The multiply loop runs once for each 186 * of the four 32-bit words. Some words, however, are special. 187 * As noted above, the low order bits of Y are often zero. Even 188 * if not, the first loop can certainly skip the guard bits. 189 * The last word of y has its highest 1-bit in position FP_NMANT-1, 190 * so we stop the loop when we move past that bit. 191 */ 192 if ((m = y->fp_mant[3]) == 0) { 193 /* SHR32; */ /* unneeded since A==0 */ 194 } else { 195 bit = 1 << FP_NG; 196 do { 197 STEP; 198 } while (bit != 0); 199 } 200 if ((m = y->fp_mant[2]) == 0) { 201 SHR32; 202 } else { 203 bit = 1; 204 do { 205 STEP; 206 } while (bit != 0); 207 } 208 if ((m = y->fp_mant[1]) == 0) { 209 SHR32; 210 } else { 211 bit = 1; 212 do { 213 STEP; 214 } while (bit != 0); 215 } 216 m = y->fp_mant[0]; /* definitely != 0 */ 217 bit = 1; 218 do { 219 STEP; 220 } while (bit <= m); 221 222 /* 223 * Done with mantissa calculation. Get exponent and handle 224 * 11.111...1 case, then put result in place. We reuse x since 225 * it already has the right class (FP_NUM). 226 */ 227 m = x->fp_exp + y->fp_exp; 228 if (a0 >= FP_2) { 229 SHR1; 230 m++; 231 } 232 x->fp_sign ^= y->fp_sign; 233 x->fp_exp = m; 234 x->fp_sticky = sticky; 235 x->fp_mant[3] = a3; 236 x->fp_mant[2] = a2; 237 x->fp_mant[1] = a1; 238 x->fp_mant[0] = a0; 239 240 DUMPFPN(FPE_REG, x); 241 return (x); 242 } 243