xref: /netbsd/sys/arch/powerpc/ibm4xx/dev/if_emacreg.h (revision bf9ec67e)
1 /*	$NetBSD: if_emacreg.h,v 1.1 2001/06/24 02:13:37 simonb Exp $	*/
2 
3 /*
4  * Copyright 2001 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Simon Burge and Eduardo Horvath for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * MAL buffer descriptor control/status bit definitions, in the
40  * md_stat_ctrl field of the MAL descriptor <machine/mal.h>.
41  */
42 
43 /* EMAC transmit control definitions */
44 #define	EMAC_TXC_GFCS		0x0200	/* Generate FCS */
45 #define	EMAC_TXC_GPAD		0x0100	/* Generate padding */
46 #define	EMAC_TXC_ISA		0x0080	/* Insert Source Address */
47 #define	EMAC_TXC_RSA		0x0040	/* Replace Source Address */
48 #define	EMAC_TXC_IVT		0x0020	/* Insert VLAN Tag */
49 #define	EMAC_TXC_RVT		0x0010	/* Replace VLAN Tag */
50 
51 /* EMAC transmit status definitions */
52 #define EMAC_TXS_BFCS		0x0200	/* Bad FCS */
53 #define EMAC_TXS_BPP		0x0100	/* Bad previous packet */
54 #define EMAC_TXS_LCS		0x0080	/* Loss of carrier sense */
55 #define EMAC_TXS_ED		0x0040	/* Excessive deferral */
56 #define EMAC_TXS_EC		0x0020	/* Excessive collisions */
57 #define EMAC_TXS_LC		0x0010	/* Late collision */
58 #define EMAC_TXS_MC		0x0008	/* Multiple collision */
59 #define EMAC_TXS_SC		0x0004	/* Single collision */
60 #define EMAC_TXS_UR		0x0002	/* Underrun */
61 #define EMAC_TXS_SQE		0x0001	/* Signal Quality Error */
62 
63 /* EMAC receive status definitions */
64 #define EMAC_RXS_OE		0x0200	/* Overrun error */
65 #define EMAC_RXS_PP		0x0100	/* Pause packet received */
66 #define EMAC_RXS_BP		0x0080	/* Bad packet */
67 #define EMAC_RXS_RP		0x0040	/* Runt packet */
68 #define EMAC_RXS_SE		0x0020	/* Short event */
69 #define EMAC_RXS_AE		0x0010	/* Alignment error */
70 #define EMAC_RXS_BFCS		0x0008	/* Bad FCS */
71 #define EMAC_RXS_PTL		0x0004	/* Packet too long */
72 #define EMAC_RXS_ORE		0x0002	/* Out of range error */
73 #define EMAC_RXS_IRE		0x0001	/* In range error */
74