1 /* $NetBSD: zmiireg.h,v 1.1 2010/03/20 15:22:27 kiyohara Exp $ */ 2 /* 3 * Copyright (c) 2010 KIYOHARA Takashi 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #ifndef _IBM4XX_ZMIIREG_H_ 29 #define _IBM4XX_ZMIIREG_H_ 30 31 /* ZMII Bridge (440EP/440GP/440GX) */ 32 33 #define ZMII0_SIZE 0x10 34 35 #define ZMII0_FER 0x0 /* Function Enable Register */ 36 #define FER_MDI_MASK 0x88880000 /* MDI enable */ 37 #define FER_MDI(emac) (1 << (31 - ((emac) << 2))) 38 #define FER__MII_MASK 0x7 39 #define FER__MII_MII 0x1 /* MII Enable */ 40 #define FER__MII_RMII 0x2 /* ZMII (or RMII) Enable */ 41 #define FER__MII_SMII 0x4 /* SMII Enable */ 42 #define FER__MII(emac, mii) ((mii) << (28 - ((emac) << 2))) 43 #define ZMII0_SSR 0x4 /* Speed Selection Register */ 44 #define SSR_SCI(emac) (0x4 << (28 - ((emac) << 2))) /* Suppress Collision Indication */ 45 #define SSR_FSS(emac) (0x2 << (28 - ((emac) << 2))) /* Force Speed Selection */ 46 #define SSR_SP_10MBPS 0x0 47 #define SSR_SP_100MBPS 0x2 48 #define SSR_ZSP(emac, sp) ((sp) << (27 - ((emac) << 2))) /* Speed Selection */ 49 #define ZMII0_SMIISR 0x8 /* SMII Status Register */ 50 #define SMIISR_SHIFT(emac) (24 - ((emac) << 3)) 51 #define SMIISR_MASK 0xff 52 #define SMIISR_E1 0x01 /* RxD Set to 1 */ 53 #define SMIISR_EC 0x02 /* RxD False Carrier Detected */ 54 #define SMIISR_EN_INVALID 0x00 /* RxD Nibble Invalid */ 55 #define SMIISR_EN_VALID 0x04 /* RxD Nibble Valid */ 56 #define SMIISR_EJ_OK 0x00 /* RxD Jabber OK */ 57 #define SMIISR_EJ_ERROR 0x08 /* RxD Jabber Error */ 58 #define SMIISR_EL_DOWN 0x00 /* RxD Link Down */ 59 #define SMIISR_EL_UP 0x10 /* RxD Link Up */ 60 #define SMIISR_ED_HALF 0x00 /* RxD Duplex Half */ 61 #define SMIISR_ED_FULL 0x20 /* RxD Duplex Full */ 62 #define SMIISR_ES_10 0x00 /* RxD Speed 10MBit */ 63 #define SMIISR_ES_100 0x40 /* RxD Speed 100MBit */ 64 #define SMIISR_EF 0x80 /* RxD from Previous Frame */ 65 66 #endif /* _IBM4XX_ZMIIREG_H_ */ 67