1 /* $NetBSD: cpu.h,v 1.15 2002/03/26 21:20:24 matt Exp $ */ 2 3 /* 4 * Copyright (C) 1999 Wolfgang Solfrank. 5 * Copyright (C) 1999 TooLs GmbH. 6 * Copyright (C) 1995-1997 Wolfgang Solfrank. 7 * Copyright (C) 1995-1997 TooLs GmbH. 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by TooLs GmbH. 21 * 4. The name of TooLs GmbH may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 28 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 29 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 30 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 32 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 33 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 #ifndef _POWERPC_CPU_H_ 36 #define _POWERPC_CPU_H_ 37 38 #if defined(_KERNEL_OPT) 39 #include "opt_lockdebug.h" 40 #include "opt_multiprocessor.h" 41 #endif 42 43 #include <sys/device.h> 44 #include <machine/frame.h> 45 #include <machine/psl.h> 46 #include <machine/intr.h> 47 48 49 struct cache_info { 50 int dcache_size; 51 int dcache_line_size; 52 int icache_size; 53 int icache_line_size; 54 }; 55 56 57 #ifdef _KERNEL 58 #include <sys/sched.h> 59 #include <dev/sysmon/sysmonvar.h> 60 61 struct cpu_info { 62 struct schedstate_percpu ci_schedstate; /* scheduler state */ 63 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG) 64 u_long ci_spin_locks; /* # of spin locks held */ 65 u_long ci_simple_locks; /* # of simple locks held */ 66 #endif 67 struct device *ci_dev; /* device of corresponding cpu */ 68 struct proc *ci_curproc; /* current owner of the processor */ 69 70 struct pcb *ci_curpcb; 71 struct pmap *ci_curpm; 72 struct proc *ci_fpuproc; 73 struct pcb *ci_idle_pcb; /* PA of our idle pcb */ 74 int ci_cpuid; 75 76 int ci_astpending; 77 int ci_want_resched; 78 u_long ci_lasttb; 79 int ci_tickspending; 80 int ci_cpl; 81 int ci_ipending; 82 int ci_intrdepth; 83 char *ci_intstk; 84 char *ci_spillstk; 85 int ci_tempsave[8]; 86 int ci_ddbsave[8]; 87 int ci_ipkdbsave[8]; 88 int ci_disisave[4]; 89 struct cache_info ci_ci; 90 struct sysmon_envsys ci_sysmon; 91 struct envsys_tre_data ci_tau_info; 92 struct evcnt ci_ev_traps; /* calls to trap() */ 93 struct evcnt ci_ev_kdsi; /* kernel DSI traps */ 94 struct evcnt ci_ev_udsi; /* user DSI traps */ 95 struct evcnt ci_ev_udsi_fatal; /* user DSI trap failures */ 96 struct evcnt ci_ev_isi; /* user ISI traps */ 97 struct evcnt ci_ev_isi_fatal; /* user ISI trap failures */ 98 struct evcnt ci_ev_pgm; /* user PGM traps */ 99 struct evcnt ci_ev_fpu; /* FPU traps */ 100 struct evcnt ci_ev_fpusw; /* FPU context switch */ 101 struct evcnt ci_ev_ali; /* Alignment traps */ 102 struct evcnt ci_ev_ali_fatal; /* Alignment fatal trap */ 103 struct evcnt ci_ev_scalls; /* system call traps */ 104 struct evcnt ci_ev_vec; /* Altivec traps */ 105 struct evcnt ci_ev_vecsw; /* Altivec context switches */ 106 }; 107 108 #ifdef MULTIPROCESSOR 109 static __inline int 110 cpu_number(void) 111 { 112 int pir; 113 114 asm ("mfspr %0,1023" : "=r"(pir)); 115 return pir; 116 } 117 118 static __inline struct cpu_info * 119 curcpu(void) 120 { 121 struct cpu_info *ci; 122 123 asm volatile ("mfsprg %0,0" : "=r"(ci)); 124 return ci; 125 } 126 127 void cpu_boot_secondary_processors(void); 128 129 extern struct cpu_info cpu_info[]; 130 131 #define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0) 132 #define curproc curcpu()->ci_curproc 133 #define fpuproc curcpu()->ci_fpuproc 134 #define curpcb curcpu()->ci_curpcb 135 #define curpm curcpu()->ci_curpm 136 #define want_resched curcpu()->ci_want_resched 137 #define astpending curcpu()->ci_astpending 138 #define intr_depth curcpu()->ci_intrdepth 139 140 #else 141 extern struct cpu_info cpu_info_store; 142 extern volatile int want_resched; 143 extern volatile int astpending; 144 extern volatile int intr_depth; 145 146 #define curcpu() (&cpu_info_store) 147 #define cpu_number() 0 148 149 #endif /* MULTIPROCESSOR */ 150 151 #define CLKF_USERMODE(frame) (((frame)->srr1 & PSL_PR) != 0) 152 #define CLKF_BASEPRI(frame) ((frame)->pri == 0) 153 #define CLKF_PC(frame) ((frame)->srr0) 154 #define CLKF_INTR(frame) ((frame)->depth > 0) 155 156 #define PROC_PC(p) (trapframe(p)->srr0) 157 158 #define cpu_swapout(p) 159 #define cpu_wait(p) 160 161 extern int powersave; 162 extern int cpu_timebase; 163 extern int cpu_printfataltraps; 164 165 extern struct cpu_info *cpu_attach_common(struct device *, int); 166 extern void cpu_identify(char *, size_t); 167 extern void delay (unsigned int); 168 extern void cpu_probe_cache(void); 169 extern void dcache_flush_page(vaddr_t); 170 extern void icache_flush_page(vaddr_t); 171 extern void dcache_flush(vaddr_t, vsize_t); 172 extern void icache_flush(vaddr_t, vsize_t); 173 #define DELAY(n) delay(n) 174 175 #define need_resched(ci) (want_resched = 1, astpending = 1) 176 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, astpending = 1) 177 #define signotify(p) (astpending = 1) 178 179 #endif /* _KERNEL */ 180 181 #if defined(_KERNEL) || defined(_STANDALONE) 182 #if !defined(CACHELINESIZE) 183 #define CACHELINESIZE 32 184 #endif 185 #endif 186 187 void __syncicache(void *, size_t); 188 189 190 /* 191 * CTL_MACHDEP definitions. 192 */ 193 #define CPU_CACHELINE 1 194 #define CPU_TIMEBASE 2 195 #define CPU_CPUTEMP 3 196 #define CPU_PRINTFATALTRAPS 4 197 #define CPU_CACHEINFO 5 198 #define CPU_MAXID 6 199 200 #define CTL_MACHDEP_NAMES { \ 201 { 0, 0 }, \ 202 { "cachelinesize", CTLTYPE_INT }, \ 203 { "timebase", CTLTYPE_INT }, \ 204 { "cputempature", CTLTYPE_INT }, \ 205 { "printfataltraps", CTLTYPE_INT }, \ 206 { "cacheinfo", CTLTYPE_STRUCT }, \ 207 } 208 209 #endif /* _POWERPC_CPU_H_ */ 210