xref: /netbsd/sys/arch/powerpc/include/instr.h (revision bf9ec67e)
1 /*	$NetBSD: instr.h,v 1.1 2001/06/13 06:01:48 simonb Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)instr.h	8.1 (Berkeley) 6/11/93
45  */
46 
47 /*
48  * An instruction.
49  */
50 union instr {
51 	int	i_int;			/* as a whole */
52 
53 
54 	/*
55 	 * Any instruction type.
56 	 */
57 	struct {
58 		u_int	i_opcd:6;	/* first-level decode */
59 		u_int	:25;
60 		u_int	i_rc:1;
61 	} i_any;
62 
63 	/*
64 	 * Format A
65 	 */
66 	struct {
67 		u_int	i_opcd:6;
68 		u_int	i_frt:5;
69 		u_int	i_fra:5;
70 		u_int	i_frb:5;
71 		u_int	i_frc:5;
72 		u_int	i_xo:5;
73 		u_int	i_rc:1;
74 	} i_a;
75 
76 	/*
77 	 * Format B
78 	 */
79 	struct {
80 		u_int	i_opcd:6;
81 		int	i_bo:5;
82 		int	i_bi:5;
83 		int	i_bd:14;
84 		int	i_aa:1;
85 		int	i_lk:1;
86 	} i_b;
87 
88 	/*
89 	 * Format D
90 	 */
91 	struct {
92 		u_int	i_opcd:6;
93 		u_int	i_rs:5;
94 		u_int	i_ra:5;
95 		int	i_d:16;
96 	} i_d;
97 
98 	/*
99 	 * Format DE
100 	 */
101 	struct {
102 		u_int	i_opcd:6;
103 		u_int	i_rs:5;
104 		u_int	i_ra:5;
105 		int	i_d:12;
106 		u_int	i_xo:4;
107 	} i_de;
108 
109 	/*
110 	 * Format I
111 	 */
112 	struct {
113 		u_int	i_opcd:6;
114 		int	i_li:24;
115 		int	i_aa:1;
116 		int	i_lk:1;
117 	} i_i;
118 
119 	/*
120 	 * Format M
121 	 */
122 	struct {
123 		u_int	i_opcd:6;
124 		u_int	i_rs:5;
125 		u_int	i_ra:5;
126 		u_int	i_rb:5;
127 		int	i_mb:5;
128 		int	i_me:5;
129 		u_int	i_rc:1;
130 	} i_m;
131 
132 	/*
133 	 * Format MD
134 	 */
135 	struct {
136 		u_int	i_opcd:6;
137 		u_int	i_rs:5;
138 		u_int	i_ra:5;
139 		u_int	i_rb:5;
140 		int	i_sh1_5:5;
141 		int	i_mb:6;
142 		u_int	i_xo:3;
143 		int	i_sh0:2;
144 		u_int	i_rc:1;
145 	} i_md;
146 
147 	/*
148 	 * Format MDS
149 	 */
150 	struct {
151 		u_int	i_opcd:6;
152 		u_int	i_rs:5;
153 		u_int	i_ra:5;
154 		u_int	i_rb:5;
155 		int	i_sh:5;
156 		int	i_mb:6;
157 		u_int	i_xo:4;
158 		u_int	i_rc:1;
159 	} i_mds;
160 
161 
162 	/*
163 	 * Format S
164 	 */
165 	struct {
166 		u_int	i_opcd:6;
167 		int	:24;
168 		int	i_i:1;
169 		int	:1;
170 	} i_s;
171 
172 	/*
173 	 * Format X
174 	 */
175 	struct {
176 		u_int	i_opcd:6;
177 		u_int	i_rs:5;
178 		u_int	i_ra:5;
179 		u_int	i_rb:5;
180 		u_int	i_xo:10;
181 		u_int	i_rc:1;
182 	} i_x;
183 
184 	/*
185 	 * Format XFL
186 	 */
187 	struct {
188 		u_int	i_opcd:6;
189 		int	:1;
190 		int	i_flm:8;
191 		int	:1;
192 		int	i_frb:5;
193 		u_int	i_xo:10;
194 		int	:1;
195 	} i_xfl;
196 
197 	/*
198 	 * Format XFX
199 	 */
200 	struct {
201 		u_int	i_opcd:6;
202 		int	i_dcrn:10;
203 		u_int	i_xo:10;
204 		int	:1;
205 	} i_xfx;
206 
207 	/*
208 	 * Format XL
209 	 */
210 	struct {
211 		u_int	i_opcd:6;
212 		int	i_bt:5;
213 		int	i_ba:5;
214 		int	i_bb:5;
215 		u_int	i_xo:10;
216 		int	i_lk:1;
217 	} i_xl;
218 
219 	/*
220 	 * Format XS
221 	 */
222 	struct {
223 		u_int	i_opcd:6;
224 		u_int	i_rs:5;
225 		u_int	i_ra:5;
226 		int	i_sh0_4:5;
227 		u_int	i_xo:9;
228 		int	i_sh5:1;
229 		u_int	i_rc:1;
230 	} i_xs;
231 
232 };
233 
234 #define	i_rt	i_rs
235 
236 /*
237  * Primary opcode numbers:
238  */
239 
240 #define	OPC_TDI		0x02
241 #define	OPC_TWI		0x03
242 #define	OPC_MULLI	0x07
243 #define	OPC_SUBFIC	0x08
244 #define	OPC_BCE		0x09
245 #define	OPC_CMPLI	0x0a
246 #define	OPC_CMPI	0x0b
247 #define	OPC_ADDIC	0x0c
248 #define	OPC_ADDIC_DOT	0x0d
249 #define	OPC_ADDI	0x0e
250 #define	OPC_ADDIS	0x0f
251 #define	OPC_BC		0x10
252 #define	OPC_SC		0x11
253 #define	OPC_B		0x12
254 #define	OPC_branch_19	0x13
255 #define	OPC_RLWIMI	0x14
256 #define	OPC_RLWINM	0x15
257 #define	OPC_BE		0x16
258 #define	OPC_RLWNM	0x17
259 #define	OPC_ORI		0x18
260 #define	OPC_ORIS	0x19
261 #define	OPC_XORI	0x1a
262 #define	OPC_XORIS	0x1b
263 #define	OPC_ANDI	0x1c
264 #define	OPC_ANDIS	0x1d
265 #define	OPC_dwe_rot_30	0x1e
266 #define	OPC_integer_31	0x1f
267 #define	OPC_LWZ		0x20
268 #define	OPC_LWZU	0x21
269 #define	OPC_LBZ		0x22
270 #define	OPC_LBZU	0x23
271 #define	OPC_STW		0x24
272 #define	OPC_STWU	0x25
273 #define	OPC_STB		0x26
274 #define	OPC_STBU	0x27
275 #define	OPC_LHZ		0x28
276 #define	OPC_LHZU	0x29
277 #define	OPC_LHA		0x2a
278 #define	OPC_LHAU	0x2b
279 #define	OPC_STH		0x2c
280 #define	OPC_STHU	0x2d
281 #define	OPC_LMW		0x2e
282 #define	OPC_STMW	0x2f
283 #define	OPC_LFS		0x30
284 #define	OPC_LFSU	0x31
285 #define	OPC_LFD		0x32
286 #define	OPC_LFDU	0x33
287 #define	OPC_STFS	0x34
288 #define	OPC_STFSU	0x35
289 #define	OPC_STFD	0x36
290 #define	OPC_STFDU	0x37
291 #define	OPC_load_st_58	0x3a
292 #define	OPC_sp_fp_59	0x3b
293 #define	OPC_load_st_62	0x3e
294 #define	OPC_dp_fp_63	0x3f
295 
296 /*
297  * Opcode 31 sub-types (FP only)
298  */
299 #define	OPC31_TW	0x004
300 #define	OPC31_LFSX	0x217
301 #define	OPC31_LFSUX	0x237
302 #define	OPC31_LFDX	0x257
303 #define	OPC31_LFDUX	0x277
304 #define	OPC31_STFSX	0x297
305 #define	OPC31_STFSUX	0x2b7
306 #define	OPC31_STFDX	0x2d7
307 #define	OPC31_STFDUX	0x2f7
308 #define	OPC31_STFIWX	0x3d7
309 
310 /* Mask for all valid indexed FP load/store ops (except stfiwx) */
311 #define	OPC31_FPMASK	0x31f
312 #define	OPC31_FPOP	0x217
313 
314 /*
315  * Opcode 59 sub-types:
316  */
317 
318 #define	OPC59_FDIVS	0x12
319 #define	OPC59_FSUBS	0x14
320 #define	OPC59_FADDS	0x15
321 #define	OPC59_FSQRTS	0x16
322 #define	OPC59_FRES	0x18
323 #define	OPC59_FMULS	0x19
324 #define	OPC59_FMSUBS	0x1c
325 #define	OPC59_FMADDS	0x1d
326 #define	OPC59_FNMSUBS	0x1e
327 #define	OPC59_FNMADDS	0x1f
328 
329 /*
330  * Opcode 62 sub-types:
331  */
332 #define	OPC62_LDE	0x0
333 #define	OPC62_LDEU	0x1
334 #define	OPC62_LFSE	0x4
335 #define	OPC62_LFSEU	0x5
336 #define	OPC62_LFDE	0x6
337 #define	OPC62_LFDEU	0x7
338 #define	OPC62_STDE	0x8
339 #define	OPC62_STDEU	0x9
340 #define	OPC62_STFSE	0xc
341 #define	OPC62_STFSEU	0xd
342 #define	OPC62_STFDE	0xe
343 #define	OPC62_STFDEU	0xf
344 
345 /*
346  * Opcode 63 sub-types:
347  *
348  * (The first group are masks....)
349  */
350 
351 #define	OPC63M_MASK	0x10
352 #define	OPC63M_FDIV	0x12
353 #define	OPC63M_FSUB	0x14
354 #define	OPC63M_FADD	0x15
355 #define	OPC63M_FSQRT	0x16
356 #define	OPC63M_FSEL	0x17
357 #define	OPC63M_FMUL	0x19
358 #define	OPC63M_FRSQRTE	0x1a
359 #define	OPC63M_FMSUB	0x1c
360 #define	OPC63M_FMADD	0x1d
361 #define	OPC63M_FNMSUB	0x1e
362 #define	OPC63M_FNMADD	0x1f
363 
364 #define	OPC63_FCMPU	0x00
365 #define	OPC63_FRSP	0x0c
366 #define	OPC63_FCTIW	0x0e
367 #define	OPC63_FCTIWZ	0x0f
368 #define	OPC63_FCMPO	0x20
369 #define	OPC63_MTFSB1	0x26
370 #define	OPC63_FNEG	0x28
371 #define	OPC63_MCRFS	0x40
372 #define	OPC63_MTFSB0	0x46
373 #define	OPC63_FMR	0x48
374 #define	OPC63_MTFSFI	0x86
375 #define	OPC63_FNABS	0x88
376 #define	OPC63_FABS	0x108
377 #define	OPC63_MFFS	0x247
378 #define	OPC63_MTFSF	0x2c7
379 #define	OPC63_FCTID	0x32e
380 #define	OPC63_FCTIDZ	0x32f
381 #define	OPC63_FCFID	0x34e
382 
383 /*
384  * FPU data types.
385  */
386 #define FTYPE_LNG	-1	/* data = 64-bit signed long integer */
387 #define	FTYPE_INT	0	/* data = 32-bit signed integer */
388 #define	FTYPE_SNG	1	/* data = 32-bit float */
389 #define	FTYPE_DBL	2	/* data = 64-bit double */
390 #define	FTYPE_EXT	3	/* data = 128-bit extended (quad-prec) */
391 
392 /*
393  * FPCSR rounding modes.
394  */
395 #define	  FSR_RD_RN	0		/* round to nearest */
396 #define	  FSR_RD_RZ	1		/* round towards 0 */
397 #define	  FSR_RD_RP	2		/* round towards +inf */
398 #define	  FSR_RD_RM	3		/* round towards -inf */
399