1 /* $NetBSD: trap.h,v 1.8 2002/05/19 06:35:45 augustss Exp $ */ 2 3 /* 4 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 5 * Copyright (C) 1995, 1996 TooLs GmbH. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by TooLs GmbH. 19 * 4. The name of TooLs GmbH may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 #ifndef _POWERPC_TRAP_H_ 34 #define _POWERPC_TRAP_H_ 35 36 #define EXC_RSVD 0x0000 /* Reserved */ 37 #define EXC_RST 0x0100 /* Reset; all but IBM4xx */ 38 #define EXC_MCHK 0x0200 /* Machine Check */ 39 #define EXC_DSI 0x0300 /* Data Storage Interrupt */ 40 #define EXC_ISI 0x0400 /* Instruction Storage Interrupt */ 41 #define EXC_EXI 0x0500 /* External Interrupt */ 42 #define EXC_ALI 0x0600 /* Alignment Interrupt */ 43 #define EXC_PGM 0x0700 /* Program Interrupt */ 44 #define EXC_FPU 0x0800 /* Floating-point Unavailable */ 45 #define EXC_DECR 0x0900 /* Decrementer Interrupt */ 46 #define EXC_SC 0x0c00 /* System Call */ 47 #define EXC_TRC 0x0d00 /* Trace */ 48 #define EXC_FPA 0x0e00 /* Floating-point Assist */ 49 50 /* The following is only available on the 601: */ 51 #define EXC_RUNMODETRC 0x2000 /* Run Mode/Trace Exception */ 52 53 /* The following are only available on 7400(G4): */ 54 #define EXC_VEC 0x0f20 /* AltiVec Unavailable */ 55 #define EXC_VECAST 0x1600 /* AltiVec Assist */ 56 57 /* The following are only available on 604/750/7400: */ 58 #define EXC_PERF 0x0f00 /* Performance Monitoring */ 59 #define EXC_BPT 0x1300 /* Instruction Breakpoint */ 60 #define EXC_SMI 0x1400 /* System Managment Interrupt */ 61 62 /* The following are only available on 750/7400: */ 63 #define EXC_THRM 0x1700 /* Thermal Management Interrupt */ 64 65 /* And these are only on the 603: */ 66 #define EXC_IMISS 0x1000 /* Instruction translation miss */ 67 #define EXC_DLMISS 0x1100 /* Data load translation miss */ 68 #define EXC_DSMISS 0x1200 /* Data store translation miss */ 69 70 /* The following are only available on 405 (and 403?) */ 71 #define EXC_CII 0x0100 /* Critical Input Interrupt */ 72 #define EXC_PIT 0x1000 /* Programmable Interval Timer */ 73 #define EXC_FIT 0x1010 /* Fixed Interval Timer */ 74 #define EXC_WDOG 0x1020 /* Watchdog Timer */ 75 #define EXC_DTMISS 0x1100 /* Data TLB Miss */ 76 #define EXC_ITMISS 0x1200 /* Instruction TLB Miss */ 77 #define EXC_DEBUG 0x2000 /* Debug trap */ 78 79 #define EXC_LAST 0x2f00 /* Last possible exception vector */ 80 81 #define EXC_AST 0x3000 /* Fake AST vector */ 82 83 /* Trap was in user mode */ 84 #define EXC_USER 0x10000 85 86 87 /* 88 * EXC_ALI sets bits in the DSISR and DAR to provide enough 89 * information to recover from the unaligned access without needing to 90 * parse the offending instruction. This includes certain bits of the 91 * opcode, and information about what registers are used. The opcode 92 * indicator values below come from Appendix F of Book III of "The 93 * PowerPC Architecture". 94 */ 95 96 #define EXC_ALI_OPCODE_INDICATOR(dsisr) ((dsisr >> 10) & 0x7f) 97 #define EXC_ALI_LFD 0x09 98 #define EXC_ALI_STFD 0x0b 99 #define EXC_ALI_DCBZ 0x5f 100 101 /* Macros to extract register information */ 102 #define EXC_ALI_RST(dsisr) ((dsisr >> 5) & 0x1f) /* source or target */ 103 #define EXC_ALI_RA(dsisr) (dsisr & 0x1f) 104 105 #endif /* _POWERPC_TRAP_H_ */ 106