xref: /netbsd/sys/arch/powerpc/marvell/marvell_intr.h (revision 6550d01e)
1 /*	$NetBSD: marvell_intr.h,v 1.17 2010/04/28 13:51:55 kiyohara Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Charles M. Hannum.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _POWERPC_MARVELL_INTR_H_
33 #define _POWERPC_MARVELL_INTR_H_
34 
35 void *intr_establish(int, int, int, int (*)(void *), void *);
36 void intr_disestablish(void *);
37 const char *intr_typename(int);
38 void genppc_cpu_configure(void);
39 
40 /* Interrupt priority `levels'. */
41 #define	IPL_NONE	0	/* nothing */
42 #define	IPL_SOFTCLOCK	1	/* timeouts */
43 #define	IPL_SOFTBIO	2	/* block I/O */
44 #define	IPL_SOFTNET	3	/* protocol stacks */
45 #define	IPL_SOFTSERIAL	4	/* serial */
46 #define	IPL_VM		5	/* memory allocation */
47 #define	IPL_SCHED	6
48 #define	IPL_HIGH	7	/* everything */
49 #define	NIPL		8
50 
51 /* Interrupt sharing types. */
52 #define	IST_NONE	0	/* none */
53 #define	IST_PULSE	1	/* pulsed */
54 #define	IST_EDGE	2	/* edge-triggered */
55 #define	IST_LEVEL	3	/* level-triggered */
56 
57 #ifndef _LOCORE
58 /*
59  * Interrupt handler chains.  intr_establish() inserts a handler into
60  * the list.  The handler is called with its (single) argument.
61  */
62 struct intrhand {
63 	int	(*ih_fun)(void *);
64 	void	*ih_arg;
65 	struct	intrhand *ih_next;
66 	int	ih_level;
67 	int	ih_irq;
68 };
69 
70 int splraise(int);
71 int spllower(int);
72 void splx(int);
73 void softintr(int);
74 
75 typedef uint64_t imask_t;
76 extern imask_t imask[];
77 
78 #define NVIRQ		64	/* 64 virtual IRQs */
79 #define NIRQ		128	/* up to 128 HW IRQs */
80 
81 #define HWIRQ_MAX       (NVIRQ - 4 - 1)
82 #define HWIRQ_MASK      0x0ffffffffffffffeULL
83 
84 /* Soft interrupt masks. */
85 #define SIR_CLOCK	60
86 #define SIR_BIO		61
87 #define SIR_NET		62
88 #define SIR_SERIAL	63
89 #define SPL_CLOCK	0
90 
91 #define MS_PENDING(p)	(((p) & (1 << SPL_CLOCK)) ? SPL_CLOCK : \
92 			    (((p) & (0xffffffffULL << 32)) ? \
93 						63 - cntlzw((p) >> 32) : \
94 						32 - cntlzw((p) & 0xffffffff)))
95 
96 #define setsoftclock()	softintr(SIR_CLOCK)
97 #define setsoftbio()	softintr(SIR_BIO)
98 #define setsoftnet()	softintr(SIR_NET)
99 #define setsoftserial()	softintr(SIR_SERIAL)
100 
101 #define spl0()		spllower(0)
102 
103 typedef int ipl_t;
104 typedef struct {
105 	ipl_t _ipl;
106 } ipl_cookie_t;
107 
108 static inline ipl_cookie_t
109 makeiplcookie(ipl_t ipl)
110 {
111 
112 	return (ipl_cookie_t){._ipl = ipl};
113 }
114 
115 static inline int
116 splraiseipl(ipl_cookie_t icookie)
117 {
118 
119 	return splraise(icookie._ipl);
120 }
121 
122 #include <sys/spl.h>
123 
124 #define ICU_LEN		(64 + 32)	/* Main Interrupt(64) + GPIO(32) */
125 
126 extern struct pic_ops *discovery_pic;
127 extern struct pic_ops *discovery_gpp_pic[4];
128 struct pic_ops *setup_discovery_pic(void);
129 struct pic_ops *setup_discovery_gpp_pic(void *, int);
130 
131 #endif /* !_LOCORE */
132 
133 #endif /* _POWERPC_MARVELL_INTR_H_ */
134