1 /* $NetBSD: fpu.c,v 1.5 2001/07/22 11:29:46 wiz Exp $ */ 2 3 /* 4 * Copyright (C) 1996 Wolfgang Solfrank. 5 * Copyright (C) 1996 TooLs GmbH. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by TooLs GmbH. 19 * 4. The name of TooLs GmbH may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 #include <sys/param.h> 34 #include <sys/proc.h> 35 #include <sys/systm.h> 36 #include <sys/user.h> 37 38 #include <machine/fpu.h> 39 #include <machine/psl.h> 40 41 void 42 enable_fpu(p) 43 struct proc *p; 44 { 45 int msr, scratch; 46 struct pcb *pcb = &p->p_addr->u_pcb; 47 struct trapframe *tf = trapframe(p); 48 49 tf->srr1 |= PSL_FP; 50 if (!(pcb->pcb_flags & PCB_FPU)) { 51 memset(&pcb->pcb_fpu, 0, sizeof pcb->pcb_fpu); 52 pcb->pcb_flags |= PCB_FPU; 53 } 54 asm volatile ("mfmsr %0; ori %1,%0,%2; mtmsr %1; isync" 55 : "=r"(msr), "=r"(scratch) : "K"(PSL_FP)); 56 asm volatile ("lfd 0,0(%0); mtfsf 0xff,0" :: "b"(&pcb->pcb_fpu.fpscr)); 57 asm ("lfd 0,0(%0);" 58 "lfd 1,8(%0);" 59 "lfd 2,16(%0);" 60 "lfd 3,24(%0);" 61 "lfd 4,32(%0);" 62 "lfd 5,40(%0);" 63 "lfd 6,48(%0);" 64 "lfd 7,56(%0);" 65 "lfd 8,64(%0);" 66 "lfd 9,72(%0);" 67 "lfd 10,80(%0);" 68 "lfd 11,88(%0);" 69 "lfd 12,96(%0);" 70 "lfd 13,104(%0);" 71 "lfd 14,112(%0);" 72 "lfd 15,120(%0);" 73 "lfd 16,128(%0);" 74 "lfd 17,136(%0);" 75 "lfd 18,144(%0);" 76 "lfd 19,152(%0);" 77 "lfd 20,160(%0);" 78 "lfd 21,168(%0);" 79 "lfd 22,176(%0);" 80 "lfd 23,184(%0);" 81 "lfd 24,192(%0);" 82 "lfd 25,200(%0);" 83 "lfd 26,208(%0);" 84 "lfd 27,216(%0);" 85 "lfd 28,224(%0);" 86 "lfd 29,232(%0);" 87 "lfd 30,240(%0);" 88 "lfd 31,248(%0)" :: "b"(&pcb->pcb_fpu.fpr[0])); 89 asm volatile ("mtmsr %0; isync" :: "r"(msr)); 90 } 91 92 void 93 save_fpu(p) 94 struct proc *p; 95 { 96 int msr, scratch; 97 struct pcb *pcb = &p->p_addr->u_pcb; 98 99 asm volatile ("mfmsr %0; ori %1,%0,%2; mtmsr %1; isync" 100 : "=r"(msr), "=r"(scratch) : "K"(PSL_FP)); 101 asm ("stfd 0,0(%0);" 102 "stfd 1,8(%0);" 103 "stfd 2,16(%0);" 104 "stfd 3,24(%0);" 105 "stfd 4,32(%0);" 106 "stfd 5,40(%0);" 107 "stfd 6,48(%0);" 108 "stfd 7,56(%0);" 109 "stfd 8,64(%0);" 110 "stfd 9,72(%0);" 111 "stfd 10,80(%0);" 112 "stfd 11,88(%0);" 113 "stfd 12,96(%0);" 114 "stfd 13,104(%0);" 115 "stfd 14,112(%0);" 116 "stfd 15,120(%0);" 117 "stfd 16,128(%0);" 118 "stfd 17,136(%0);" 119 "stfd 18,144(%0);" 120 "stfd 19,152(%0);" 121 "stfd 20,160(%0);" 122 "stfd 21,168(%0);" 123 "stfd 22,176(%0);" 124 "stfd 23,184(%0);" 125 "stfd 24,192(%0);" 126 "stfd 25,200(%0);" 127 "stfd 26,208(%0);" 128 "stfd 27,216(%0);" 129 "stfd 28,224(%0);" 130 "stfd 29,232(%0);" 131 "stfd 30,240(%0);" 132 "stfd 31,248(%0)" :: "b"(&pcb->pcb_fpu.fpr[0])); 133 asm volatile ("mffs 0; stfd 0,0(%0)" :: "b"(&pcb->pcb_fpu.fpscr)); 134 asm volatile ("mtmsr %0; isync" :: "r"(msr)); 135 pcb->pcb_fpcpu = NULL; 136 fpuproc = NULL; 137 } 138