xref: /netbsd/sys/arch/prep/prep/locore.S (revision bf9ec67e)
1/*	$NetBSD: locore.S,v 1.3 2001/06/23 02:12:34 matt Exp $	*/
2/*	$OpenBSD: locore.S,v 1.4 1997/01/26 09:06:38 rahnds Exp $	*/
3
4/*
5 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
6 * Copyright (C) 1995, 1996 TooLs GmbH.
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed by TooLs GmbH.
20 * 4. The name of TooLs GmbH may not be used to endorse or promote products
21 *    derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
28 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
29 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
31 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35#include "opt_ddb.h"
36#include "fs_kernfs.h"
37#include "opt_ipkdb.h"
38#include "opt_lockdebug.h"
39#include "opt_multiprocessor.h"
40#include "assym.h"
41
42#include <sys/syscall.h>
43
44#include <machine/param.h>
45#include <machine/vmparam.h>
46#include <machine/pmap.h>
47#include <machine/psl.h>
48#include <machine/trap.h>
49#include <machine/asm.h>
50
51#include <powerpc/spr.h>
52
53/*
54 * Some instructions gas doesn't understand (yet?)
55 */
56#define	bdneq	bdnzf 2,
57
58/*
59 * cache bit
60 */
61#define	HID0_BTCD	(1<<1)
62#define	HID0_BHTE	(1<<2)
63#define	HID0_SIED	(1<<7)
64#define	HID0_DCI	(1<<10)
65#define	HID0_ICFI	(1<<11)
66#define	HID0_DCE	(1<<14)
67#define	HID0_ICE	(1<<15)
68
69#define	INTSTK	(8*1024)	/* 8K interrupt stack */
70#define	SPILLSTK 1024		/* 1K spill stack */
71
72/*
73 * Globals
74 */
75GLOBAL(startsym)
76	.long	0			/* start symbol table */
77GLOBAL(endsym)
78	.long	0			/* end symbol table */
79GLOBAL(proc0paddr)
80	.long	0			/* proc0 p_addr */
81
82GLOBAL(intrnames)
83	.asciz	"clock", "irq1", "irq2", "irq3"
84	.asciz	"irq4", "irq5", "irq6", "irq7"
85	.asciz	"irq8", "irq9", "irq10", "irq11"
86	.asciz	"irq12", "irq13", "irq14", "irq15"
87	.asciz	"irq16", "irq17", "irq18", "irq19"
88	.asciz	"irq20", "irq21", "irq22", "irq23"
89	.asciz	"irq24", "irq25", "irq26", "irq27"
90	.asciz	"irq28", "softnet", "softclock", "softserial"
91GLOBAL(eintrnames)
92	.align	4
93GLOBAL(intrcnt)
94	.long	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
95	.long	0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
96GLOBAL(eintrcnt)
97
98/*
99 * File-scope for locore.S
100 */
101	.data
102idle_u:
103	.long	0			/* fake uarea during idle after exit */
104
105/*
106 * This symbol is here for the benefit of kvm_mkdb, and is supposed to
107 * mark the start of kernel text.
108 */
109	.text
110	.globl	_C_LABEL(kernel_text)
111_C_LABEL(kernel_text):
112
113/*
114 * Startup entry.  Note, this must be the first thing in the text
115 * segment!
116 */
117	.text
118	.globl	__start
119__start:
120	li	0,0
121	mtmsr	0			/* Disable FPU/MMU/exceptions */
122	isync
123
124/* compute end of kernel memory */
125	lis	8,_C_LABEL(end)@ha
126	addi	8,8,_C_LABEL(end)@l
127#if defined(DDB) || defined(KERNFS)
128	lis	7,_C_LABEL(startsym)@ha
129	addi	7,7,_C_LABEL(startsym)@l
130	stw	3,0(7)
131	lis	7,_C_LABEL(endsym)@ha
132	addi	7,7,_C_LABEL(endsym)@l
133	stw	4,0(7)
134	mr	8,4			/* end of sysbol table */
135#endif
136	li	9,PGOFSET
137	add	8,8,9
138	andc	8,8,9
139	addi	8,8,NBPG
140	lis	9,idle_u@ha
141	stw	8,idle_u@l(9)
142	addi	8,8,USPACE		/* space for idle_u */
143	lis	9,_C_LABEL(proc0paddr)@ha
144	stw	8,_C_LABEL(proc0paddr)@l(9)
145	addi	1,8,USPACE-FRAMELEN	/* stackpointer for proc0 */
146	mr	4,1			/* end of mem reserved for kernel */
147	xor	0,0,0
148	stwu	0,-16(1)		/* end of stack chain */
149
150	lis	3,__start@ha
151	addi	3,3,__start@l
152
153	bl	_C_LABEL(initppc)
154
155/* enable internal i/d-cache */
156	mfpvr	9
157	rlwinm	9,9,16,16,31
158	cmpi	0,9,1
159	beq	3f			/* not needed for 601 */
160	mfspr	11,SPR_HID0
161	andi.	0,11,HID0_DCE
162	ori	11,11,HID0_ICE|HID0_DCE
163	ori	8,11,HID0_ICFI
164	bne	1f			/* don't invalidate the D-cache */
165	ori	8,8,HID0_DCI		/* unless it wasn't enabled */
1661:
167	sync
168	mtspr	SPR_HID0,8		/* enable and invalidate caches */
169	sync
170	mtspr	SPR_HID0,11		/* enable caches */
171	sync
172	isync
173	cmpi	0,9,4			/* check for 604 */
174	cmpi	1,9,9			/* or 604e */
175	cmpi	2,9,10			/* or mach5 */
176	cror	2,2,6
177	cror	2,2,10
178	bne	3f
179	ori	11,11,HID0_SIED|HID0_BHTE /* for 604[e], enable */
180	bne	2,2f
181	ori	11,11,HID0_BTCD
1822:
183	mtspr	SPR_HID0,11
1843:
185	sync
186	isync
187
188	bl	_C_LABEL(main)
189
190loop:
191	b	loop			/* not reached */
192
193	.globl	_C_LABEL(enable_intr)
194_C_LABEL(enable_intr):
195	mfmsr	3
196	ori	3,3,PSL_EE@l
197	mtmsr	3
198	blr
199
200	.globl	_C_LABEL(disable_intr)
201_C_LABEL(disable_intr):
202	mfmsr	3
203	andi.	3,3,~PSL_EE@l
204	mtmsr	3
205	blr
206
207/*
208 * Pull in common switch / setfault code.
209 */
210#include <powerpc/powerpc/locore_subr.S>
211
212/*
213 * Pull in common trap vector code.
214 */
215#include <powerpc/powerpc/trap_subr.S>
216