xref: /netbsd/sys/arch/rs6000/rs6000/locore.S (revision 6550d01e)
1/*	$NetBSD: locore.S,v 1.8 2011/01/17 08:23:57 matt Exp $	*/
2/*	$OpenBSD: locore.S,v 1.4 1997/01/26 09:06:38 rahnds Exp $	*/
3
4/*
5 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
6 * Copyright (C) 1995, 1996 TooLs GmbH.
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed by TooLs GmbH.
20 * 4. The name of TooLs GmbH may not be used to endorse or promote products
21 *    derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
28 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
29 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
31 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35#include "opt_ddb.h"
36#include "opt_ipkdb.h"
37#include "opt_lockdebug.h"
38#include "opt_modular.h"
39#include "opt_multiprocessor.h"
40#include "opt_ppcparam.h"
41#include "assym.h"
42
43#include <sys/syscall.h>
44
45#include <machine/param.h>
46#include <machine/vmparam.h>
47#include <machine/pmap.h>
48#include <machine/psl.h>
49#include <machine/trap.h>
50#include <machine/asm.h>
51
52#include <powerpc/spr.h>
53#include <powerpc/oea/spr.h>
54
55#include "ksyms.h"
56
57/* Use common machine type */
58/* .machine "com" */
59
60/*
61 * Some instructions gas doesn't understand (yet?)
62 */
63
64#define	bdneq	bdnzf 2,
65
66/*
67 * cache bit
68 */
69#define	HID0_BTCD	(1<<1)
70#define	HID0_BHTE	(1<<2)
71#define	HID0_SIED	(1<<7)
72#define	HID0_DCI	(1<<10)
73#define	HID0_ICFI	(1<<11)
74#define	HID0_DCE	(1<<14)
75#define	HID0_ICE	(1<<15)
76
77/*
78 * Globals
79 */
80GLOBAL(startsym)
81	.long	0			/* start symbol table */
82GLOBAL(endsym)
83	.long	0			/* end symbol table */
84GLOBAL(oeacpufeat)
85	.long	0			/* cpu features */
86/*
87 * This symbol is here for the benefit of kvm_mkdb, and is supposed to
88 * mark the start of kernel text.
89 */
90	.text
91	.globl	_C_LABEL(kernel_text)
92_C_LABEL(kernel_text):
93
94/*
95 * Startup entry.  Note, this must be the first thing in the text
96 * segment!
97 */
98	.text
99	.globl	__start
100__start:
101
102	li	0,0
103	mtmsr	0			/* Disable FPU/MMU/exceptions */
104	isync
105
106
107/* compute end of kernel memory */
108#if NKSYMS || defined(DDB) || defined(MODULAR)
109	lis	7,_C_LABEL(startsym)@ha
110	addi	7,7,_C_LABEL(startsym)@l
111	stw	3,0(7)
112	lis	7,_C_LABEL(endsym)@ha
113	addi	7,7,_C_LABEL(endsym)@l
114	stw	4,0(7)
115#else
116	lis	4,_C_LABEL(end)@ha
117	addi	4,4,_C_LABEL(end)@l
118#endif
119
120	INIT_CPUINFO(4,1,9,0)
121
122	lis	3,__start@ha
123	addi	3,3,__start@l
124
125	bl	_C_LABEL(initppc)
126
127/* enable internal i/d-cache */
128	mfpvr	9
129	rlwinm	9,9,16,16,31
130	cmpi	0,9,1
131	beq	3f			/* not needed for 601 */
132	mfspr	11,SPR_HID0
133	andi.	0,11,HID0_DCE
134	ori	11,11,HID0_ICE|HID0_DCE
135	ori	8,11,HID0_ICFI
136	bne	1f			/* don't invalidate the D-cache */
137	ori	8,8,HID0_DCI		/* unless it wasn't enabled */
1381:
139	sync
140	mtspr	SPR_HID0,8		/* enable and invalidate caches */
141	sync
142	mtspr	SPR_HID0,11		/* enable caches */
143	sync
144	isync
145	cmpi	0,9,4			/* check for 604 */
146	cmpi	1,9,9			/* or 604e */
147	cmpi	2,9,10			/* or mach5 */
148	cror	2,2,6
149	cror	2,2,10
150	bne	3f
151	ori	11,11,HID0_SIED|HID0_BHTE /* for 604[e], enable */
152	bne	2,2f
153	ori	11,11,HID0_BTCD
1542:
155	mtspr	SPR_HID0,11
1563:
157	sync
158	isync
159
160	bl	_C_LABEL(main)
161
162loop:
163	b	loop			/* not reached */
164
165	.globl	_C_LABEL(enable_intr)
166_C_LABEL(enable_intr):
167	mfmsr	3
168	ori	4,3,PSL_EE@l
169	mtmsr	4
170	blr
171
172	.globl	_C_LABEL(disable_intr)
173_C_LABEL(disable_intr):
174	mfmsr	3
175	andi.	4,3,~PSL_EE@l
176	mtmsr	4
177	blr
178
179/*
180 * Pull in common switch / setfault code.
181 */
182#include <powerpc/powerpc/locore_subr.S>
183
184/*
185 * Pull in common trap vector code.
186 */
187#include <powerpc/powerpc/trap_subr.S>
188
189/*
190 * Pull in common pio / bus_space code.
191 */
192#include <powerpc/powerpc/pio_subr.S>
193