xref: /netbsd/sys/arch/sgimips/dev/crime.c (revision 6550d01e)
1 /*	$NetBSD: crime.c,v 1.33 2008/08/08 16:05:47 tsutsui Exp $	*/
2 
3 /*
4  * Copyright (c) 2004 Christopher SEKIYA
5  * Copyright (c) 2000 Soren S. Jorvang
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *          This product includes software developed for the
19  *          NetBSD Project.  See http://www.NetBSD.org/ for
20  *          information about NetBSD.
21  * 4. The name of the author may not be used to endorse or promote products
22  *    derived from this software without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
33  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 /*
37  * O2 CRIME
38  */
39 
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: crime.c,v 1.33 2008/08/08 16:05:47 tsutsui Exp $");
42 
43 #include <sys/param.h>
44 #include <sys/device.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/cpu.h>
48 
49 #include <machine/locore.h>
50 #include <machine/autoconf.h>
51 #include <machine/bus.h>
52 #include <machine/intr.h>
53 #include <machine/machtype.h>
54 #include <machine/sysconf.h>
55 
56 #include <sgimips/dev/crimevar.h>
57 #include <sgimips/dev/crimereg.h>
58 #include <sgimips/mace/macevar.h>
59 
60 #include "locators.h"
61 
62 #define DISABLE_CRIME_WATCHDOG
63 
64 static int	crime_match(struct device *, struct cfdata *, void *);
65 static void	crime_attach(struct device *, struct device *, void *);
66 void		crime_bus_reset(void);
67 void		crime_watchdog_reset(void);
68 void		crime_watchdog_disable(void);
69 void		crime_intr(uint32_t, uint32_t, uint32_t, uint32_t);
70 void		*crime_intr_establish(int, int, int (*)(void *), void *);
71 
72 static bus_space_tag_t crm_iot;
73 static bus_space_handle_t crm_ioh;
74 
75 CFATTACH_DECL(crime, sizeof(struct crime_softc),
76     crime_match, crime_attach, NULL, NULL);
77 
78 #define CRIME_NINTR 32 	/* XXX */
79 
80 struct {
81 	int	(*func)(void *);
82 	void	*arg;
83 } crime[CRIME_NINTR];
84 
85 static int
86 crime_match(struct device *parent, struct cfdata *match, void *aux)
87 {
88 
89 	/*
90 	 * The CRIME is in the O2.
91 	 */
92 	if (mach_type == MACH_SGI_IP32)
93 		return 1;
94 
95 	return 0;
96 }
97 
98 static void
99 crime_attach(struct device *parent, struct device *self, void *aux)
100 {
101 	struct mainbus_attach_args *ma = aux;
102 	uint64_t crm_id;
103 	uint64_t baseline, endline;
104 	uint32_t startctr, endctr, cps;
105 
106 	crm_iot = SGIMIPS_BUS_SPACE_CRIME;
107 
108 	if (bus_space_map(crm_iot, ma->ma_addr, 0 /* XXX */,
109 	    BUS_SPACE_MAP_LINEAR, &crm_ioh))
110 		panic("%s: can't map I/O space", __func__);
111 
112 	crm_id = bus_space_read_8(crm_iot, crm_ioh, CRIME_REV);
113 
114 	aprint_naive(": system ASIC");
115 
116 	switch ((crm_id & CRIME_ID_IDBITS) >> CRIME_ID_IDSHIFT) {
117 	case 0x0b:
118 		aprint_normal(": rev 1.5");
119 		break;
120 
121 	case 0x0a:
122 		if ((crm_id >> 32) == 0)
123 			aprint_normal(": rev 1.1");
124 		else if ((crm_id >> 32) == 1)
125 			aprint_normal(": rev 1.3");
126 		else
127 			aprint_normal(": rev 1.4");
128 		break;
129 
130 	case 0x00:
131 		aprint_normal(": Petty CRIME");
132 		break;
133 
134 	default:
135 		aprint_normal(": Unknown CRIME");
136 		break;
137 	}
138 
139 	aprint_normal(" (CRIME_ID: %" PRIu64 ")\n", crm_id);
140 
141 	/* reset CRIME CPU & memory error registers */
142 	crime_bus_reset();
143 
144 	crime_watchdog_disable();
145 
146 #define CRIME_TIMER_FREQ	66666666	/* crime clock is 66.7MHz */
147 
148 	baseline = bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME)
149 	    & CRIME_TIME_MASK;
150 	startctr = mips3_cp0_count_read();
151 
152 	/* read both cp0 and crime counters for 100ms */
153 	do {
154 		endline = bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME)
155 		    & CRIME_TIME_MASK;
156 		endctr = mips3_cp0_count_read();
157 	} while (endline - baseline < (CRIME_TIMER_FREQ / 10));
158 
159 	cps = (endctr - startctr) * 10;
160 	curcpu()->ci_cpu_freq = cps;
161 	if (mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
162 		curcpu()->ci_cpu_freq *= 2;
163 	curcpu()->ci_cycles_per_hz = (cps + (hz / 2)) / hz;
164 	curcpu()->ci_divisor_delay = (cps + (1000000 / 2)) / 1000000;
165 
166 	/* Turn on memory error and crime error interrupts.
167 	   All others turned on as devices are registered. */
168 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK,
169 	    CRIME_INT_MEMERR |
170 	    CRIME_INT_CRMERR |
171 	    CRIME_INT_VICE |
172 	    CRIME_INT_VID_OUT |
173 	    CRIME_INT_VID_IN2 |
174 	    CRIME_INT_VID_IN1);
175 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTSTAT, 0);
176 	bus_space_write_8(crm_iot, crm_ioh, CRIME_SOFTINT, 0);
177 	bus_space_write_8(crm_iot, crm_ioh, CRIME_HARDINT, 0);
178 
179 	platform.bus_reset = crime_bus_reset;
180 	platform.watchdog_reset = crime_watchdog_reset;
181 	platform.watchdog_disable = crime_watchdog_disable;
182 	platform.watchdog_enable = crime_watchdog_reset;
183 	platform.intr_establish = crime_intr_establish;
184 	platform.intr0 = crime_intr;
185 }
186 
187 /*
188  * XXX: sharing interrupts?
189  */
190 
191 void *
192 crime_intr_establish(int irq, int level, int (*func)(void *), void *arg)
193 {
194 
195 	if (irq < 16)
196 		return mace_intr_establish(irq, level, func, arg);
197 
198 	if (crime[irq].func != NULL)
199 		return NULL;	/* panic("Cannot share CRIME interrupts!"); */
200 
201 	crime[irq].func = func;
202 	crime[irq].arg = arg;
203 
204 	crime_intr_mask(irq);
205 
206 	return (void *)&crime[irq];
207 }
208 
209 void
210 crime_intr(uint32_t status, uint32_t cause, uint32_t pc, uint32_t ipending)
211 {
212 	uint64_t crime_intmask;
213 	uint64_t crime_intstat;
214 	uint64_t crime_ipending;
215 	uint64_t address, stat;
216 	int i;
217 
218 	crime_intmask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
219 	crime_intstat = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTSTAT);
220 	crime_ipending = (crime_intstat & crime_intmask);
221 
222 	if (crime_ipending & 0xffff)
223 		mace_intr(crime_ipending & 0xffff);
224 
225 	if (crime_ipending & 0xffff0000) {
226 	/*
227 	 * CRIME interrupts for CPU and memory errors
228 	 */
229 		if (crime_ipending & CRIME_INT_MEMERR) {
230 			address = bus_space_read_8(crm_iot, crm_ioh,
231 			    CRIME_MEM_ERROR_ADDR);
232 			stat = bus_space_read_8(crm_iot, crm_ioh,
233 			    CRIME_MEM_ERROR_STAT);
234 			printf("crime: memory error address %" PRIu64
235 			    " status %" PRIu64 "\n", address << 2, stat);
236 			crime_bus_reset();
237 		}
238 
239 		if (crime_ipending & CRIME_INT_CRMERR) {
240 			stat = bus_space_read_8(crm_iot, crm_ioh,
241 			    CRIME_CPU_ERROR_STAT);
242 				printf("crime: cpu error %" PRIu64 " at"
243 				    " address %" PRIu64 "\n", stat,
244 				    bus_space_read_8(crm_iot, crm_ioh,
245 				    CRIME_CPU_ERROR_ADDR));
246 			crime_bus_reset();
247 		}
248 	}
249 
250 	crime_ipending &= ~0xffff;
251 
252 	if (crime_ipending) {
253 		for (i = 16; i < CRIME_NINTR; i++) {
254 			if ((crime_ipending & (1 << i)) &&
255 			    crime[i].func != NULL)
256 				(*crime[i].func)(crime[i].arg);
257 		}
258 	}
259 }
260 
261 void
262 crime_intr_mask(unsigned int intr)
263 {
264 	uint64_t mask;
265 
266 	mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
267 	mask |= (1 << intr);
268 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask);
269 }
270 
271 void
272 crime_intr_unmask(unsigned int intr)
273 {
274 	uint64_t mask;
275 
276 	mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK);
277 	mask &= ~(1 << intr);
278 	bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask);
279 }
280 
281 void
282 crime_bus_reset(void)
283 {
284 
285 	bus_space_write_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_STAT, 0);
286 	bus_space_write_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_STAT, 0);
287 }
288 
289 void
290 crime_watchdog_reset(void)
291 {
292 
293 #ifdef DISABLE_CRIME_WATCHDOG
294 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
295 #else
296 	/* enable watchdog timer, clear it */
297 	bus_space_write_8(crm_iot, crm_ioh,
298 		CRIME_CONTROL, CRIME_CONTROL_DOG_ENABLE);
299 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
300 #endif
301 }
302 
303 void
304 crime_watchdog_disable(void)
305 {
306 	uint64_t reg;
307 
308 	bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0);
309 	reg = bus_space_read_8(crm_iot, crm_ioh, CRIME_CONTROL)
310 	    & ~CRIME_CONTROL_DOG_ENABLE;
311 	bus_space_write_8(crm_iot, crm_ioh, CRIME_CONTROL, reg);
312 }
313 
314 void
315 crime_reboot(void)
316 {
317 
318 	bus_space_write_8(crm_iot, crm_ioh,  CRIME_CONTROL,
319 	    CRIME_CONTROL_HARD_RESET);
320 	for (;;)
321 		;
322 }
323