xref: /netbsd/sys/arch/sgimips/hpc/hpcdma.c (revision c4a72b64)
1 /*	$NetBSD: hpcdma.c,v 1.5 2002/11/09 18:49:02 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 2001 Wayne Knowles
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Wayne Knowles
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * Support for SCSI DMA provided by the HPC.
41  *
42  * Note: We use SCSI0 offsets, etc. here.  Since the layout of SCSI0
43  * and SCSI1 are the same, this is no problem.
44  */
45 
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/device.h>
49 #include <sys/buf.h>
50 
51 #include <machine/bus.h>
52 
53 #include <sgimips/hpc/hpcvar.h>
54 #include <sgimips/hpc/hpcreg.h>
55 #include <sgimips/hpc/hpcdma.h>
56 
57 /*
58  * Allocate DMA Chain descriptor list
59  */
60 void
61 hpcdma_init(struct hpc_attach_args *haa, struct hpc_dma_softc *sc, int ndesc)
62 {
63 	bus_dma_segment_t seg;
64 	int rseg, allocsz;
65 
66 	sc->sc_bst = haa->ha_st;
67 	sc->sc_dmat = haa->ha_dmat;
68 	sc->sc_ndesc = ndesc;
69 	sc->sc_flags = 0;
70 
71 	if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_dmaoff,
72 	    HPC_SCSI0_REGS_SIZE, &sc->sc_bsh) != 0) {
73 		printf(": can't map DMA registers\n");
74 		return;
75 	}
76 
77 	/* Alloc 1 additional descriptor - needed for DMA bug fix */
78 	allocsz = sizeof(struct hpc_dma_desc) * (ndesc + 1);
79 	KASSERT(allocsz <= NBPG);
80 
81 	if (bus_dmamap_create(sc->sc_dmat, NBPG, 1 /*seg*/,
82 			      NBPG, 0, BUS_DMA_WAITOK,
83 			      &sc->sc_dmamap) != 0) {
84 		printf(": failed to create dmamap\n");
85 		return;
86 	}
87 
88 	/*
89 	 * Allocate a block of memory for dma chaining pointers
90 	 */
91 	if (bus_dmamem_alloc(sc->sc_dmat, allocsz, 0, 0,
92 			     &seg, 1, &rseg, BUS_DMA_NOWAIT)) {
93 		printf(": can't allocate sglist\n");
94 		return;
95 	}
96 	/* Map pages into kernel memory */
97 	if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, allocsz,
98 			   (caddr_t *)&sc->sc_desc_kva, BUS_DMA_NOWAIT)) {
99 		printf(": can't map sglist\n");
100 		bus_dmamem_free(sc->sc_dmat, &seg, rseg);
101 		return;
102 	}
103 
104 	if (bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_desc_kva,
105 			    allocsz, NULL, BUS_DMA_NOWAIT)) {
106 		printf(": can't load sglist\n");
107 		return;
108 	}
109 
110 	sc->sc_desc_pa = (void *) sc->sc_dmamap->dm_segs[0].ds_addr;
111 }
112 
113 
114 void
115 hpcdma_sglist_create(struct hpc_dma_softc *sc, bus_dmamap_t dmamap)
116 {
117 	struct hpc_dma_desc *hva, *hpa;
118 	bus_dma_segment_t *segp;
119 	int i;
120 
121 	KASSERT(dmamap->dm_nsegs <= sc->sc_ndesc);
122 
123 	hva  = sc->sc_desc_kva;
124 	hpa  = sc->sc_desc_pa;
125 	segp = dmamap->dm_segs;
126 
127 #ifdef DMA_DEBUG
128 	printf("DMA_SGLIST<");
129 #endif
130 	for (i = dmamap->dm_nsegs; i; i--) {
131 #ifdef DMA_DEBUG
132 		printf("%p:%ld, ", (void *)segp->ds_addr, segp->ds_len);
133 #endif
134 		hva->hdd_bufptr = segp->ds_addr;
135 		hva->hdd_ctl    = segp->ds_len;
136 		hva->hdd_descptr = (u_int32_t) ++hpa;
137 		++hva; ++segp;
138 	}
139 	/* Work around HPC3 DMA bug */
140 	hva->hdd_bufptr  = 0;
141 	hva->hdd_ctl     = HDD_CTL_EOCHAIN;
142 	hva->hdd_descptr = 0;
143 	hva++;
144 #ifdef DMA_DEBUG
145 	printf(">\n");
146 #endif
147 	bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
148 	    0, sc->sc_dmamap->dm_mapsize,
149 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
150 
151 	/* Load DMA Descriptor list */
152 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, HPC_SCSI0_NDBP,
153 			    (u_int32_t)sc->sc_desc_pa);
154 }
155 
156 void
157 hpcdma_cntl(struct hpc_dma_softc *sc, uint32_t mode)
158 {
159 
160 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, HPC_SCSI0_CTL, mode);
161 }
162 
163 void
164 hpcdma_reset(struct hpc_dma_softc *sc)
165 {
166 
167 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, HPC_SCSI0_CTL,
168 	    HPC_DMACTL_RESET);
169 	delay(100);
170 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, HPC_SCSI0_CTL, 0);
171 	delay(1000);
172 }
173 
174 void
175 hpcdma_flush(struct hpc_dma_softc *sc)
176 {
177 	u_int32_t	mode;
178 
179 	mode = bus_space_read_4(sc->sc_bst, sc->sc_bsh, HPC_SCSI0_CTL);
180 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, HPC_SCSI0_CTL,
181 	    			mode | HPC_DMACTL_FLUSH);
182 
183 	/* Wait for Active bit to drop */
184 	while (bus_space_read_4(sc->sc_bst, sc->sc_bsh, HPC_SCSI0_CTL) &
185 	    HPC_DMACTL_ACTIVE) {
186 		bus_space_barrier(sc->sc_bst, sc->sc_bsh, HPC_SCSI0_CTL, 4,
187 		    BUS_SPACE_BARRIER_READ);
188 	}
189 }
190