1/* $NetBSD: ip22_cache.S,v 1.3 2002/03/13 13:12:29 simonb Exp $ */ 2 3/* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38/* 39 * Code to manipulate the L2 SysAD cache on some (R4600/R5000-based) 40 * SGI IP-22 (Indy) systems. 41 */ 42 43#include <mips/asm.h> 44#include <mips/cpuregs.h> 45 46 .set noreorder 47 .set mips3 48 49#define PROLOGUE \ 50 mfc0 t0, MIPS_COP_0_STATUS ; \ 51 nop ; \ 52 nop ; \ 53 nop ; \ 54 li v0, ~MIPS_SR_INT_IE /* ints off */ ; \ 55 and t1, v0, t0 ; \ 56 or t1, MIPS3_SR_KX /* enable 64-bit */ ; \ 57 mtc0 t1, MIPS_COP_0_STATUS ; \ 58 nop ; \ 59 nop ; \ 60 nop ; \ 61 nop 62 63#define EPILOGUE \ 64 mtc0 t0, MIPS_COP_0_STATUS ; \ 65 nop ; \ 66 nop ; \ 67 nop ; \ 68 nop 69 70/* 71 * ip22_sdcache_do_wbinv: 72 * 73 * Write-back and invalidate the cache lines [a0..a1]. 74 */ 75LEAF_NOPROFILE(ip22_sdcache_do_wbinv) 76 PROLOGUE 77 78 /* 79 * Translate the cache indices into the magic cache 80 * flush space. 81 */ 82 dli v0, 0x9000000080000000 /* base of cache flush space */ 83 or a0, v0 /* first */ 84 or a1, v0 /* last */ 85 86 /* 87 * Flush the cache by performing a store into the 88 * magic cache flush space. 89 */ 901: sw zero, 0(a0) 91 bne a0, a1, 1b 92 daddu a0, 32 93 94 EPILOGUE 95 96 j ra 97 nop 98END(ip22_sdcache_do_wbinv) 99 100LEAF_NOPROFILE(ip22_sdcache_enable) 101 PROLOGUE 102 103 li a0, 0x1 104 dsll a0, 31 105 lui a1, 0x9000 106 dsll32 a1, 0 107 or a0, a1, a0 108 sb zero, 0(a0) 109 110 EPILOGUE 111 112 j ra 113 nop 114END(ip22_sdcache_enable) 115 116LEAF_NOPROFILE(ip22_sdcache_disable) 117 PROLOGUE 118 119 li a0, 0x1 120 dsll a0, 31 121 lui a1, 0x9000 122 dsll32 a1, 0 123 or a0, a1, a0 124 sh zero, 0(a0) 125 126 EPILOGUE 127 128 j ra 129 nop 130END(ip22_sdcache_disable) 131