xref: /netbsd/sys/arch/sh3/include/rtcreg.h (revision bf9ec67e)
1 /*	$NetBSD: rtcreg.h,v 1.8 2002/04/28 17:10:36 uch Exp $	*/
2 
3 /*-
4  * Copyright (C) 1999 SAITOH Masanobu.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. The name of the author may not be used to endorse or promote products
15  *    derived from this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #ifndef _SH3_RTCREG_H_
30 #define	_SH3_RTCREG_H_
31 #include <sh3/devreg.h>
32 
33 /*
34  * RTC
35  */
36 #define	SH3_R64CNT			0xfffffec0
37 #define	SH3_RSECCNT			0xfffffec2
38 #define	SH3_RMINCNT			0xfffffec4
39 #define	SH3_RHRCNT			0xfffffec6
40 #define	SH3_RWKCNT			0xfffffec8
41 #define	SH3_RDAYCNT			0xfffffeca
42 #define	SH3_RMONCNT			0xfffffecc
43 #define	SH3_RYRCNT			0xfffffece
44 #define	SH3_RSECAR			0xfffffed0
45 #define	SH3_RMINAR			0xfffffed2
46 #define	SH3_RHRAR			0xfffffed4
47 #define	SH3_RWKAR			0xfffffed6
48 #define	SH3_RDAYAR			0xfffffed8
49 #define	SH3_RMONAR			0xfffffeda
50 #define	SH3_RCR1			0xfffffedc
51 #define	SH3_RCR2			0xfffffede
52 
53 #define	SH4_R64CNT			0xffc80000
54 #define	SH4_RSECCNT			0xffc80004
55 #define	SH4_RMINCNT			0xffc80008
56 #define	SH4_RHRCNT			0xffc8000c
57 #define	SH4_RWKCNT			0xffc80010
58 #define	SH4_RDAYCNT			0xffc80014
59 #define	SH4_RMONCNT			0xffc80018
60 #define	SH4_RYRCNT			0xffc8001c	/* 16 bit */
61 #define	SH4_RSECAR			0xffc80020
62 #define	SH4_RMINAR			0xffc80024
63 #define	SH4_RHRAR			0xffc80028
64 #define	SH4_RWKAR			0xffc8002c
65 #define	SH4_RDAYAR			0xffc80030
66 #define	SH4_RMONAR			0xffc80034
67 #define	SH4_RCR1			0xffc80038
68 #define	SH4_RCR2			0xffc8003c
69 
70 #define	  SH_RCR1_CF			  0x80
71 #define	  SH_RCR1_CIE			  0x10
72 #define	  SH_RCR1_AIE			  0x08
73 #define	  SH_RCR1_AF			  0x01
74 #define	  SH_RCR2_PEF			  0x80
75 #define	  SH_RCR2_PES2			  0x40
76 #define	  SH_RCR2_PES1			  0x20
77 #define	  SH_RCR2_PES0			  0x10
78 #define	  SH_RCR2_ENABLE		  0x08
79 #define	  SH_RCR2_ADJ			  0x04
80 #define	  SH_RCR2_RESET			  0x02
81 #define	  SH_RCR2_START			  0x01
82 
83 #ifndef _LOCORE
84 #if defined(SH3) && defined(SH4)
85 extern u_int32_t __sh_R64CNT;
86 extern u_int32_t __sh_RSECCNT;
87 extern u_int32_t __sh_RMINCNT;
88 extern u_int32_t __sh_RHRCNT;
89 extern u_int32_t __sh_RWKCNT;
90 extern u_int32_t __sh_RDAYCNT;
91 extern u_int32_t __sh_RMONCNT;
92 extern u_int32_t __sh_RYRCNT;
93 extern u_int32_t __sh_RSECAR;
94 extern u_int32_t __sh_RMINAR;
95 extern u_int32_t __sh_RHRAR;
96 extern u_int32_t __sh_RWKAR;
97 extern u_int32_t __sh_RDAYAR;
98 extern u_int32_t __sh_RMONAR;
99 extern u_int32_t __sh_RCR1;
100 extern u_int32_t __sh_RCR2;
101 #endif /* SH3 && SH4 */
102 #endif /* !_LOCORE */
103 
104 #endif /* !_SH3_RTCREG_H_ */
105