xref: /netbsd/sys/arch/shark/shark/ns87307reg.h (revision c4a72b64)
1 /*	$NetBSD: ns87307reg.h,v 1.2 2002/10/05 17:01:51 chs Exp $	*/
2 
3 /*
4  * Copyright 1997
5  * Digital Equipment Corporation. All rights reserved.
6  *
7  * This software is furnished under license and may be used and
8  * copied only in accordance with the following terms and conditions.
9  * Subject to these conditions, you may download, copy, install,
10  * use, modify and distribute this software in source and/or binary
11  * form. No title or ownership is transferred hereby.
12  *
13  * 1) Any source code used, modified or distributed must reproduce
14  *    and retain this copyright notice and list of conditions as
15  *    they appear in the source file.
16  *
17  * 2) No right is granted to use any trade name, trademark, or logo of
18  *    Digital Equipment Corporation. Neither the "Digital Equipment
19  *    Corporation" name nor any trademark or logo of Digital Equipment
20  *    Corporation may be used to endorse or promote products derived
21  *    from this software without the prior written permission of
22  *    Digital Equipment Corporation.
23  *
24  * 3) This software is provided "AS-IS" and any express or implied
25  *    warranties, including but not limited to, any implied warranties
26  *    of merchantability, fitness for a particular purpose, or
27  *    non-infringement are disclaimed. In no event shall DIGITAL be
28  *    liable for any damages whatsoever, and in particular, DIGITAL
29  *    shall not be liable for special, indirect, consequential, or
30  *    incidental damages or damages for lost profits, loss of
31  *    revenue or loss of use, whether such damages arise in contract,
32  *    negligence, tort, under statute, in equity, at law or otherwise,
33  *    even if advised of the possibility of such damage.
34  */
35 
36 /*
37 **++
38 **
39 **  FACILITY:
40 **
41 **     ns87307.h
42 **
43 **  ABSTRACT:
44 **
45 **
46 **
47 **  AUTHORS:
48 **
49 **    Patrick Crilly Digital Equipment Corporation.
50 **
51 **  CREATION DATE:
52 **
53 **    25-February-1997
54 **
55 **--
56 */
57 
58 #ifndef _NS87307REG_H
59 #define _NS87307REG_H
60 
61 /*
62 ** Define TRUE/FALSE if not already defined.  It
63 ** annoys me that C doesn't do this in a standard
64 ** header.
65 */
66 #ifndef TRUE
67 #define TRUE  1
68 #define FALSE 0
69 #endif
70 
71 /*
72 ** Macro for debugging
73 */
74 #define NSIODEBUG
75 #ifdef  NSIODEBUG
76 #define nsioDebug(x) printf x
77 #else
78 #define nsioDebug(x)
79 #endif
80 
81 /*
82 ** Base address of chip.  Used to configure console
83 ** devices.
84 */
85 #ifndef CONNSIOADDR
86 #define CONNSIOADDR 0x15c
87 #endif
88 
89 /*
90 ** Base Register Offsets
91 */
92 #define NSIO_OFFSET_INDEX       0x00  /* Index register           */
93 #define NSIO_OFFSET_DATA        0x01  /* Data register            */
94 
95 /*
96 ** Number of io ports
97 */
98 #define NSIO_NPORTS               2  /* Number of io ports        */
99 
100 /*
101 ** Card Configuration Registers
102 */
103 
104 #define NSIO_CFG_LOGDEV         0x07   /* Select logical device        */
105 #define NSIO_CFG_SID            0x20   /* Chip SID register            */
106 
107 /*
108 ** Logical Device Configuration Registers
109 */
110 
111 #define NSIO_CFG_ACTIVATE        0x30  /* activate register            */
112 #define NSIO_CFG_IORNGCHK        0x31  /* I/O range check register     */
113 #define NSIO_CFG_IOBASEH         0x60  /* IO port base bits 15-8       */
114 #define NSIO_CFG_IOBASEL         0x61  /* IO port base bits 7-0        */
115 #define NSIO_CFG_IRQ             0x70  /* Interrupt Request Level      */
116 #define NSIO_CFG_IRQTYPE         0x71  /* Interrupt Request Type       */
117 #define NSIO_CFG_DMA1            0x74  /* DMA channel for DMA 0        */
118 #define NSIO_CFG_DMA2            0x75  /* DMA channel for DMA 1        */
119 #define NSIO_CFG_REG0            0xF0  /* First configuration register */
120 
121 /*
122 ** KBC Configuration Registers
123 */
124 #define NSIO_KBC_DATAH           0x60  /* kbc data address bits 15-8   */
125 #define NSIO_KBC_DATAL           0x61  /* kbc data address bits  7-0   */
126 #define NSIO_KBC_CMDH            0x62  /* kbc cmd  address bits 15-8   */
127 #define NSIO_KBC_CMDL            0x63  /* kbc cmd  address bits  7-0   */
128 #define NSIO_KBC_CFG             0xF0  /* kbc Super I/O cfg register   */
129 
130 /*
131 ** Chip SID defines
132 */
133 #define NSIO_CHIP_ID_MASK        0xFC  /* Mask to obtain chip id       */
134 #define NSIO_CHIP_ID             0xC0  /* ns87307 chip id              */
135 
136 /*
137 ** Interrupt Type Masks
138 */
139 #define NSIO_IRQ_LEVEL           0x01	 /* Trigger, level = 1 edge = 0 */
140 #define NSIO_IRQ_HIGH            0x02	 /* Int level, high = 1 low = 0 */
141 #define NSIO_IRQ_LOW             0x00
142 
143 /*
144 ** IO Range check bit masks
145 */
146 #define NSIO_RNGCHK_ENABLE       0x02   /* Enable IO range checking     */
147 #define NSIO_RNGCHK_USE55        0x01   /* Set to read 0x55             */
148 
149 /*
150 ** Logical Devices
151 */
152 #define NSIO_DEV_KBC                 0	 /* keyboard controller         */
153 #define NSIO_DEV_MOUSE               1	 /* mouse controller            */
154 #define NSIO_DEV_RTC                 2	 /* real-time clock             */
155 #define NSIO_DEV_FDC                 3	 /* floppy disk controller      */
156 #define NSIO_DEV_LPT                 4	 /* parallel port               */
157 #define NSIO_DEV_USI                 5	 /* USI = UART + inafred        */
158 #define NSIO_DEV_UART                6	 /* UART                        */
159 #define NSIO_DEV_GPIO                7	 /* gerneral purpose I/O        */
160 #define NSIO_DEV_PWR                 8	 /* power management            */
161 
162 
163 
164 /*
165 ** PARREL PORT CONFIGURATION
166 */
167 
168 #define NSIO_LPT_TRISTATE_DISABLE    (0  << 0)    /* tri-state when inactive */
169 #define NSIO_LPT_TRISTATE_ENABLE     (1  << 0)    /* tri-state when inactive */
170 
171 #define NSIO_LPT_CLOCK_DISABLE      (0  << 1)    /* report ecp mode */
172 #define NSIO_LPT_CLOCK_ENABLE       (1  (( 1)    /* ecp/epp timeout function when active */
173 
174                                     /* bit 2 reserved */
175 
176 #define NSIO_LPT_REPORT_ECP         (0  << 3)    /* report ecp mode */
177 #define NSIO_LPT_REPORT_SPP         (1  << 3)    /* report spp mode */
178 
179 #define NSIO_LPT_REG403_DISABLE     (0  << 4)    /* dont respond to reg 403 */
180 #define NSIO_LPT_REG403_ENABLE      (1  << 4)    /* respond to reg 403 */
181 
182 #define NSIO_LPT_SPP_NORMAL         (0x0<< 5)
183 #define NSIO_LPT_SPP_EXTENDED       (0x1<< 5)
184 #define NSIO_LPT_EPP_V_1_7          (0x2<< 5)
185 #define NSIO_LPT_EPP_V_1_9          (0x3<< 5)
186 #define NSIO_LPT_ECP_NO_EPP         (0x4<< 5)
187                           /* bit7-5 0x5 reserved */
188                           /* bit7-5 0x6 reserved */
189 #define NSIO_LPT_ECP_AND_EPP4       (0x7<< 5)
190 
191 /*
192 ** As there are two devices which can be used for serial
193 ** communication, set up defines so it's easy to configure
194 ** the logical devices used for serial communication.
195 */
196 #define NSIO_DEV_COM0           NSIO_DEV_UART
197 #define NSIO_DEV_COM1           NSIO_DEV_USI
198 
199 /*---------------------------------------------------------------------------*/
200 /*	       Macros used to configure logical devices                      */
201 /*---------------------------------------------------------------------------*/
202 
203 /*
204 ** NSIO_READ_REG
205 **
206 ** Read a configuration register.  Use the currently
207 ** selected logical device.
208 **
209 ** sc       pointer to nsio devices softc
210 ** reg      index of register to read
211 ** value    value read from register
212 */
213 #define NSIO_READ_REG( iot, ioh, reg, value ) \
214 { \
215     bus_space_write_1(iot, ioh, NSIO_OFFSET_INDEX, reg ); \
216     value = bus_space_read_1( iot, ioh, NSIO_OFFSET_DATA ); \
217 }
218 
219 /*
220 ** NSIO_WRITE_REG
221 **
222 ** Write to a configuration register.  Use the currently
223 ** selected logical device.
224 **
225 ** sc       pointer to nsio devices softc
226 ** reg      index of register to read
227 ** value    value read from register
228 */
229 #define NSIO_WRITE_REG( iot, ioh, reg, value ) \
230 { \
231     bus_space_write_1(iot, ioh, NSIO_OFFSET_INDEX, reg ); \
232     bus_space_write_1( iot, ioh, NSIO_OFFSET_DATA, value ); \
233 }
234 
235 /*
236 ** NSIO_SELECT_DEV
237 **
238 ** Select logDev as the current the logical device
239 **
240 ** sc       pointer to nsio devices softc
241 ** reg      index of register to read
242 ** logDev   logical device to select
243 */
244 #define NSIO_SELECT_DEV( iot, ioh, logDev ) \
245     NSIO_WRITE_REG( iot, ioh, NSIO_CFG_LOGDEV, logDev )
246 
247 /*
248 ** NSIO_CONFIG_IRQ
249 **
250 ** Set the irq number and triggering for the currently
251 ** selected logical device.  If irqNum is unknown
252 ** the number won't be set and the device will be left
253 ** with it's default value.
254 **
255 ** sc        pointer to nsio devices softc
256 ** irqNum    irq number to set
257 ** irqType   trigger flags e.g. edge/level, high/low
258 */
259 #define NSIO_CONFIG_IRQ( iot, ioh, irqNum, irqType ) \
260 { \
261    if ( irqNum != ISACF_IRQ_DEFAULT ) \
262    { \
263 	NSIO_WRITE_REG( iot, ioh, NSIO_CFG_IRQ, irqNum ); \
264    } \
265    NSIO_WRITE_REG( iot, ioh, NSIO_CFG_IRQTYPE, irqType ); \
266 }
267 
268 /*
269 ** NSIO_CONFIG_KBCCMD
270 **
271 ** Set the io base for the currently selected logical device.
272 **
273 ** sc         pointer to nsio devices softc
274 ** ioBase     address to set io base to
275 */
276 #define NSIO_CONFIG_IOBASE( iot, ioh, ioBase ) \
277 { \
278    NSIO_WRITE_REG( iot, ioh, NSIO_CFG_IOBASEH, \
279 		  (unsigned char)(((ioBase) >> 8) & 0xff) ); \
280    NSIO_WRITE_REG( iot, ioh, NSIO_CFG_IOBASEL, \
281 		  (unsigned char)(((ioBase) & 0xff ) ); \
282 }
283 
284 /*
285 ** NSIO_CONFIG_KBCDATA
286 **
287 ** Set the data base for the keyboard.  The keyboard
288 ** controller must be the currently selected logical device.
289 **
290 ** sc         pointer to nsio devices softc
291 ** dataBase   address to set data base to
292 */
293 
294 #define NSIO_CONFIG_KBCDATA( iot, ioh, dataBase ) \
295 { \
296    NSIO_WRITE_REG( iot, ioh, NSIO_KBC_DATAH, \
297 		  (unsigned char)(((dataBase) >> 8) & 0xff) ); \
298    NSIO_WRITE_REG( iot, ioh, NSIO_KBC_DATAL, \
299 		  (unsigned char)((dataBase) & 0xff ) ); \
300 }
301 
302 /*
303 ** NSIO_CONFIG_KBCCMD
304 **
305 ** Set the command base for the keyboard.  The keyboard
306 ** controller must be the currently selected logical device.
307 **
308 ** sc         pointer to nsio devices softc
309 ** cmdBase    address to set command base to
310 */
311 
312 #define NSIO_CONFIG_KBCCMD( iot, ioh, cmdBase ) \
313 { \
314    NSIO_WRITE_REG( iot, ioh, NSIO_KBC_CMDH, \
315 		  (unsigned char)(((cmdBase) >> 8) & 0xff) ); \
316    NSIO_WRITE_REG( iot, ioh, NSIO_KBC_CMDL, \
317 		  (unsigned char)((cmdBase) & 0xff ) ); \
318 }
319 
320 /*
321 ** NSIO_ACTIVATE_DEV
322 **
323 ** Activate the currently selected logical device.
324 **
325 ** sc    pointer to nsio devices softc
326 */
327 
328 #define NSIO_ACTIVATE_DEV( iot, ioh ) \
329 { \
330    NSIO_WRITE_REG( iot, ioh, NSIO_CFG_ACTIVATE, (0x01) ); \
331 }
332 
333 /*
334 ** NSIO_DEACTIVATE_DEV
335 **
336 ** Deactivate the currently selected logical device.
337 **
338 ** sc    pointer to nsio devices softc
339 */
340 
341 #define NSIO_DEACTIVATE_DEV( iot, ioh ) \
342 { \
343    NSIO_WRITE_REG( iot, ioh, NSIO_CFG_ACTIVATE, (0x00) ); \
344 }
345 
346 
347 /*
348 ** NSIO_CONFIG_DEBUG
349 **
350 ** Print out configuration information for the device
351 **
352 ** sc    pointer to nsio devices softc
353 */
354 #ifdef DDB
355 #define NSIO_CONFIG_DEBUG( iot, ioh ) \
356 { \
357     /* nsioConfigPrint( iot, ioh ); */ \
358 }
359 #else
360 #define NSIO_CONFIG_DEBUG( iot, ioh )
361 #endif
362 
363 /*
364 ** NSIO_CONFIG_KBCDEBUG
365 **
366 ** Print out configuration information for the keyboard device
367 **
368 ** sc    pointer to nsio devices softc
369 */
370 #ifdef DDB
371 #define NSIO_CONFIG_KBCDEBUG( iot, ioh ) \
372 { \
373     u_char cmdL; \
374     u_char cmdH; \
375     /* nsioConfigPrint( iot, ioh ); */ \
376     NSIO_READ_REG( iot, ioh, NSIO_KBC_CMDH, cmdH ); \
377     NSIO_READ_REG( iot, ioh, NSIO_KBC_CMDH, cmdL ); \
378     printf("kbc command: %x\n", (((u_short)(cmdH)) << 8)| cmdL ); \
379 }
380 #else
381 #define NSIO_CONFIG_KBCDEBUG( iot, ioh )
382 #endif
383 
384 /* Functions to help configure the ns87307 logical devices.
385 */
386 int i87307KbdConfig(bus_space_tag_t, u_int, u_int);
387 int i87307MouseConfig(bus_space_tag_t, u_int);
388 int i87307PrinterConfig(bus_space_tag_t, u_int);
389 
390 void nsioConfigPrint(bus_space_tag_t, bus_space_handle_t);
391 
392 #endif /* _NS87307REG_H */
393