1 /* $NetBSD: ebus.c,v 1.9 2002/10/02 16:02:14 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /* 32 * EBus support for PCI based SPARC systems (ms-IIep, Ultra). 33 * EBus is documented in PCIO manual (Sun Part#: 802-7837-01). 34 */ 35 36 #if defined(DEBUG) && !defined(EBUS_DEBUG) 37 #define EBUS_DEBUG 38 #endif 39 40 #ifdef EBUS_DEBUG 41 #define EDB_PROM 0x01 42 #define EDB_CHILD 0x02 43 #define EDB_INTRMAP 0x04 44 #define EDB_BUSMAP 0x08 45 #define EDB_BUSDMA 0x10 46 #define EDB_INTR 0x20 47 int ebus_debug = 0; 48 #define DPRINTF(l, s) do { if (ebus_debug & l) printf s; } while (0) 49 #else 50 #define DPRINTF(l, s) 51 #endif 52 53 #include <sys/param.h> 54 #include <sys/conf.h> 55 #include <sys/device.h> 56 #include <sys/errno.h> 57 #include <sys/extent.h> 58 #include <sys/malloc.h> 59 #include <sys/systm.h> 60 #include <sys/time.h> 61 62 #define _SPARC_BUS_DMA_PRIVATE 63 #include <machine/bus.h> 64 #include <machine/autoconf.h> 65 #include <machine/openfirm.h> 66 67 #include <dev/pci/pcivar.h> 68 #include <dev/pci/pcireg.h> 69 #include <dev/pci/pcidevs.h> 70 71 #include <dev/ofw/ofw_pci.h> 72 73 #include <dev/ebus/ebusreg.h> 74 #include <dev/ebus/ebusvar.h> 75 76 77 struct ebus_softc { 78 struct device sc_dev; 79 struct device *sc_parent; /* PCI bus */ 80 81 int sc_node; /* PROM node */ 82 83 bus_space_tag_t sc_bustag; /* mem tag from pci */ 84 bus_dma_tag_t sc_dmatag; /* XXX */ 85 86 bus_space_tag_t sc_childbustag; /* EBus tag */ 87 88 /* 89 * "reg" contains exactly the info we'd get by processing 90 * "ranges", so don't bother with "ranges" and use "reg" directly. 91 */ 92 struct ofw_pci_register *sc_reg; 93 int sc_nreg; 94 }; 95 96 int ebus_match(struct device *, struct cfdata *, void *); 97 void ebus_attach(struct device *, struct device *, void *); 98 99 CFATTACH_DECL(ebus, sizeof(struct ebus_softc), 100 ebus_match, ebus_attach, NULL, NULL); 101 102 int ebus_setup_attach_args(struct ebus_softc *, int, 103 struct ebus_attach_args *); 104 void ebus_destroy_attach_args(struct ebus_attach_args *); 105 int ebus_print(void *, const char *); 106 107 /* 108 * here are our bus space and bus dma routines. 109 */ 110 static paddr_t ebus_bus_mmap(bus_space_tag_t, bus_addr_t, off_t, int, int); 111 static int _ebus_bus_map(bus_space_tag_t, bus_addr_t, 112 bus_size_t, int, vaddr_t, bus_space_handle_t *); 113 static void *ebus_intr_establish(bus_space_tag_t, int, int, int, 114 int (*)(void *), void *); 115 116 static bus_space_tag_t ebus_alloc_bus_tag(struct ebus_softc *); 117 static bus_dma_tag_t ebus_alloc_dma_tag(struct ebus_softc *, bus_dma_tag_t); 118 119 120 /* 121 * Working around PROM bogosity. 122 * 123 * EBus doesn't have official OFW binding. sparc64 has a de-facto 124 * standard but patching it in in prompatch.c and then decoding it 125 * here would be an overkill for ms-IIep. 126 * 127 * So we assume that all ms-IIep based systems use PCIO chip only in 128 * "motherboard mode" with interrupt lines wired directly to ms-IIep 129 * interrupt inputs. 130 * 131 * Note that this is ineligible for prompatch.c, as we are not 132 * correcting PROM to conform to some established standard, this hack 133 * is tied to this version of ebus driver and as such it's better stay 134 * private to the driver. 135 */ 136 137 struct msiiep_ebus_intr_wiring { 138 const char *name; /* PROM node */ 139 int line; /* ms-IIep interrupt input */ 140 }; 141 142 static struct msiiep_ebus_intr_wiring krups_ebus_intr_wiring[] = { 143 { "su", 0 }, { "8042", 0 }, { "sound", 3 } 144 }; 145 146 147 struct msiiep_known_ebus_wiring { 148 const char *model; 149 struct msiiep_ebus_intr_wiring *map; 150 int mapsize; 151 }; 152 153 #define MSIIEP_MODEL_WIRING(name, map) \ 154 { name, map, sizeof(map)/sizeof(map[0]) } 155 156 static struct msiiep_known_ebus_wiring known_models[] = { 157 MSIIEP_MODEL_WIRING("SUNW,501-4267", krups_ebus_intr_wiring), 158 { NULL, NULL, 0} 159 }; 160 161 162 /* 163 * XXX: This assumes single EBus. However I don't think any ms-IIep 164 * system ever used more than one. In any case, without looking at a 165 * system with multiple PCIO chips I don't know how to correctly 166 * program the driver to handle PROM glitches in them, so for the time 167 * being just use globals. 168 */ 169 static struct msiiep_ebus_intr_wiring *wiring_map; 170 static int wiring_map_size; 171 172 static int ebus_init_wiring_table(struct ebus_softc *); 173 174 175 int 176 ebus_match(parent, match, aux) 177 struct device *parent; 178 struct cfdata *match; 179 void *aux; 180 { 181 struct pci_attach_args *pa = aux; 182 char name[10]; 183 int node; 184 185 /* Only attach if there's a PROM node. */ 186 node = PCITAG_NODE(pa->pa_tag); 187 if (node == -1) 188 return (0); 189 190 PROM_getpropstringA(node, "name", name, sizeof name); 191 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE 192 && PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN 193 && PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS 194 && strcmp(name, "ebus") == 0) 195 return (1); 196 197 return (0); 198 } 199 200 201 static int 202 ebus_init_wiring_table(sc) 203 struct ebus_softc *sc; 204 { 205 struct msiiep_known_ebus_wiring *p; 206 char buf[32]; 207 char *model; 208 209 if (wiring_map != NULL) { 210 printf("%s: global ebus wiring map already initalized\n", 211 sc->sc_dev.dv_xname); 212 return (0); 213 } 214 215 model = PROM_getpropstringA(prom_findroot(), "model", 216 buf, sizeof(buf)); 217 if (model == NULL) 218 panic("ebus_init_wiring_table: no \"model\" property"); 219 220 for (p = known_models; p->model != NULL; ++p) 221 if (strcmp(model, p->model) == 0) { 222 wiring_map = p->map; 223 wiring_map_size = p->mapsize; 224 return (1); 225 } 226 227 /* not found? we should have failed in pci_attach_hook then. */ 228 panic("ebus_init_wiring_table: unknown model %s", model); 229 } 230 231 232 /* 233 * attach an ebus and all it's children. this code is modeled 234 * after the sbus code which does similar things. 235 */ 236 void 237 ebus_attach(parent, self, aux) 238 struct device *parent, *self; 239 void *aux; 240 { 241 struct ebus_softc *sc = (struct ebus_softc *)self; 242 struct pci_attach_args *pa = aux; 243 struct ebus_attach_args ea; 244 int node, error; 245 char devinfo[256]; 246 247 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 248 printf(": %s, revision 0x%02x\n", 249 devinfo, PCI_REVISION(pa->pa_class)); 250 251 node = PCITAG_NODE(pa->pa_tag); 252 if (node == -1) 253 panic("%s: unable to find ebus node", self->dv_xname); 254 255 if (ebus_init_wiring_table(sc) == 0) 256 return; 257 258 sc->sc_node = node; 259 sc->sc_parent = parent; /* XXX: unused so far */ 260 sc->sc_bustag = pa->pa_memt; /* EBus only does PCI MEM32 space */ 261 sc->sc_childbustag = ebus_alloc_bus_tag(sc); 262 sc->sc_dmatag = ebus_alloc_dma_tag(sc, pa->pa_dmat); 263 264 /* 265 * Setup ranges. The interesting thing is that we use "reg" 266 * not "ranges", since "reg" on ebus has exactly the data we'd 267 * get by processing "ranges". 268 * 269 */ 270 error = PROM_getprop(node, "reg", sizeof(struct ofw_pci_register), 271 &sc->sc_nreg, (void **)&sc->sc_reg); 272 if (error) 273 panic("%s: unable to read ebus registers (error %d)", 274 self->dv_xname, error); 275 276 /* 277 * now attach all our children 278 */ 279 DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node)); 280 for (node = firstchild(node); node; node = nextsibling(node)) { 281 char *name = PROM_getpropstring(node, "name"); 282 283 if (ebus_setup_attach_args(sc, node, &ea) != 0) { 284 printf("ebus_attach: %s: incomplete\n", name); 285 continue; 286 } 287 DPRINTF(EDB_CHILD, 288 ("- found child `%s', attaching\n", ea.ea_name)); 289 (void)config_found(self, &ea, ebus_print); 290 ebus_destroy_attach_args(&ea); 291 } 292 } 293 294 int 295 ebus_setup_attach_args(sc, node, ea) 296 struct ebus_softc *sc; 297 int node; 298 struct ebus_attach_args *ea; 299 { 300 int n, err; 301 302 memset(ea, 0, sizeof(struct ebus_attach_args)); 303 304 err = PROM_getprop(node, "name", 1, &n, (void **)&ea->ea_name); 305 if (err != 0) 306 return (err); 307 ea->ea_name[n] = '\0'; 308 309 ea->ea_node = node; 310 ea->ea_bustag = sc->sc_childbustag; 311 ea->ea_dmatag = sc->sc_dmatag; 312 313 err = PROM_getprop(node, "reg", sizeof(struct ebus_regs), 314 &ea->ea_nreg, (void **)&ea->ea_reg); 315 if (err != 0) 316 return (err); 317 318 /* 319 * On Ultra the bar is the _offset_ of the BAR in PCI config 320 * space but in (some?) ms-IIep systems (e.g. Krups) it's the 321 * _number_ of the BAR - e.g. BAR1 is represented by 1 in 322 * Krups PROM, while on Ultra it's 0x14. Fix it here. 323 */ 324 for (n = 0; n < ea->ea_nreg; ++n) 325 if (ea->ea_reg[n].hi < PCI_MAPREG_START) { 326 ea->ea_reg[n].hi = PCI_MAPREG_START 327 + ea->ea_reg[n].hi * sizeof(pcireg_t); 328 } 329 330 331 err = PROM_getprop(node, "address", sizeof(u_int32_t), 332 &ea->ea_nvaddr, (void **)&ea->ea_vaddr); 333 if (err != ENOENT) { 334 if (err != 0) 335 return (err); 336 337 if (ea->ea_nreg != ea->ea_nvaddr) 338 printf("ebus loses: device %s: %d regs and %d addrs\n", 339 ea->ea_name, ea->ea_nreg, ea->ea_nvaddr); 340 } else 341 ea->ea_nvaddr = 0; 342 343 /* XXX: "interrupts" hack */ 344 for (n = 0; n < wiring_map_size; ++n) { 345 struct msiiep_ebus_intr_wiring *w = &wiring_map[n]; 346 if (strcmp(w->name, ea->ea_name) == 0) { 347 ea->ea_intr = malloc(sizeof(u_int32_t), 348 M_DEVBUF, M_NOWAIT); 349 ea->ea_intr[0] = w->line; 350 ea->ea_nintr = 1; 351 break; 352 } 353 } 354 355 return (0); 356 } 357 358 void 359 ebus_destroy_attach_args(ea) 360 struct ebus_attach_args *ea; 361 { 362 363 if (ea->ea_name) 364 free((void *)ea->ea_name, M_DEVBUF); 365 if (ea->ea_reg) 366 free((void *)ea->ea_reg, M_DEVBUF); 367 if (ea->ea_intr) 368 free((void *)ea->ea_intr, M_DEVBUF); 369 if (ea->ea_vaddr) 370 free((void *)ea->ea_vaddr, M_DEVBUF); 371 } 372 373 int 374 ebus_print(aux, p) 375 void *aux; 376 const char *p; 377 { 378 struct ebus_attach_args *ea = aux; 379 int i; 380 381 if (p) 382 printf("%s at %s", ea->ea_name, p); 383 for (i = 0; i < ea->ea_nreg; ++i) 384 printf("%s bar %x offset 0x%x", i == 0 ? "" : ",", 385 ea->ea_reg[i].hi, ea->ea_reg[i].lo); 386 for (i = 0; i < ea->ea_nintr; ++i) 387 printf(" line %d", ea->ea_intr[i]); 388 return (UNCONF); 389 } 390 391 392 /* 393 * bus space and bus dma methods below here 394 */ 395 396 bus_space_tag_t 397 ebus_alloc_bus_tag(sc) 398 struct ebus_softc *sc; 399 { 400 bus_space_tag_t bt; 401 402 bt = (bus_space_tag_t) 403 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT); 404 if (bt == NULL) 405 panic("unable to allocate ebus bus tag"); 406 407 memset(bt, 0, sizeof *bt); 408 bt->cookie = sc; 409 bt->parent = sc->sc_bustag; 410 bt->sparc_bus_map = _ebus_bus_map; 411 bt->sparc_bus_mmap = ebus_bus_mmap; 412 bt->sparc_intr_establish = ebus_intr_establish; 413 return (bt); 414 } 415 416 417 bus_dma_tag_t 418 ebus_alloc_dma_tag(sc, pdt) 419 struct ebus_softc *sc; 420 bus_dma_tag_t pdt; 421 { 422 bus_dma_tag_t dt; 423 424 dt = (bus_dma_tag_t) 425 malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT); 426 if (dt == NULL) 427 panic("unable to allocate ebus dma tag"); 428 429 memset(dt, 0, sizeof *dt); 430 dt->_cookie = sc; 431 #define PCOPY(x) dt->x = pdt->x 432 PCOPY(_dmamap_create); 433 PCOPY(_dmamap_destroy); 434 PCOPY(_dmamap_load); 435 PCOPY(_dmamap_load_mbuf); 436 PCOPY(_dmamap_load_uio); 437 PCOPY(_dmamap_load_raw); 438 PCOPY(_dmamap_unload); 439 PCOPY(_dmamap_sync); 440 PCOPY(_dmamem_alloc); 441 PCOPY(_dmamem_free); 442 PCOPY(_dmamem_map); 443 PCOPY(_dmamem_unmap); 444 PCOPY(_dmamem_mmap); 445 #undef PCOPY 446 return (dt); 447 } 448 449 /* 450 * bus space support. <sparc64/dev/psychoreg.h> has a discussion 451 * about PCI physical addresses, which also applies to ebus. 452 */ 453 static int 454 _ebus_bus_map(t, ba, size, flags, va, hp) 455 bus_space_tag_t t; 456 bus_addr_t ba; /* encodes bar/offset */ 457 bus_size_t size; 458 int flags; 459 vaddr_t va; 460 bus_space_handle_t *hp; 461 { 462 struct ebus_softc *sc = t->cookie; 463 u_int bar; 464 paddr_t offset; 465 int i; 466 467 bar = BUS_ADDR_IOSPACE(ba); 468 offset = BUS_ADDR_PADDR(ba); 469 470 DPRINTF(EDB_BUSMAP, 471 ("\n_ebus_bus_map: bar %d offset %08x sz %x flags %x va %p\n", 472 (int)bar, (u_int32_t)offset, (u_int32_t)size, 473 flags, (void *)va)); 474 475 /* EBus has only two BARs */ 476 if (PCI_MAPREG_NUM(bar) > 1) { 477 DPRINTF(EDB_BUSMAP, 478 ("\n_ebus_bus_map: impossible bar\n")); 479 return (EINVAL); 480 } 481 482 /* 483 * Almost all of the interesting ebus children are mapped by 484 * BAR1, the last entry in sc_reg[], so work our way backwards. 485 */ 486 for (i = sc->sc_nreg - 1; i >= 0; --i) { 487 bus_addr_t pciaddr; 488 u_int32_t ss; 489 490 /* EBus only does MEM32 */ 491 ss = sc->sc_reg[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK; 492 if (ss != OFW_PCI_PHYS_HI_SPACE_MEM32) 493 continue; 494 495 if (bar != (sc->sc_reg[i].phys_hi 496 & OFW_PCI_PHYS_HI_REGISTERMASK)) 497 continue; 498 499 pciaddr = (bus_addr_t)sc->sc_reg[i].phys_lo + offset; 500 501 if (pciaddr + size > sc->sc_reg[i].phys_lo 502 + sc->sc_reg[i].size_lo) 503 continue; 504 505 DPRINTF(EDB_BUSMAP, 506 ("_ebus_bus_map: mapping to PCI addr %x\n", 507 (u_int32_t)pciaddr)); 508 509 /* pass it onto the pci controller */ 510 return (bus_space_map2(sc->sc_bustag, pciaddr, size, 511 flags, va, hp)); 512 } 513 514 DPRINTF(EDB_BUSMAP, (": FAILED\n")); 515 return (EINVAL); 516 } 517 518 static paddr_t 519 ebus_bus_mmap(t, ba, off, prot, flags) 520 bus_space_tag_t t; 521 bus_addr_t ba; 522 off_t off; 523 int prot; 524 int flags; 525 { 526 527 /* XXX: not implemetned yet */ 528 return (-1); 529 } 530 531 /* 532 * Install an interrupt handler for a EBus device. 533 */ 534 void * 535 ebus_intr_establish(t, pri, level, flags, handler, arg) 536 bus_space_tag_t t; 537 int pri; 538 int level; 539 int flags; 540 int (*handler)(void *); 541 void *arg; 542 { 543 return (bus_intr_establish(t->parent, pri, level, flags, handler, arg)); 544 } 545