xref: /netbsd/sys/arch/sparc/fpu/fpu_add.c (revision bf9ec67e)
1 /*	$NetBSD: fpu_add.c,v 1.3 1996/03/14 19:41:52 christos Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)fpu_add.c	8.1 (Berkeley) 6/11/93
45  */
46 
47 /*
48  * Perform an FPU add (return x + y).
49  *
50  * To subtract, negate y and call add.
51  */
52 
53 #include <sys/types.h>
54 #ifdef DIAGNOSTIC
55 #include <sys/systm.h>
56 #endif
57 
58 #include <machine/reg.h>
59 #include <machine/instr.h>
60 
61 #include <sparc/fpu/fpu_arith.h>
62 #include <sparc/fpu/fpu_emu.h>
63 #include <sparc/fpu/fpu_extern.h>
64 
65 struct fpn *
66 fpu_add(fe)
67 	register struct fpemu *fe;
68 {
69 	register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r;
70 	register u_int r0, r1, r2, r3;
71 	register int rd;
72 
73 	/*
74 	 * Put the `heavier' operand on the right (see fpu_emu.h).
75 	 * Then we will have one of the following cases, taken in the
76 	 * following order:
77 	 *
78 	 *  - y = NaN.  Implied: if only one is a signalling NaN, y is.
79 	 *	The result is y.
80 	 *  - y = Inf.  Implied: x != NaN (is 0, number, or Inf: the NaN
81 	 *    case was taken care of earlier).
82 	 *	If x = -y, the result is NaN.  Otherwise the result
83 	 *	is y (an Inf of whichever sign).
84 	 *  - y is 0.  Implied: x = 0.
85 	 *	If x and y differ in sign (one positive, one negative),
86 	 *	the result is +0 except when rounding to -Inf.  If same:
87 	 *	+0 + +0 = +0; -0 + -0 = -0.
88 	 *  - x is 0.  Implied: y != 0.
89 	 *	Result is y.
90 	 *  - other.  Implied: both x and y are numbers.
91 	 *	Do addition a la Hennessey & Patterson.
92 	 */
93 	ORDER(x, y);
94 	if (ISNAN(y))
95 		return (y);
96 	if (ISINF(y)) {
97 		if (ISINF(x) && x->fp_sign != y->fp_sign)
98 			return (fpu_newnan(fe));
99 		return (y);
100 	}
101 	rd = ((fe->fe_fsr >> FSR_RD_SHIFT) & FSR_RD_MASK);
102 	if (ISZERO(y)) {
103 		if (rd != FSR_RD_RM)	/* only -0 + -0 gives -0 */
104 			y->fp_sign &= x->fp_sign;
105 		else			/* any -0 operand gives -0 */
106 			y->fp_sign |= x->fp_sign;
107 		return (y);
108 	}
109 	if (ISZERO(x))
110 		return (y);
111 	/*
112 	 * We really have two numbers to add, although their signs may
113 	 * differ.  Make the exponents match, by shifting the smaller
114 	 * number right (e.g., 1.011 => 0.1011) and increasing its
115 	 * exponent (2^3 => 2^4).  Note that we do not alter the exponents
116 	 * of x and y here.
117 	 */
118 	r = &fe->fe_f3;
119 	r->fp_class = FPC_NUM;
120 	if (x->fp_exp == y->fp_exp) {
121 		r->fp_exp = x->fp_exp;
122 		r->fp_sticky = 0;
123 	} else {
124 		if (x->fp_exp < y->fp_exp) {
125 			/*
126 			 * Try to avoid subtract case iii (see below).
127 			 * This also guarantees that x->fp_sticky = 0.
128 			 */
129 			SWAP(x, y);
130 		}
131 		/* now x->fp_exp > y->fp_exp */
132 		r->fp_exp = x->fp_exp;
133 		r->fp_sticky = fpu_shr(y, x->fp_exp - y->fp_exp);
134 	}
135 	r->fp_sign = x->fp_sign;
136 	if (x->fp_sign == y->fp_sign) {
137 		FPU_DECL_CARRY
138 
139 		/*
140 		 * The signs match, so we simply add the numbers.  The result
141 		 * may be `supernormal' (as big as 1.111...1 + 1.111...1, or
142 		 * 11.111...0).  If so, a single bit shift-right will fix it
143 		 * (but remember to adjust the exponent).
144 		 */
145 		/* r->fp_mant = x->fp_mant + y->fp_mant */
146 		FPU_ADDS(r->fp_mant[3], x->fp_mant[3], y->fp_mant[3]);
147 		FPU_ADDCS(r->fp_mant[2], x->fp_mant[2], y->fp_mant[2]);
148 		FPU_ADDCS(r->fp_mant[1], x->fp_mant[1], y->fp_mant[1]);
149 		FPU_ADDC(r0, x->fp_mant[0], y->fp_mant[0]);
150 		if ((r->fp_mant[0] = r0) >= FP_2) {
151 			(void) fpu_shr(r, 1);
152 			r->fp_exp++;
153 		}
154 	} else {
155 		FPU_DECL_CARRY
156 
157 		/*
158 		 * The signs differ, so things are rather more difficult.
159 		 * H&P would have us negate the negative operand and add;
160 		 * this is the same as subtracting the negative operand.
161 		 * This is quite a headache.  Instead, we will subtract
162 		 * y from x, regardless of whether y itself is the negative
163 		 * operand.  When this is done one of three conditions will
164 		 * hold, depending on the magnitudes of x and y:
165 		 *   case i)   |x| > |y|.  The result is just x - y,
166 		 *	with x's sign, but it may need to be normalized.
167 		 *   case ii)  |x| = |y|.  The result is 0 (maybe -0)
168 		 *	so must be fixed up.
169 		 *   case iii) |x| < |y|.  We goofed; the result should
170 		 *	be (y - x), with the same sign as y.
171 		 * We could compare |x| and |y| here and avoid case iii,
172 		 * but that would take just as much work as the subtract.
173 		 * We can tell case iii has occurred by an overflow.
174 		 *
175 		 * N.B.: since x->fp_exp >= y->fp_exp, x->fp_sticky = 0.
176 		 */
177 		/* r->fp_mant = x->fp_mant - y->fp_mant */
178 		FPU_SET_CARRY(y->fp_sticky);
179 		FPU_SUBCS(r3, x->fp_mant[3], y->fp_mant[3]);
180 		FPU_SUBCS(r2, x->fp_mant[2], y->fp_mant[2]);
181 		FPU_SUBCS(r1, x->fp_mant[1], y->fp_mant[1]);
182 		FPU_SUBC(r0, x->fp_mant[0], y->fp_mant[0]);
183 		if (r0 < FP_2) {
184 			/* cases i and ii */
185 			if ((r0 | r1 | r2 | r3) == 0) {
186 				/* case ii */
187 				r->fp_class = FPC_ZERO;
188 				r->fp_sign = rd == FSR_RD_RM;
189 				return (r);
190 			}
191 		} else {
192 			/*
193 			 * Oops, case iii.  This can only occur when the
194 			 * exponents were equal, in which case neither
195 			 * x nor y have sticky bits set.  Flip the sign
196 			 * (to y's sign) and negate the result to get y - x.
197 			 */
198 #ifdef DIAGNOSTIC
199 			if (x->fp_exp != y->fp_exp || r->fp_sticky)
200 				panic("fpu_add");
201 #endif
202 			r->fp_sign = y->fp_sign;
203 			FPU_SUBS(r3, 0, r3);
204 			FPU_SUBCS(r2, 0, r2);
205 			FPU_SUBCS(r1, 0, r1);
206 			FPU_SUBC(r0, 0, r0);
207 		}
208 		r->fp_mant[3] = r3;
209 		r->fp_mant[2] = r2;
210 		r->fp_mant[1] = r1;
211 		r->fp_mant[0] = r0;
212 		if (r0 < FP_1)
213 			fpu_norm(r);
214 	}
215 	return (r);
216 }
217