1 /* $NetBSD: fsr.h,v 1.2 1994/11/20 20:53:08 deraadt Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * @(#)fsr.h 8.1 (Berkeley) 6/11/93 45 */ 46 47 #ifndef _MACHINE_FSR_H_ 48 #define _MACHINE_FSR_H_ 49 50 /* 51 * Bits in FSR. 52 */ 53 #define FSR_RD 0xc0000000 /* rounding direction */ 54 #define FSR_RD_RN 0 /* round to nearest */ 55 #define FSR_RD_RZ 1 /* round towards 0 */ 56 #define FSR_RD_RP 2 /* round towards +inf */ 57 #define FSR_RD_RM 3 /* round towards -inf */ 58 #define FSR_RD_SHIFT 30 59 #define FSR_RD_MASK 0x03 60 61 #define FSR_RP 0x30000000 /* extended rounding precision */ 62 #define FSR_RP_X 0 /* extended stays extended */ 63 #define FSR_RP_S 1 /* extended => single */ 64 #define FSR_RP_D 2 /* extended => double */ 65 #define FSR_RP_80 3 /* extended => 80-bit */ 66 #define FSR_RP_SHIFT 28 67 #define FSR_RP_MASK 0x03 68 69 #define FSR_TEM 0x0f800000 /* trap enable mask */ 70 #define FSR_TEM_SHIFT 23 71 #define FSR_TEM_MASK 0x1f 72 73 #define FSR_NS 0x00400000 /* ``nonstandard mode'' */ 74 #define FSR_AU 0x00400000 /* aka abrupt underflow mode */ 75 #define FSR_MBZ 0x00300000 /* reserved; must be zero */ 76 77 #define FSR_VER 0x000e0000 /* version bits */ 78 #define FSR_VER_SHIFT 17 79 #define FSR_VER_MASK 0x07 80 81 #define FSR_FTT 0x0001c000 /* FP trap type */ 82 #define FSR_TT_NONE 0 /* no trap */ 83 #define FSR_TT_IEEE 1 /* IEEE exception */ 84 #define FSR_TT_UNFIN 2 /* unfinished operation */ 85 #define FSR_TT_UNIMP 3 /* unimplemented operation */ 86 #define FSR_TT_SEQ 4 /* sequence error */ 87 #define FSR_TT_HWERR 5 /* hardware error (unrecoverable) */ 88 #define FSR_FTT_SHIFT 14 89 #define FSR_FTT_MASK 0x03 90 91 #define FSR_QNE 0x00002000 /* queue not empty */ 92 #define FSR_PR 0x00001000 /* partial result */ 93 94 #define FSR_FCC 0x00000c00 /* FP condition codes */ 95 #define FSR_CC_EQ 0 /* f1 = f2 */ 96 #define FSR_CC_LT 1 /* f1 < f2 */ 97 #define FSR_CC_GT 2 /* f1 > f2 */ 98 #define FSR_CC_UO 3 /* (f1,f2) unordered */ 99 #define FSR_FCC_SHIFT 10 100 #define FSR_FCC_MASK 0x03 101 102 #define FSR_AX 0x000003e0 /* accrued exceptions */ 103 #define FSR_AX_SHIFT 5 104 #define FSR_AX_MASK 0x1f 105 #define FSR_CX 0x0000001f /* current exceptions */ 106 #define FSR_CX_SHIFT 0 107 #define FSR_CX_MASK 0x1f 108 109 /* The following exceptions apply to TEM, AX, and CX. */ 110 #define FSR_NV 0x10 /* invalid operand */ 111 #define FSR_OF 0x08 /* overflow */ 112 #define FSR_UF 0x04 /* underflow */ 113 #define FSR_DZ 0x02 /* division by zero */ 114 #define FSR_NX 0x01 /* inexact result */ 115 116 #endif /* _MACHINE_FSR_H_ */ 117