1 /* $NetBSD: mcontext.h,v 1.10 2008/10/26 06:58:02 mrg Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Klaus Klein. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _SPARC_MCONTEXT_H_ 33 #define _SPARC_MCONTEXT_H_ 34 35 #define _UC_SETSTACK 0x00010000 36 #define _UC_CLRSTACK 0x00020000 37 38 /* 39 * Layout of mcontext_t according the System V Application Binary Interface, 40 * Edition 4.1, SPARC Processor ABI Supplement and updated for SPARC v9. 41 */ 42 43 #ifdef __arch64__ 44 #define _NGREG 21 /* %ccr, pc, npc, %g1-7, %o0-7, %asi, %fprs */ 45 #else 46 #define _NGREG 19 /* %psr, pc, npc, %g1-7, %o0-7 */ 47 #endif 48 typedef long int __greg_t; 49 typedef __greg_t __gregset_t[_NGREG]; 50 51 /* Offsets into gregset_t, for convenience. */ 52 #define _REG_CCR 0 /* 64 bit only */ 53 #define _REG_PSR 0 /* 32 bit only */ 54 #define _REG_PC 1 55 #define _REG_nPC 2 56 #define _REG_Y 3 57 #define _REG_G1 4 58 #define _REG_G2 5 59 #define _REG_G3 6 60 #define _REG_G4 7 61 #define _REG_G5 8 62 #define _REG_G6 9 63 #define _REG_G7 10 64 #define _REG_O0 11 65 #define _REG_O1 12 66 #define _REG_O2 13 67 #define _REG_O3 14 68 #define _REG_O4 15 69 #define _REG_O5 16 70 #define _REG_O6 17 71 #define _REG_O7 18 72 #define _REG_ASI 19 /* 64 bit only */ 73 #define _REG_FPRS 20 /* 64 bit only */ 74 75 76 #define _SPARC_MAXREGWINDOW 31 77 78 /* Layout of a register window. */ 79 typedef struct { 80 __greg_t __rw_local[8]; /* %l0-7 */ 81 __greg_t __rw_in[8]; /* %i0-7 */ 82 } __rwindow_t; 83 84 /* Description of available register windows. */ 85 typedef struct { 86 int __wbcnt; 87 __greg_t * __spbuf[_SPARC_MAXREGWINDOW]; 88 __rwindow_t __wbuf[_SPARC_MAXREGWINDOW]; 89 } __gwindows_t; 90 91 /* FPU address queue */ 92 struct __fpq { 93 unsigned int * __fpq_addr; /* address */ 94 unsigned int __fpq_instr; /* instruction */ 95 }; 96 97 struct __fq { 98 union { 99 double __whole; 100 struct __fpq __fpq; 101 } _FQu; 102 }; 103 104 /* FPU state description */ 105 typedef struct { 106 union { 107 unsigned int __fpu_regs[32]; 108 #ifdef __arch64__ 109 double __fpu_dregs[32]; 110 long double __fpu_qregs[16]; 111 #else 112 double __fpu_dregs[16]; 113 #endif 114 } __fpu_fr; /* FPR contents */ 115 struct __fq * __fpu_q; /* pointer to FPU insn queue */ 116 unsigned long __fpu_fsr; /* %fsr */ 117 unsigned char __fpu_qcnt; /* # entries in __fpu_q */ 118 unsigned char __fpu_q_entrysize; /* size of a __fpu_q entry */ 119 unsigned char __fpu_en; /* this context valid? */ 120 } __fpregset_t; 121 122 /* `Extra Register State'(?) */ 123 typedef struct { 124 unsigned int __xrs_id; /* See below */ 125 char * __xrs_ptr; /* points into filler area */ 126 } __xrs_t; 127 128 #define _XRS_ID 0x78727300 /* 'xrs\0' */ 129 130 #ifdef __arch64__ 131 /* Ancillary State Registers, 16-31 are available to user programs */ 132 typedef long __asrset_t[16]; /* %asr16-31 */ 133 #endif 134 135 typedef struct { 136 __gregset_t __gregs; /* GPR state */ 137 __gwindows_t * __gwins; /* may point to register windows */ 138 __fpregset_t __fpregs; /* FPU state, if any */ 139 __xrs_t __xrs; /* may indicate extra reg state */ 140 #ifdef __arch64__ 141 __asrset_t __asrs; /* ASR state */ 142 #endif 143 } mcontext_t; 144 145 #ifdef __arch64__ 146 #define _UC_MACHINE_PAD 8 /* Padding appended to ucontext_t */ 147 #define _UC_MACHINE_SP(uc) (((uc)->uc_mcontext.__gregs[_REG_O6])+0x7ff) 148 #define _UC_MACHINE32_PAD 43 /* compat_netbsd32 variant */ 149 #define _UC_MACHINE32_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_O6]) 150 #else 151 #define _UC_MACHINE_PAD 43 /* Padding appended to ucontext_t */ 152 #define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_O6]) 153 #endif 154 #define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC]) 155 #define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_O0]) 156 157 #define _UC_MACHINE_SET_PC(uc, pc) \ 158 do { \ 159 (uc)->uc_mcontext.__gregs[_REG_PC] = (pc); \ 160 (uc)->uc_mcontext.__gregs[_REG_nPC] = (pc) + 4; \ 161 } while (/*CONSTCOND*/0) 162 163 #endif /* !_SPARC_MCONTEXT_H_ */ 164