xref: /netbsd/sys/arch/sparc/sparc/asm.h (revision bf9ec67e)
1 /*	$NetBSD: asm.h,v 1.8 1999/03/05 10:55:55 pk Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)asm.h	8.1 (Berkeley) 6/11/93
45  */
46 
47 /*
48  * GCC __asm constructs for doing assembly stuff.
49  */
50 
51 /*
52  * ``Routines'' to load and store from/to alternate address space.
53  * The location can be a variable, the asi value (address space indicator)
54  * must be a constant.
55  *
56  * N.B.: You can put as many special functions here as you like, since
57  * they cost no kernel space or time if they are not used.
58  *
59  * These were static inline functions, but gcc screws up the constraints
60  * on the address space identifiers (the "n"umeric value part) because
61  * it inlines too late, so we have to use the funny valued-macro syntax.
62  */
63 
64 /* load byte from alternate address space */
65 #define	lduba(loc, asi) ({ \
66 	register int _lduba_v; \
67 	__asm __volatile("lduba [%1]%2,%0" : "=r" (_lduba_v) : \
68 	    "r" ((int)(loc)), "n" (asi)); \
69 	_lduba_v; \
70 })
71 
72 /* load half-word from alternate address space */
73 #define	lduha(loc, asi) ({ \
74 	register int _lduha_v; \
75 	__asm __volatile("lduha [%1]%2,%0" : "=r" (_lduha_v) : \
76 	    "r" ((int)(loc)), "n" (asi)); \
77 	_lduha_v; \
78 })
79 
80 /* load int from alternate address space */
81 #define	lda(loc, asi) ({ \
82 	register int _lda_v; \
83 	__asm __volatile("lda [%1]%2,%0" : "=r" (_lda_v) : \
84 	    "r" ((int)(loc)), "n" (asi)); \
85 	_lda_v; \
86 })
87 
88 /* store byte to alternate address space */
89 #define	stba(loc, asi, value) ({ \
90 	__asm __volatile("stba %0,[%1]%2" : : \
91 	    "r" ((int)(value)), "r" ((int)(loc)), "n" (asi)); \
92 })
93 
94 /* store half-word to alternate address space */
95 #define	stha(loc, asi, value) ({ \
96 	__asm __volatile("stha %0,[%1]%2" : : \
97 	    "r" ((int)(value)), "r" ((int)(loc)), "n" (asi)); \
98 })
99 
100 /* store int to alternate address space */
101 #define	sta(loc, asi, value) ({ \
102 	__asm __volatile("sta %0,[%1]%2" : : \
103 	    "r" ((int)(value)), "r" ((int)(loc)), "n" (asi)); \
104 })
105 
106 /* load 64-bit int from alternate address space */
107 #define	ldda(loc, asi) ({ \
108 	register long long _lda_v; \
109 	__asm __volatile("ldda [%1]%2,%0" : "=r" (_lda_v) : \
110 	    "r" ((int)(loc)), "n" (asi)); \
111 	_lda_v; \
112 })
113 
114 /* store 64-bit int to alternate address space */
115 #define	stda(loc, asi, value) ({ \
116 	__asm __volatile("stda %0,[%1]%2" : : \
117 	    "r" ((long long)(value)), "r" ((int)(loc)), "n" (asi)); \
118 })
119 
120 /* atomic swap of a word between a register and memory */
121 #define	swap(loc, val) ({ \
122 	__asm __volatile("swap [%2],%0" : "=&r" (val) : "0" (val), "r" (loc)); \
123 })
124 
125 /* atomic load/store of a byte in memory */
126 #define	ldstub(loc) ({ \
127 	int _v; \
128 	__asm __volatile("ldstub [%1],%0" : "=r" (_v) : "r" (loc) : "memory"); \
129 	_v; \
130 })
131 
132 /* read ancillary state register */
133 #define	rdasr(asr) _rdasr(asr)
134 #define	_rdasr(asr) ({ \
135 	register int _rdasr_v; \
136 	__asm __volatile("rd %%asr" #asr ",%0" : "=r" (_rdasr_v)); \
137 	_rdasr_v; \
138 })
139 
140 /* write ancillary state register */
141 #define	wrasr(value, asr) _wrasr(value, asr)
142 #define	_wrasr(value, asr) ({ \
143 	__asm __volatile("wr %0,%%asr" #asr : : "r" ((int)(value))); \
144 })
145