1 /* $NetBSD: memecc.c,v 1.3 2002/03/11 16:27:04 pk Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Kranenburg. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * ECC memory control. 41 */ 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 47 #include <machine/bus.h> 48 #include <machine/autoconf.h> 49 #include <sparc/sparc/memeccreg.h> 50 51 struct memecc_softc { 52 struct device sc_dev; /* base device */ 53 bus_space_tag_t sc_bt; 54 bus_space_handle_t sc_bh; 55 }; 56 57 struct memecc_softc *memecc_sc; 58 59 /* autoconfiguration driver */ 60 static void memecc_attach __P((struct device *, struct device *, void *)); 61 static int memecc_match __P((struct device *, struct cfdata *, void *)); 62 static int memecc_error __P((void)); 63 64 int (*memerr_handler) __P((void)); 65 66 struct cfattach eccmemctl_ca = { 67 sizeof(struct memecc_softc), memecc_match, memecc_attach 68 }; 69 70 int 71 memecc_match(parent, cf, aux) 72 struct device *parent; 73 struct cfdata *cf; 74 void *aux; 75 { 76 struct mainbus_attach_args *ma = aux; 77 78 return (strcmp("eccmemctl", ma->ma_name) == 0); 79 } 80 81 /* 82 * Attach the device. 83 */ 84 void 85 memecc_attach(parent, self, aux) 86 struct device *parent; 87 struct device *self; 88 void *aux; 89 { 90 struct memecc_softc *sc = (struct memecc_softc *)self; 91 struct mainbus_attach_args *ma = aux; 92 int node; 93 u_int32_t reg; 94 95 sc->sc_bt = ma->ma_bustag; 96 node = ma->ma_node; 97 98 /* 99 * Map registers 100 */ 101 if (bus_space_map( 102 ma->ma_bustag, 103 ma->ma_paddr, 104 ma->ma_size, 105 0, 106 &sc->sc_bh) != 0) { 107 printf("memecc_attach: cannot map registers\n"); 108 return; 109 } 110 111 reg = bus_space_read_4(sc->sc_bt, sc->sc_bh, ECC_EN_REG); 112 113 printf(": version 0x%x/0x%x\n", 114 (reg & ECC_EN_VER) >> 24, 115 (reg & ECC_EN_IMPL) >> 28); 116 117 /* Enable checking & interrupts */ 118 reg |= ECC_EN_EE | ECC_EN_EI; 119 bus_space_write_4(sc->sc_bt, sc->sc_bh, ECC_EN_REG, reg); 120 memecc_sc = sc; 121 122 memerr_handler = memecc_error; 123 } 124 125 /* 126 * Called if the MEMORY ERROR bit is set after a level 25 interrupt. 127 */ 128 int 129 memecc_error() 130 { 131 bus_space_handle_t bh = memecc_sc->sc_bh; 132 u_int32_t efsr, efar0, efar1; 133 char bits[64]; 134 135 efsr = bus_space_read_4(memecc_sc->sc_bt, bh, ECC_FSR_REG); 136 efar0 = bus_space_read_4(memecc_sc->sc_bt, bh, ECC_AFR0_REG); 137 efar1 = bus_space_read_4(memecc_sc->sc_bt, bh, ECC_AFR1_REG); 138 printf("memory error:\n\tEFSR: %s\n", 139 bitmask_snprintf(efsr, ECC_FSR_BITS, bits, sizeof(bits))); 140 printf("\tMBus transaction: %s\n", 141 bitmask_snprintf(efar0, ECC_AFR_BITS, bits, sizeof(bits))); 142 printf("\taddress: 0x%x%x\n", efar0 & ECC_AFR_PAH, efar1); 143 144 /* Unlock registers and clear interrupt */ 145 bus_space_write_4(memecc_sc->sc_bt, bh, ECC_FSR_REG, efsr); 146 147 /* Return 0 if this was a correctable error */ 148 return ((efsr & ECC_FSR_CE) == 0); 149 } 150