1 /* $NetBSD: memecc.c,v 1.6 2002/10/02 16:02:10 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Kranenburg. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * ECC memory control. 41 */ 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 47 #include <machine/bus.h> 48 #include <machine/autoconf.h> 49 #include <sparc/sparc/memeccreg.h> 50 51 struct memecc_softc { 52 struct device sc_dev; /* base device */ 53 bus_space_tag_t sc_bt; 54 bus_space_handle_t sc_bh; 55 }; 56 57 struct memecc_softc *memecc_sc; 58 59 /* autoconfiguration driver */ 60 static void memecc_attach __P((struct device *, struct device *, void *)); 61 static int memecc_match __P((struct device *, struct cfdata *, void *)); 62 static int memecc_error __P((void)); 63 64 int (*memerr_handler) __P((void)); 65 66 CFATTACH_DECL(eccmemctl, sizeof(struct memecc_softc), 67 memecc_match, memecc_attach, NULL, NULL); 68 69 int 70 memecc_match(parent, cf, aux) 71 struct device *parent; 72 struct cfdata *cf; 73 void *aux; 74 { 75 struct mainbus_attach_args *ma = aux; 76 77 return (strcmp("eccmemctl", ma->ma_name) == 0); 78 } 79 80 /* 81 * Attach the device. 82 */ 83 void 84 memecc_attach(parent, self, aux) 85 struct device *parent; 86 struct device *self; 87 void *aux; 88 { 89 struct memecc_softc *sc = (struct memecc_softc *)self; 90 struct mainbus_attach_args *ma = aux; 91 int node; 92 u_int32_t reg; 93 94 sc->sc_bt = ma->ma_bustag; 95 node = ma->ma_node; 96 97 /* 98 * Map registers 99 */ 100 if (bus_space_map( 101 ma->ma_bustag, 102 ma->ma_paddr, 103 ma->ma_size, 104 0, 105 &sc->sc_bh) != 0) { 106 printf("memecc_attach: cannot map registers\n"); 107 return; 108 } 109 110 reg = bus_space_read_4(sc->sc_bt, sc->sc_bh, ECC_EN_REG); 111 112 printf(": version 0x%x/0x%x\n", 113 (reg & ECC_EN_VER) >> 24, 114 (reg & ECC_EN_IMPL) >> 28); 115 116 /* Enable checking & interrupts */ 117 reg |= ECC_EN_EE | ECC_EN_EI; 118 bus_space_write_4(sc->sc_bt, sc->sc_bh, ECC_EN_REG, reg); 119 memecc_sc = sc; 120 121 memerr_handler = memecc_error; 122 } 123 124 /* 125 * Called if the MEMORY ERROR bit is set after a level 25 interrupt. 126 */ 127 int 128 memecc_error() 129 { 130 bus_space_handle_t bh = memecc_sc->sc_bh; 131 u_int32_t efsr, efar0, efar1; 132 char bits[64]; 133 134 efsr = bus_space_read_4(memecc_sc->sc_bt, bh, ECC_FSR_REG); 135 efar0 = bus_space_read_4(memecc_sc->sc_bt, bh, ECC_AFR0_REG); 136 efar1 = bus_space_read_4(memecc_sc->sc_bt, bh, ECC_AFR1_REG); 137 printf("memory error:\n\tEFSR: %s\n", 138 bitmask_snprintf(efsr, ECC_FSR_BITS, bits, sizeof(bits))); 139 printf("\tMBus transaction: %s\n", 140 bitmask_snprintf(efar0, ECC_AFR_BITS, bits, sizeof(bits))); 141 printf("\taddress: 0x%x%x\n", efar0 & ECC_AFR_PAH, efar1); 142 143 /* Unlock registers and clear interrupt */ 144 bus_space_write_4(memecc_sc->sc_bt, bh, ECC_FSR_REG, efsr); 145 146 /* Return 0 if this was a correctable error */ 147 return ((efsr & ECC_FSR_CE) == 0); 148 } 149