xref: /netbsd/sys/arch/sparc/sparc/oclock.c (revision bf9ec67e)
1 /*	$NetBSD: oclock.c,v 1.1 2002/03/28 11:54:17 pk Exp $ */
2 
3 /*-
4  * Copyright (c) 2002 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Paul Kranenburg.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * sun4 intersil time-of-day clock driver. This chip also provides
41  * the system timer.
42  *
43  * Only 4/100's and 4/200's have this old clock device.
44  */
45 #include "opt_sparc_arch.h"
46 
47 #include <sys/param.h>
48 #include <sys/kernel.h>
49 #include <sys/device.h>
50 #include <sys/systm.h>
51 
52 #include <machine/bus.h>
53 #include <machine/autoconf.h>
54 #include <machine/idprom.h>
55 
56 #include <dev/clock_subr.h>
57 #include <dev/ic/intersil7170.h>
58 
59 /* Imported from clock.c: */
60 extern todr_chip_handle_t todr_handle;
61 extern int oldclk;
62 extern int timerblurb;
63 extern void (*timer_init)(void);
64 void establish_hostid(struct idprom *);
65 
66 
67 static int oclockmatch(struct device *, struct cfdata *, void *);
68 static void oclockattach(struct device *, struct device *, void *);
69 
70 struct cfattach oclock_ca = {
71 	sizeof(struct device), oclockmatch, oclockattach
72 };
73 
74 
75 #if defined(SUN4)
76 static bus_space_tag_t i7_bt;
77 static bus_space_handle_t i7_bh;
78 
79 #define intersil_command(run, interrupt) \
80     (run | interrupt | INTERSIL_CMD_FREQ_32K | INTERSIL_CMD_24HR_MODE | \
81      INTERSIL_CMD_NORMAL_MODE)
82 
83 #define intersil_disable() \
84 	bus_space_write_1(i7_bt, i7_bh, INTERSIL_ICMD, \
85 		  intersil_command(INTERSIL_CMD_RUN, INTERSIL_CMD_IDISABLE));
86 
87 #define intersil_enable() \
88 	bus_space_write_1(i7_bt, i7_bh, INTERSIL_ICMD, \
89 		  intersil_command(INTERSIL_CMD_RUN, INTERSIL_CMD_IENABLE));
90 
91 #define intersil_clear() bus_space_read_1(i7_bt, i7_bh, INTERSIL_IINTR)
92 
93 int oclockintr(void *);
94 static struct intrhand level10 = { oclockintr };
95 void oclock_init(void);
96 #endif /* SUN4 */
97 
98 /*
99  * old clock match routine
100  */
101 static int
102 oclockmatch(parent, cf, aux)
103 	struct device *parent;
104 	struct cfdata *cf;
105 	void *aux;
106 {
107 	union obio_attach_args *uoba = aux;
108 	struct obio4_attach_args *oba;
109 
110 	if (uoba->uoba_isobio4 == 0)
111 		return (0);
112 
113 	/* Only these sun4s have oclock */
114 	if (!CPU_ISSUN4 ||
115 	    (cpuinfo.cpu_type != CPUTYP_4_100 &&
116 	     cpuinfo.cpu_type != CPUTYP_4_200))
117 		return (0);
118 
119 	/* Make sure there is something there */
120 	oba = &uoba->uoba_oba4;
121 	return (bus_space_probe(oba->oba_bustag, oba->oba_paddr,
122 				1,	/* probe size */
123 				0,	/* offset */
124 				0,	/* flags */
125 				NULL, NULL));
126 }
127 
128 /* ARGSUSED */
129 static void
130 oclockattach(parent, self, aux)
131 	struct device *parent, *self;
132 	void *aux;
133 {
134 #if defined(SUN4)
135 	union obio_attach_args *uoba = aux;
136 	struct obio4_attach_args *oba = &uoba->uoba_oba4;
137 	bus_space_tag_t bt = oba->oba_bustag;
138 	bus_space_handle_t bh;
139 	extern struct idprom sun4_idprom_store;
140 
141 	oldclk = 1;  /* we've got an oldie! */
142 
143 	if (bus_space_map(bt,
144 			  oba->oba_paddr,
145 			  sizeof(struct intersil7170),
146 			  BUS_SPACE_MAP_LINEAR,	/* flags */
147 			  &bh) != 0) {
148 		printf("%s: can't map register\n", self->dv_xname);
149 		return;
150 	}
151 	i7_bt = bt;
152 	i7_bh = bh;
153 
154 	/*
155 	 * calibrate delay()
156 	 */
157 	ienab_bic(IE_L14 | IE_L10);	/* disable all clock intrs */
158 	for (timerblurb = 1; ; timerblurb++) {
159 		int ival;
160 
161 		/* Set to 1/100 second interval */
162 		bus_space_write_1(bt, bh, INTERSIL_IINTR,
163 				  INTERSIL_INTER_CSECONDS);
164 
165 		/* enable clock */
166 		intersil_enable();
167 
168 		while ((intersil_clear() & INTERSIL_INTER_PENDING) == 0)
169 			/* sync with interrupt */;
170 		while ((intersil_clear() & INTERSIL_INTER_PENDING) == 0)
171 			/* XXX: do it again, seems to need it */;
172 
173 		/* Probe 1/100 sec delay */
174 		delay(10000);
175 
176 		/* clear, save value */
177 		ival = intersil_clear();
178 
179 		/* disable clock */
180 		intersil_disable();
181 
182 		if ((ival & INTERSIL_INTER_PENDING) != 0) {
183 			printf(" delay constant %d%s\n", timerblurb,
184 				(timerblurb == 1) ? " [TOO SMALL?]" : "");
185 			break;
186 		}
187 		if (timerblurb > 10) {
188 			printf("\noclock: calibration failing; clamped at %d\n",
189 			       timerblurb);
190 			break;
191 		}
192 	}
193 
194 	timer_init = oclock_init;
195 
196 	/* link interrupt handler */
197 	intr_establish(10, &level10);
198 
199 	/* Our TOD clock year 0 represents 1968 */
200 	if ((todr_handle = intersil7170_attach(bt, bh, 1968)) == NULL)
201 		panic("Can't attach tod clock");
202 
203 	/*
204 	 * This has nothing to do with `oclock' but since on mostek
205 	 * TOD clock based machines the host ID is established when
206 	 * the clock attaches, we do it here as well.
207 	 */
208 	establish_hostid(&sun4_idprom_store);
209 #endif /* SUN4 */
210 }
211 
212 #if defined(SUN4)
213 /*
214  * Set up the real-time and statistics clocks.
215  * Leave stathz 0 only if no alternative timer is available.
216  *
217  * The frequencies of these clocks must be an even number of microseconds.
218  */
219 void
220 oclock_init()
221 {
222 	int dummy;
223 
224 	profhz = hz = 100;
225 	tick = 1000000 / hz;
226 
227 	/* Select 1/100 second interval */
228 	bus_space_write_1(i7_bt, i7_bh, INTERSIL_IINTR,
229 			  INTERSIL_INTER_CSECONDS);
230 
231 	ienab_bic(IE_L14 | IE_L10);	/* disable all clock intrs */
232 	intersil_disable();		/* disable clock */
233 	dummy = intersil_clear();	/* clear interrupts */
234 	ienab_bis(IE_L10);		/* enable l10 interrupt */
235 	intersil_enable();		/* enable clock */
236 }
237 
238 /*
239  * Level 10 (clock) interrupts from system counter.
240  * If we are using the FORTH PROM for console input, we need to check
241  * for that here as well, and generate a software interrupt to read it.
242  */
243 int
244 oclockintr(cap)
245 	void *cap;
246 {
247 	volatile int discard;
248 
249 	discard = intersil_clear();
250 	ienab_bic(IE_L10);  /* clear interrupt */
251 	ienab_bis(IE_L10);  /* enable interrupt */
252 
253 	hardclock((struct clockframe *)cap);
254 	return (1);
255 }
256 #endif /* SUN4 */
257