1 /* $NetBSD: iommuvar.h,v 1.11 2002/03/20 18:54:47 eeh Exp $ */ 2 3 /* 4 * Copyright (c) 1999 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 #ifndef _SPARC64_DEV_IOMMUVAR_H_ 32 #define _SPARC64_DEV_IOMMUVAR_H_ 33 34 /* 35 * per-IOMMU state 36 */ 37 struct iommu_state { 38 paddr_t is_ptsb; /* TSB physical address */ 39 int64_t *is_tsb; /* TSB virtual address */ 40 int is_tsbsize; /* 0 = 8K, ... */ 41 u_int is_dvmabase; 42 u_int is_dvmaend; 43 int64_t is_cr; /* IOMMU control regiter value */ 44 struct extent *is_dvmamap; /* DVMA map for this instance */ 45 46 paddr_t is_flushpa; /* used to flush the SBUS */ 47 /* Needs to be volatile or egcs optimizes away loads */ 48 volatile int64_t is_flush[2]; 49 50 /* copies of our piarents state, to allow us to be self contained */ 51 bus_space_tag_t is_bustag; /* our bus tag */ 52 bus_space_handle_t is_iommu; /* IOMMU registers */ 53 bus_space_handle_t is_sb[2]; /* streaming buffer(s) */ 54 int is_sbvalid[2]; 55 }; 56 57 /* interfaces for PCI/SBUS code */ 58 void iommu_init __P((char *, struct iommu_state *, int, u_int32_t)); 59 void iommu_reset __P((struct iommu_state *)); 60 void iommu_enter __P((struct iommu_state *, vaddr_t, int64_t, int)); 61 void iommu_remove __P((struct iommu_state *, vaddr_t, size_t)); 62 paddr_t iommu_extract __P((struct iommu_state *, vaddr_t)); 63 64 int iommu_dvmamap_load __P((bus_dma_tag_t, struct iommu_state *, 65 bus_dmamap_t, void *, bus_size_t, struct proc *, int)); 66 void iommu_dvmamap_unload __P((bus_dma_tag_t, struct iommu_state *, 67 bus_dmamap_t)); 68 int iommu_dvmamap_load_raw __P((bus_dma_tag_t, struct iommu_state *, 69 bus_dmamap_t, bus_dma_segment_t *, int, int, bus_size_t)); 70 void iommu_dvmamap_sync __P((bus_dma_tag_t, struct iommu_state *, 71 bus_dmamap_t, bus_addr_t, bus_size_t, int)); 72 int iommu_dvmamem_alloc __P((bus_dma_tag_t, struct iommu_state *, 73 bus_size_t, bus_size_t, bus_size_t, bus_dma_segment_t *, 74 int, int *, int)); 75 void iommu_dvmamem_free __P((bus_dma_tag_t, struct iommu_state *, 76 bus_dma_segment_t *, int)); 77 int iommu_dvmamem_map __P((bus_dma_tag_t, struct iommu_state *, 78 bus_dma_segment_t *, int, size_t, caddr_t *, int)); 79 void iommu_dvmamem_unmap __P((bus_dma_tag_t, struct iommu_state *, 80 caddr_t, size_t)); 81 82 #endif /* _SPARC64_DEV_IOMMUVAR_H_ */ 83