xref: /netbsd/sys/arch/sun3/dev/zs.c (revision c4a72b64)
1 /*	$NetBSD: zs.c,v 1.69 2002/10/02 16:02:27 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Gordon W. Ross.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * Zilog Z8530 Dual UART driver (machine-dependent part)
41  *
42  * Runs two serial lines per chip using slave drivers.
43  * Plain tty/async lines use the zs_async slave.
44  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45  */
46 
47 #include "opt_kgdb.h"
48 
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/conf.h>
52 #include <sys/device.h>
53 #include <sys/file.h>
54 #include <sys/ioctl.h>
55 #include <sys/kernel.h>
56 #include <sys/proc.h>
57 #include <sys/tty.h>
58 #include <sys/time.h>
59 #include <sys/syslog.h>
60 
61 #include <machine/autoconf.h>
62 #include <machine/cpu.h>
63 #include <machine/mon.h>
64 #include <machine/z8530var.h>
65 
66 #include <sun3/sun3/machdep.h>
67 #ifdef	_SUN3X_
68 #include <sun3/sun3x/obio.h>
69 #else
70 #include <sun3/sun3/obio.h>
71 #endif
72 #include <sun3/dev/zs_cons.h>
73 
74 #include <dev/cons.h>
75 #include <dev/ic/z8530reg.h>
76 
77 #include "kbd.h"	/* NKBD */
78 #include "zsc.h"	/* NZSC */
79 #define NZS NZSC
80 
81 /* Make life easier for the initialized arrays here. */
82 #if NZS < 2
83 #undef  NZS
84 #define NZS 2
85 #endif
86 
87 /*
88  * Some warts needed by z8530tty.c -
89  * The default parity REALLY needs to be the same as the PROM uses,
90  * or you can not see messages done with printf during boot-up...
91  */
92 int zs_def_cflag = (CREAD | CS8 | HUPCL);
93 
94 /*
95  * The Sun3 provides a 4.9152 MHz clock to the ZS chips.
96  */
97 #define PCLK	(9600 * 512)	/* PCLK pin input clock rate */
98 
99 /*
100  * Define interrupt levels.
101  */
102 #define ZSHARD_PRI	6	/* Wired on the CPU board... */
103 #define ZSSOFT_PRI	3	/* Want tty pri (4) but this is OK. */
104 
105 #define ZS_DELAY()			delay(2)
106 
107 /* The layout of this is hardware-dependent (padding, order). */
108 struct zschan {
109 	volatile u_char	zc_csr;		/* ctrl,status, and indirect access */
110 	u_char		zc_xxx0;
111 	volatile u_char	zc_data;	/* data */
112 	u_char		zc_xxx1;
113 };
114 struct zsdevice {
115 	/* Yes, they are backwards. */
116 	struct	zschan zs_chan_b;
117 	struct	zschan zs_chan_a;
118 };
119 
120 
121 /* Default OBIO addresses. */
122 static int zs_physaddr[NZS] = {
123 	OBIO_ZS_KBD_MS,
124 	OBIO_ZS_TTY_AB };
125 
126 /* Saved PROM mappings */
127 static struct zsdevice *zsaddr[NZS];
128 
129 /* Flags from cninit() */
130 static int zs_hwflags[NZS][2];
131 
132 /* Default speed for each channel */
133 static int zs_defspeed[NZS][2] = {
134 	{ 1200, 	/* keyboard */
135 	  1200 },	/* mouse */
136 	{ 9600, 	/* ttya */
137 	  9600 },	/* ttyb */
138 };
139 
140 static u_char zs_init_reg[16] = {
141 	0,	/* 0: CMD (reset, etc.) */
142 	0,	/* 1: No interrupts yet. */
143 	0x18 + ZSHARD_PRI,	/* IVECT */
144 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
145 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
146 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
147 	0,	/* 6: TXSYNC/SYNCLO */
148 	0,	/* 7: RXSYNC/SYNCHI */
149 	0,	/* 8: alias for data port */
150 	ZSWR9_MASTER_IE,
151 	0,	/*10: Misc. TX/RX control bits */
152 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
153 	((PCLK/32)/9600)-2,	/*12: BAUDLO (default=9600) */
154 	0,			/*13: BAUDHI (default=9600) */
155 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
156 	ZSWR15_BREAK_IE,
157 };
158 
159 
160 /* Find PROM mappings (for console support). */
161 void
162 zs_init()
163 {
164 	int i;
165 
166 	for (i = 0; i < NZS; i++) {
167 		zsaddr[i] = (struct zsdevice *)
168 			obio_find_mapping(zs_physaddr[i], sizeof(struct zschan));
169 	}
170 }
171 
172 struct zschan *
173 zs_get_chan_addr(zs_unit, channel)
174 	int zs_unit, channel;
175 {
176 	struct zsdevice *addr;
177 	struct zschan *zc;
178 
179 	if (zs_unit >= NZS)
180 		return NULL;
181 	addr = zsaddr[zs_unit];
182 	if (addr == NULL)
183 		return NULL;
184 	if (channel == 0) {
185 		zc = &addr->zs_chan_a;
186 	} else {
187 		zc = &addr->zs_chan_b;
188 	}
189 	return (zc);
190 }
191 
192 
193 /****************************************************************
194  * Autoconfig
195  ****************************************************************/
196 
197 /* Definition of the driver for autoconfig. */
198 static int	zs_match __P((struct device *, struct cfdata *, void *));
199 static void	zs_attach __P((struct device *, struct device *, void *));
200 static int  zs_print __P((void *, const char *name));
201 
202 CFATTACH_DECL(zsc, sizeof(struct zsc_softc),
203     zs_match, zs_attach, NULL, NULL);
204 
205 extern struct cfdriver zsc_cd;
206 
207 static int zshard __P((void *));
208 static int zssoft __P((void *));
209 static int zs_get_speed __P((struct zs_chanstate *));
210 
211 
212 /*
213  * Is the zs chip present?
214  */
215 static int
216 zs_match(parent, cf, aux)
217 	struct device *parent;
218 	struct cfdata *cf;
219 	void *aux;
220 {
221 	struct confargs *ca = aux;
222 	int unit;
223 	void *va;
224 
225 	/*
226 	 * This driver only supports its wired-in mappings,
227 	 * because the console support depends on those.
228 	 */
229 	if (ca->ca_paddr == zs_physaddr[0]) {
230 		unit = 0;
231 	} else if (ca->ca_paddr == zs_physaddr[1]) {
232 		unit = 1;
233 	} else {
234 		return (0);
235 	}
236 
237 	/* Make sure zs_init() found mappings. */
238 	va = zsaddr[unit];
239 	if (va == NULL)
240 		return (0);
241 
242 	/* This returns -1 on a fault (bus error). */
243 	if (peek_byte(va) == -1)
244 		return (0);
245 
246 	/* Default interrupt priority (always splbio==2) */
247 	if (ca->ca_intpri == -1)
248 		ca->ca_intpri = ZSHARD_PRI;
249 
250 	return (1);
251 }
252 
253 /*
254  * Attach a found zs.
255  *
256  * Match slave number to zs unit number, so that misconfiguration will
257  * not set up the keyboard as ttya, etc.
258  */
259 static void
260 zs_attach(parent, self, aux)
261 	struct device *parent;
262 	struct device *self;
263 	void *aux;
264 {
265 	struct zsc_softc *zsc = (void *) self;
266 	struct confargs *ca = aux;
267 	struct zsc_attach_args zsc_args;
268 	volatile struct zschan *zc;
269 	struct zs_chanstate *cs;
270 	int s, zs_unit, channel;
271 	static int didintr;
272 
273 	zs_unit = zsc->zsc_dev.dv_unit;
274 
275 	printf(": (softpri %d)\n", ZSSOFT_PRI);
276 
277 	/* Use the mapping setup by the Sun PROM. */
278 	if (zsaddr[zs_unit] == NULL)
279 		panic("zs_attach: zs%d not mapped", zs_unit);
280 
281 	/*
282 	 * Initialize software state for each channel.
283 	 */
284 	for (channel = 0; channel < 2; channel++) {
285 		zsc_args.channel = channel;
286 		zsc_args.hwflags = zs_hwflags[zs_unit][channel];
287 		cs = &zsc->zsc_cs_store[channel];
288 		zsc->zsc_cs[channel] = cs;
289 
290 		cs->cs_channel = channel;
291 		cs->cs_private = NULL;
292 		cs->cs_ops = &zsops_null;
293 		cs->cs_brg_clk = PCLK / 16;
294 
295 		zc = zs_get_chan_addr(zs_unit, channel);
296 		cs->cs_reg_csr  = &zc->zc_csr;
297 		cs->cs_reg_data = &zc->zc_data;
298 
299 		memcpy(cs->cs_creg, zs_init_reg, 16);
300 		memcpy(cs->cs_preg, zs_init_reg, 16);
301 
302 		/* XXX: Get these from the EEPROM instead? */
303 		/* XXX: See the mvme167 code.  Better. */
304 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
305 			cs->cs_defspeed = zs_get_speed(cs);
306 		else
307 			cs->cs_defspeed = zs_defspeed[zs_unit][channel];
308 		cs->cs_defcflag = zs_def_cflag;
309 
310 		/* Make these correspond to cs_defcflag (-crtscts) */
311 		cs->cs_rr0_dcd = ZSRR0_DCD;
312 		cs->cs_rr0_cts = 0;
313 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
314 		cs->cs_wr5_rts = 0;
315 
316 		/*
317 		 * Clear the master interrupt enable.
318 		 * The INTENA is common to both channels,
319 		 * so just do it on the A channel.
320 		 */
321 		if (channel == 0) {
322 			zs_write_reg(cs, 9, 0);
323 		}
324 
325 		/*
326 		 * Look for a child driver for this channel.
327 		 * The child attach will setup the hardware.
328 		 */
329 		if (!config_found(self, (void *)&zsc_args, zs_print)) {
330 			/* No sub-driver.  Just reset it. */
331 			u_char reset = (channel == 0) ?
332 				ZSWR9_A_RESET : ZSWR9_B_RESET;
333 			s = splhigh();
334 			zs_write_reg(cs,  9, reset);
335 			splx(s);
336 		}
337 	}
338 
339 	/*
340 	 * Now safe to install interrupt handlers.  Note the arguments
341 	 * to the interrupt handlers aren't used.  Note, we only do this
342 	 * once since both SCCs interrupt at the same level and vector.
343 	 */
344 	if (!didintr) {
345 		didintr = 1;
346 		isr_add_autovect(zssoft, NULL, ZSSOFT_PRI);
347 		isr_add_autovect(zshard, NULL, ca->ca_intpri);
348 	}
349 	/* XXX; evcnt_attach() ? */
350 
351 	/*
352 	 * Set the master interrupt enable and interrupt vector.
353 	 * (common to both channels, do it on A)
354 	 */
355 	cs = zsc->zsc_cs[0];
356 	s = splhigh();
357 	/* interrupt vector */
358 	zs_write_reg(cs, 2, zs_init_reg[2]);
359 	/* master interrupt control (enable) */
360 	zs_write_reg(cs, 9, zs_init_reg[9]);
361 	splx(s);
362 
363 	/*
364 	 * XXX: L1A hack - We would like to be able to break into
365 	 * the debugger during the rest of autoconfiguration, so
366 	 * lower interrupts just enough to let zs interrupts in.
367 	 * This is done after both zs devices are attached.
368 	 */
369 	if (zs_unit == 1) {
370 		(void)spl5(); /* splzs - 1 */
371 	}
372 }
373 
374 static int
375 zs_print(aux, name)
376 	void *aux;
377 	const char *name;
378 {
379 	struct zsc_attach_args *args = aux;
380 
381 	if (name != NULL)
382 		printf("%s: ", name);
383 
384 	if (args->channel != -1)
385 		printf(" channel %d", args->channel);
386 
387 	return UNCONF;
388 }
389 
390 static volatile int zssoftpending;
391 
392 /*
393  * Our ZS chips all share a common, autovectored interrupt,
394  * so we have to look at all of them on each interrupt.
395  */
396 static int
397 zshard(arg)
398 	void *arg;
399 {
400 	struct zsc_softc *zsc;
401 	int unit, rval, softreq;
402 
403 	rval = softreq = 0;
404 	for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
405 		zsc = zsc_cd.cd_devs[unit];
406 		if (zsc == NULL)
407 			continue;
408 		rval |= zsc_intr_hard(zsc);
409 		softreq |= zsc->zsc_cs[0]->cs_softreq;
410 		softreq |= zsc->zsc_cs[1]->cs_softreq;
411 	}
412 
413 	/* We are at splzs here, so no need to lock. */
414 	if (softreq && (zssoftpending == 0)) {
415 		zssoftpending = ZSSOFT_PRI;
416 		isr_soft_request(ZSSOFT_PRI);
417 	}
418 	return (rval);
419 }
420 
421 /*
422  * Similar scheme as for zshard (look at all of them)
423  */
424 static int
425 zssoft(arg)
426 	void *arg;
427 {
428 	struct zsc_softc *zsc;
429 	int s, unit;
430 
431 	/* This is not the only ISR on this IPL. */
432 	if (zssoftpending == 0)
433 		return (0);
434 
435 	/*
436 	 * The soft intr. bit will be set by zshard only if
437 	 * the variable zssoftpending is zero.  The order of
438 	 * these next two statements prevents our clearing
439 	 * the soft intr bit just after zshard has set it.
440 	 */
441 	isr_soft_clear(ZSSOFT_PRI);
442 	zssoftpending = 0;
443 
444 	/* Make sure we call the tty layer at spltty. */
445 	s = spltty();
446 	for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
447 		zsc = zsc_cd.cd_devs[unit];
448 		if (zsc == NULL)
449 			continue;
450 		(void) zsc_intr_soft(zsc);
451 	}
452 	splx(s);
453 	return (1);
454 }
455 
456 
457 /*
458  * Compute the current baud rate given a ZS channel.
459  */
460 static int
461 zs_get_speed(cs)
462 	struct zs_chanstate *cs;
463 {
464 	int tconst;
465 
466 	tconst = zs_read_reg(cs, 12);
467 	tconst |= zs_read_reg(cs, 13) << 8;
468 	return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
469 }
470 
471 /*
472  * MD functions for setting the baud rate and control modes.
473  */
474 int
475 zs_set_speed(cs, bps)
476 	struct zs_chanstate *cs;
477 	int bps;	/* bits per second */
478 {
479 	int tconst, real_bps;
480 
481 	if (bps == 0)
482 		return (0);
483 
484 #ifdef	DIAGNOSTIC
485 	if (cs->cs_brg_clk == 0)
486 		panic("zs_set_speed");
487 #endif
488 
489 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
490 	if (tconst < 0)
491 		return (EINVAL);
492 
493 	/* Convert back to make sure we can do it. */
494 	real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
495 
496 	/* XXX - Allow some tolerance here? */
497 	if (real_bps != bps)
498 		return (EINVAL);
499 
500 	cs->cs_preg[12] = tconst;
501 	cs->cs_preg[13] = tconst >> 8;
502 
503 	/* Caller will stuff the pending registers. */
504 	return (0);
505 }
506 
507 int
508 zs_set_modes(cs, cflag)
509 	struct zs_chanstate *cs;
510 	int cflag;	/* bits per second */
511 {
512 	int s;
513 
514 	/*
515 	 * Output hardware flow control on the chip is horrendous:
516 	 * if carrier detect drops, the receiver is disabled, and if
517 	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
518 	 * Therefore, NEVER set the HFC bit, and instead use the
519 	 * status interrupt to detect CTS changes.
520 	 */
521 	s = splzs();
522 	cs->cs_rr0_pps = 0;
523 	if ((cflag & (CLOCAL | MDMBUF)) != 0) {
524 		cs->cs_rr0_dcd = 0;
525 		if ((cflag & MDMBUF) == 0)
526 			cs->cs_rr0_pps = ZSRR0_DCD;
527 	} else
528 		cs->cs_rr0_dcd = ZSRR0_DCD;
529 	if ((cflag & CRTSCTS) != 0) {
530 		cs->cs_wr5_dtr = ZSWR5_DTR;
531 		cs->cs_wr5_rts = ZSWR5_RTS;
532 		cs->cs_rr0_cts = ZSRR0_CTS;
533 	} else if ((cflag & MDMBUF) != 0) {
534 		cs->cs_wr5_dtr = 0;
535 		cs->cs_wr5_rts = ZSWR5_DTR;
536 		cs->cs_rr0_cts = ZSRR0_DCD;
537 	} else {
538 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
539 		cs->cs_wr5_rts = 0;
540 		cs->cs_rr0_cts = 0;
541 	}
542 	splx(s);
543 
544 	/* Caller will stuff the pending registers. */
545 	return (0);
546 }
547 
548 
549 /*
550  * Read or write the chip with suitable delays.
551  */
552 
553 u_char
554 zs_read_reg(cs, reg)
555 	struct zs_chanstate *cs;
556 	u_char reg;
557 {
558 	u_char val;
559 
560 	*cs->cs_reg_csr = reg;
561 	ZS_DELAY();
562 	val = *cs->cs_reg_csr;
563 	ZS_DELAY();
564 	return val;
565 }
566 
567 void
568 zs_write_reg(cs, reg, val)
569 	struct zs_chanstate *cs;
570 	u_char reg, val;
571 {
572 	*cs->cs_reg_csr = reg;
573 	ZS_DELAY();
574 	*cs->cs_reg_csr = val;
575 	ZS_DELAY();
576 }
577 
578 u_char zs_read_csr(cs)
579 	struct zs_chanstate *cs;
580 {
581 	u_char val;
582 
583 	val = *cs->cs_reg_csr;
584 	ZS_DELAY();
585 	return val;
586 }
587 
588 void  zs_write_csr(cs, val)
589 	struct zs_chanstate *cs;
590 	u_char val;
591 {
592 	*cs->cs_reg_csr = val;
593 	ZS_DELAY();
594 }
595 
596 u_char zs_read_data(cs)
597 	struct zs_chanstate *cs;
598 {
599 	u_char val;
600 
601 	val = *cs->cs_reg_data;
602 	ZS_DELAY();
603 	return val;
604 }
605 
606 void  zs_write_data(cs, val)
607 	struct zs_chanstate *cs;
608 	u_char val;
609 {
610 	*cs->cs_reg_data = val;
611 	ZS_DELAY();
612 }
613 
614 /****************************************************************
615  * Console support functions (Sun3 specific!)
616  * Note: this code is allowed to know about the layout of
617  * the chip registers, and uses that to keep things simple.
618  * XXX - I think I like the mvme167 code better. -gwr
619  ****************************************************************/
620 
621 void *zs_conschan;
622 
623 /*
624  * Handle user request to enter kernel debugger.
625  */
626 void
627 zs_abort(cs)
628 	struct zs_chanstate *cs;
629 {
630 	volatile struct zschan *zc = zs_conschan;
631 	int rr0;
632 
633 	/* Wait for end of break to avoid PROM abort. */
634 	/* XXX - Limit the wait? */
635 	do {
636 		rr0 = zc->zc_csr;
637 		ZS_DELAY();
638 	} while (rr0 & ZSRR0_BREAK);
639 
640 	/* This is always available on the Sun3. */
641 	Debugger();
642 }
643 
644 /*
645  * Polled input char.
646  */
647 int
648 zs_getc(arg)
649 	void *arg;
650 {
651 	volatile struct zschan *zc = arg;
652 	int s, c, rr0;
653 
654 	s = splhigh();
655 	/* Wait for a character to arrive. */
656 	do {
657 		rr0 = zc->zc_csr;
658 		ZS_DELAY();
659 	} while ((rr0 & ZSRR0_RX_READY) == 0);
660 
661 	c = zc->zc_data;
662 	ZS_DELAY();
663 	splx(s);
664 
665 	/*
666 	 * This is used by the kd driver to read scan codes,
667 	 * so don't translate '\r' ==> '\n' here...
668 	 */
669 	return (c);
670 }
671 
672 /*
673  * Polled output char.
674  */
675 void
676 zs_putc(arg, c)
677 	void *arg;
678 	int c;
679 {
680 	volatile struct zschan *zc = arg;
681 	int s, rr0;
682 
683 	s = splhigh();
684 	/* Wait for transmitter to become ready. */
685 	do {
686 		rr0 = zc->zc_csr;
687 		ZS_DELAY();
688 	} while ((rr0 & ZSRR0_TX_READY) == 0);
689 
690 	zc->zc_data = c;
691 	ZS_DELAY();
692 	splx(s);
693 }
694 
695 /*****************************************************************/
696 
697 static void zscninit __P((struct consdev *));
698 static int  zscngetc __P((dev_t));
699 static void zscnputc __P((dev_t, int));
700 
701 /*
702  * Console table shared by ttya, ttyb
703  */
704 struct consdev consdev_tty = {
705 	nullcnprobe,
706 	zscninit,
707 	zscngetc,
708 	zscnputc,
709 	nullcnpollc,
710 	NULL,
711 };
712 
713 static void
714 zscninit(cn)
715 	struct consdev *cn;
716 {
717 }
718 
719 /*
720  * Polled console input putchar.
721  */
722 static int
723 zscngetc(dev)
724 	dev_t dev;
725 {
726 	return (zs_getc(zs_conschan));
727 }
728 
729 /*
730  * Polled console output putchar.
731  */
732 static void
733 zscnputc(dev, c)
734 	dev_t dev;
735 	int c;
736 {
737 	zs_putc(zs_conschan, c);
738 }
739 
740 /*****************************************************************/
741 
742 static void prom_cninit __P((struct consdev *));
743 static int  prom_cngetc __P((dev_t));
744 static void prom_cnputc __P((dev_t, int));
745 
746 /*
747  * The console is set to this one initially,
748  * which lets us use the PROM until consinit()
749  * is called to select a real console.
750  */
751 struct consdev consdev_prom = {
752 	nullcnprobe,
753 	prom_cninit,
754 	prom_cngetc,
755 	prom_cnputc,
756 	nullcnpollc,
757 };
758 
759 /*
760  * The console table pointer is statically initialized
761  * to point to the PROM (output only) table, so that
762  * early calls to printf will work.
763  */
764 struct consdev *cn_tab = &consdev_prom;
765 
766 void
767 nullcnprobe(cn)
768 	struct consdev *cn;
769 {
770 }
771 
772 static void
773 prom_cninit(cn)
774 	struct consdev *cn;
775 {
776 }
777 
778 /*
779  * PROM console input putchar.
780  * (dummy - this is output only)
781  */
782 static int
783 prom_cngetc(dev)
784 	dev_t dev;
785 {
786 	return (0);
787 }
788 
789 /*
790  * PROM console output putchar.
791  */
792 static void
793 prom_cnputc(dev, c)
794 	dev_t dev;
795 	int c;
796 {
797 	(*romVectorPtr->putChar)(c & 0x7f);
798 }
799 
800 /*****************************************************************/
801 
802 extern struct consdev consdev_kd;
803 
804 static struct {
805 	int zs_unit, channel;
806 } zstty_conf[NZS*2] = {
807 	/* XXX: knowledge from the config file here... */
808 	{ 1, 0 },	/* ttya */
809 	{ 1, 1 },	/* ttyb */
810 	{ 0, 0 },	/* ttyc */
811 	{ 0, 1 },	/* ttyd */
812 };
813 
814 static char *prom_inSrc_name[] = {
815 	"keyboard/display",
816 	"ttya", "ttyb",
817 	"ttyc", "ttyd" };
818 
819 /*
820  * This function replaces sys/dev/cninit.c
821  * Determine which device is the console using
822  * the PROM "input source" and "output sink".
823  */
824 void
825 cninit()
826 {
827 	struct sunromvec *v;
828 	struct zschan *zc;
829 	struct consdev *cn;
830 	int channel, zs_unit, zstty_unit;
831 	u_char inSource, outSink;
832 	extern const struct cdevsw zstty_cdevsw;
833 
834 	/* Get the zs driver ready for console duty. */
835 	zs_init();
836 
837 	v = romVectorPtr;
838 	inSource = *v->inSource;
839 	outSink  = *v->outSink;
840 	if (inSource != outSink) {
841 		mon_printf("cninit: mismatched PROM output selector\n");
842 	}
843 
844 	switch (inSource) {
845 	default:
846 		mon_printf("cninit: invalid inSource=%d\n", inSource);
847 		sunmon_abort();
848 		inSource = 0;
849 		/* fall through */
850 
851 	case 0:	/* keyboard/display */
852 #if NKBD > 0
853 		zs_unit = 0;
854 		channel = 0;
855 		cn = &consdev_kd;
856 		/* Set cn_dev, cn_pri in kd.c */
857 		break;
858 #else	/* NKBD */
859 		mon_printf("cninit: kdb/display not configured\n");
860 		sunmon_abort();
861 		inSource = 1;
862 		/* fall through */
863 #endif	/* NKBD */
864 
865 	case 1:	/* ttya */
866 	case 2:	/* ttyb */
867 	case 3:	/* ttyc (rewired keyboard connector) */
868 	case 4:	/* ttyd (rewired mouse connector)   */
869 		zstty_unit = inSource - 1;
870 		zs_unit = zstty_conf[zstty_unit].zs_unit;
871 		channel = zstty_conf[zstty_unit].channel;
872 		cn = &consdev_tty;
873 		cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw),
874 				     zstty_unit);
875 		cn->cn_pri = CN_REMOTE;
876 		break;
877 
878 	}
879 	/* Now that inSource has been validated, print it. */
880 	mon_printf("console is %s\n", prom_inSrc_name[inSource]);
881 
882 	zc = zs_get_chan_addr(zs_unit, channel);
883 	if (zc == NULL) {
884 		mon_printf("cninit: zs not mapped.\n");
885 		return;
886 	}
887 	zs_conschan = zc;
888 	zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE;
889 	cn_tab = cn;
890 	(*cn->cn_init)(cn);
891 #ifdef	KGDB
892 	zs_kgdb_init();
893 #endif
894 }
895