xref: /netbsd/sys/arch/sun68k/include/psl.h (revision bf9ec67e)
1 /*	$NetBSD: psl.h,v 1.2 2001/06/27 02:51:45 fredette Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Gordon W. Ross.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #ifndef _SUN68K_PSL_H_
40 #define	_SUN68K_PSL_H_
41 
42 #include <m68k/psl.h>
43 
44 /* Could define this in the common <m68k/psl.h> instead. */
45 
46 #if defined(_KERNEL) && !defined(_LOCORE)
47 
48 /*
49  * Define inline functions for PSL manipulation.
50  * These are as close to macros as one can get.
51  * When not optimizing gcc will call the locore.s
52  * functions by the same names, so breakpoints on
53  * these functions will work normally, etc.
54  * (See the GCC extensions info document.)
55  */
56 
57 static __inline int _getsr __P((void));
58 
59 /* Get current sr value. */
60 static __inline int
61 _getsr(void)
62 {
63 	register int rv;
64 
65 	__asm __volatile ("clrl %0; movew %%sr,%0" : "=&d" (rv));
66 	return (rv);
67 }
68 
69 /*
70  * The rest of this is sun68k specific, because other ports may
71  * need to do special things in spl0() (i.e. simulate SIR).
72  * Suns have a REAL interrupt register, so spl0() and splx(s)
73  * have no need to check for any simulated interrupts, etc.
74  */
75 
76 #define spl0()  _spl0()		/* we have real software interrupts */
77 #define splx(x)	_spl(x)
78 
79 /* IPL used by soft interrupts: netintr(), softclock() */
80 #define	spllowersoftclock() spl1()
81 #define splsoftclock()  splraise1()
82 #define splsoftnet()    splraise1()
83 
84 /* Highest block device (strategy) IPL. */
85 #define splbio()        splraise2()
86 
87 /* Highest network interface IPL. */
88 #define splnet()        splraise3()
89 
90 /* Highest tty device IPL. */
91 #define spltty()        splraise4()
92 
93 /*
94  * Requirement: imp >= (highest network, tty, or disk IPL)
95  * This is used mostly in the VM code.
96  * Note that the VM code runs at spl7 during kernel
97  * initialization, and later at spl0, so we have to
98  * use splraise to avoid enabling interrupts early.
99  */
100 #define splvm()         _splraise(PSL_S|PSL_IPL4)
101 
102 /* Intersil or Am9513 clock hardware interrupts (hard-wired at 5) */
103 #define splclock()      splraise5()
104 #define splstatclock()  splclock()
105 
106 /* Zilog Serial hardware interrupts (hard-wired at 6) */
107 #define splzs()		spl6()
108 
109 /* Block out all interrupts (except NMI of course). */
110 #define splhigh()       spl7()
111 #define splsched()      spl7()
112 #define spllock()	spl7()
113 
114 /* This returns true iff the spl given is spl0. */
115 #define	is_spl0(s)	(((s) & PSL_IPL7) == 0)
116 
117 #endif	/* KERNEL && !_LOCORE */
118 #endif /* _SUN68K_PSL_H_ */
119