1*267f2993Schristos /* $NetBSD: bus.h,v 1.36 2021/01/23 19:38:08 christos Exp $ */
25232b66bSmatt
35232b66bSmatt /*-
42c4c690fSthorpej * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
55232b66bSmatt * All rights reserved.
65232b66bSmatt *
75232b66bSmatt * This code is derived from software contributed to The NetBSD Foundation
85232b66bSmatt * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
95232b66bSmatt * NASA Ames Research Center.
105232b66bSmatt *
115232b66bSmatt * Redistribution and use in source and binary forms, with or without
125232b66bSmatt * modification, are permitted provided that the following conditions
135232b66bSmatt * are met:
145232b66bSmatt * 1. Redistributions of source code must retain the above copyright
155232b66bSmatt * notice, this list of conditions and the following disclaimer.
165232b66bSmatt * 2. Redistributions in binary form must reproduce the above copyright
175232b66bSmatt * notice, this list of conditions and the following disclaimer in the
185232b66bSmatt * documentation and/or other materials provided with the distribution.
195232b66bSmatt *
205232b66bSmatt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
215232b66bSmatt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
225232b66bSmatt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
235232b66bSmatt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
245232b66bSmatt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
255232b66bSmatt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
265232b66bSmatt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
275232b66bSmatt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
285232b66bSmatt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
295232b66bSmatt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
305232b66bSmatt * POSSIBILITY OF SUCH DAMAGE.
315232b66bSmatt */
325232b66bSmatt
335232b66bSmatt /*
345232b66bSmatt * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
355232b66bSmatt * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
365232b66bSmatt *
375232b66bSmatt * Redistribution and use in source and binary forms, with or without
385232b66bSmatt * modification, are permitted provided that the following conditions
395232b66bSmatt * are met:
405232b66bSmatt * 1. Redistributions of source code must retain the above copyright
415232b66bSmatt * notice, this list of conditions and the following disclaimer.
425232b66bSmatt * 2. Redistributions in binary form must reproduce the above copyright
435232b66bSmatt * notice, this list of conditions and the following disclaimer in the
445232b66bSmatt * documentation and/or other materials provided with the distribution.
455232b66bSmatt * 3. All advertising materials mentioning features or use of this software
465232b66bSmatt * must display the following acknowledgement:
475232b66bSmatt * This product includes software developed by Christopher G. Demetriou
485232b66bSmatt * for the NetBSD Project.
495232b66bSmatt * 4. The name of the author may not be used to endorse or promote products
505232b66bSmatt * derived from this software without specific prior written permission
515232b66bSmatt *
525232b66bSmatt * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
535232b66bSmatt * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
545232b66bSmatt * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
555232b66bSmatt * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
565232b66bSmatt * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
575232b66bSmatt * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
585232b66bSmatt * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
595232b66bSmatt * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
605232b66bSmatt * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
615232b66bSmatt * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
625232b66bSmatt */
635232b66bSmatt
645232b66bSmatt #ifndef _VAX_BUS_H_
655232b66bSmatt #define _VAX_BUS_H_
665232b66bSmatt
675232b66bSmatt #ifdef BUS_SPACE_DEBUG
68aa1de89bSdrochner #include <sys/systm.h> /* for printf() prototype */
695232b66bSmatt /*
705232b66bSmatt * Macros for sanity-checking the aligned-ness of pointers passed to
715232b66bSmatt * bus space ops. These are not strictly necessary on the VAX, but
725232b66bSmatt * could lead to performance improvements, and help catch problems
735232b66bSmatt * with drivers that would creep up on other architectures.
745232b66bSmatt */
755232b66bSmatt #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \
765232b66bSmatt ((((u_long)(p)) & (sizeof(t)-1)) == 0)
775232b66bSmatt
785232b66bSmatt #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \
795232b66bSmatt ({ \
805232b66bSmatt if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \
815232b66bSmatt printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \
825232b66bSmatt d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \
835232b66bSmatt } \
845232b66bSmatt (void) 0; \
855232b66bSmatt })
8676fa1751Sdrochner
8776fa1751Sdrochner #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
885232b66bSmatt #else
895232b66bSmatt #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0
9076fa1751Sdrochner #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
915232b66bSmatt #endif /* BUS_SPACE_DEBUG */
925232b66bSmatt
935232b66bSmatt /*
945232b66bSmatt * Bus address and size types
955232b66bSmatt */
96dfba8166Smatt typedef paddr_t bus_addr_t;
97dfba8166Smatt typedef psize_t bus_size_t;
985232b66bSmatt
998a06b90dSskrll #define PRIxBUSADDR PRIxPADDR
1008a06b90dSskrll #define PRIxBUSSIZE PRIxPSIZE
1018a06b90dSskrll #define PRIuBUSSIZE PRIuPSIZE
1025232b66bSmatt /*
1035232b66bSmatt * Access methods for bus resources and address space.
1045232b66bSmatt */
105ad1db202Sragge typedef struct vax_bus_space *bus_space_tag_t;
106dfba8166Smatt typedef vaddr_t bus_space_handle_t;
1075232b66bSmatt
108ecd7c02bSmaya #define PRIxBSH PRIxVADDR
1098a06b90dSskrll
1105232b66bSmatt struct vax_bus_space {
1115232b66bSmatt /* cookie */
1125232b66bSmatt void *vbs_cookie;
1135232b66bSmatt
1145232b66bSmatt /* mapping/unmapping */
115dfba8166Smatt int (*vbs_map)(void *, bus_addr_t, bus_size_t, int,
116dfba8166Smatt bus_space_handle_t *, int);
117dfba8166Smatt void (*vbs_unmap)(void *, bus_space_handle_t, bus_size_t,
118dfba8166Smatt int);
119dfba8166Smatt int (*vbs_subregion)(void *, bus_space_handle_t, bus_size_t,
120dfba8166Smatt bus_size_t, bus_space_handle_t *);
1215232b66bSmatt
1225232b66bSmatt /* allocation/deallocation */
123dfba8166Smatt int (*vbs_alloc)(void *, bus_addr_t, bus_addr_t, bus_size_t,
124dfba8166Smatt bus_size_t, bus_size_t, int, bus_addr_t *,
125dfba8166Smatt bus_space_handle_t *);
126dfba8166Smatt void (*vbs_free)(void *, bus_space_handle_t, bus_size_t);
127482334faSragge /* mmap bus space for user */
128482334faSragge paddr_t (*vbs_mmap)(void *, bus_addr_t, off_t, int, int);
1295232b66bSmatt };
1305232b66bSmatt
1315232b66bSmatt /*
132dfba8166Smatt * int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
133dfba8166Smatt * bus_size_t size, int flags, bus_space_handle_t *bshp);
1345232b66bSmatt *
1355232b66bSmatt * Map a region of bus space.
1365232b66bSmatt */
1375232b66bSmatt
1385232b66bSmatt #define BUS_SPACE_MAP_CACHEABLE 0x01
1395232b66bSmatt #define BUS_SPACE_MAP_LINEAR 0x02
1408eb798e6Sdrochner #define BUS_SPACE_MAP_PREFETCHABLE 0x04
1415232b66bSmatt
1425232b66bSmatt #define bus_space_map(t, a, s, f, hp) \
1435232b66bSmatt (*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 1)
1445232b66bSmatt #define vax_bus_space_map_noacct(t, a, s, f, hp) \
1455232b66bSmatt (*(t)->vbs_map)((t)->vbs_cookie, (a), (s), (f), (hp), 0)
1465232b66bSmatt
1475232b66bSmatt /*
148dfba8166Smatt * int bus_space_unmap(bus_space_tag_t t,
149dfba8166Smatt * bus_space_handle_t bsh, bus_size_t size);
1505232b66bSmatt *
1515232b66bSmatt * Unmap a region of bus space.
1525232b66bSmatt */
1535232b66bSmatt
1545232b66bSmatt #define bus_space_unmap(t, h, s) \
1555232b66bSmatt (*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 1)
1565232b66bSmatt #define vax_bus_space_unmap_noacct(t, h, s) \
1575232b66bSmatt (*(t)->vbs_unmap)((t)->vbs_cookie, (h), (s), 0)
1585232b66bSmatt
1595232b66bSmatt /*
160dfba8166Smatt * int bus_space_subregion(bus_space_tag_t t,
1615232b66bSmatt * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
162dfba8166Smatt * bus_space_handle_t *nbshp);
1635232b66bSmatt *
1645232b66bSmatt * Get a new handle for a subregion of an already-mapped area of bus space.
1655232b66bSmatt */
1665232b66bSmatt
1675232b66bSmatt #define bus_space_subregion(t, h, o, s, nhp) \
1681de30b72Smatt (*(t)->vbs_subregion)((t)->vbs_cookie, (h), (o), (s), (nhp))
1695232b66bSmatt
1705232b66bSmatt /*
171dfba8166Smatt * int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart,
1725232b66bSmatt * bus_addr_t rend, bus_size_t size, bus_size_t align,
1735232b66bSmatt * bus_size_t boundary, int flags, bus_addr_t *addrp,
174dfba8166Smatt * bus_space_handle_t *bshp);
1755232b66bSmatt *
1765232b66bSmatt * Allocate a region of bus space.
1775232b66bSmatt */
1785232b66bSmatt
1795232b66bSmatt #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
1805232b66bSmatt (*(t)->vbs_alloc)((t)->vbs_cookie, (rs), (re), (s), (a), (b), \
1815232b66bSmatt (f), (ap), (hp))
1825232b66bSmatt
1835232b66bSmatt /*
184dfba8166Smatt * int bus_space_free(bus_space_tag_t t,
185dfba8166Smatt * bus_space_handle_t bsh, bus_size_t size);
1865232b66bSmatt *
1875232b66bSmatt * Free a region of bus space.
1885232b66bSmatt */
1895232b66bSmatt
1905232b66bSmatt #define bus_space_free(t, h, s) \
1915232b66bSmatt (*(t)->vbs_free)((t)->vbs_cookie, (h), (s))
192cfa7dcc1Smatt /*
193cfa7dcc1Smatt * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR.
194cfa7dcc1Smatt */
195cfa7dcc1Smatt #define bus_space_vaddr(t, h) \
196cfa7dcc1Smatt ((void *) (h))
1975232b66bSmatt /*
198482334faSragge * Mmap bus space for a user application.
199482334faSragge */
200482334faSragge #define bus_space_mmap(t, a, o, p, f) \
201482334faSragge (*(t)->vbs_mmap)((t)->vbs_cookie, (a), (o), (p), (f))
202482334faSragge
203482334faSragge
204482334faSragge /*
205dfba8166Smatt * u_intN_t bus_space_read_N(bus_space_tag_t tag,
206dfba8166Smatt * bus_space_handle_t bsh, bus_size_t offset);
2075232b66bSmatt *
2085232b66bSmatt * Read a 1, 2, 4, or 8 byte quantity from bus space
2095232b66bSmatt * described by tag/handle/offset.
2105232b66bSmatt */
2115232b66bSmatt
2125232b66bSmatt #define bus_space_read_1(t, h, o) \
21357460631Schristos (__USE(t), (*(volatile uint8_t *)((h) + (o))))
2145232b66bSmatt
2155232b66bSmatt #define bus_space_read_2(t, h, o) \
2160ae74058Smatt (__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"), \
21757460631Schristos __USE(t), (*(volatile uint16_t *)((h) + (o))))
2185232b66bSmatt
2195232b66bSmatt #define bus_space_read_4(t, h, o) \
2200ae74058Smatt (__BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"), \
22157460631Schristos __USE(t), (*(volatile uint32_t *)((h) + (o))))
2225232b66bSmatt
2235232b66bSmatt /*
224dfba8166Smatt * void bus_space_read_multi_N(bus_space_tag_t tag,
2255232b66bSmatt * bus_space_handle_t bsh, bus_size_t offset,
226dfba8166Smatt * u_intN_t *addr, size_t count);
2275232b66bSmatt *
2285232b66bSmatt * Read `count' 1, 2, 4, or 8 byte quantities from bus space
2295232b66bSmatt * described by tag/handle/offset and copy into buffer provided.
2305232b66bSmatt */
231dfba8166Smatt static __inline void
232dfba8166Smatt vax_mem_read_multi_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
233dfba8166Smatt uint8_t *, size_t),
234dfba8166Smatt vax_mem_read_multi_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
235dfba8166Smatt uint16_t *, size_t),
236dfba8166Smatt vax_mem_read_multi_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
237dfba8166Smatt uint32_t *, size_t);
2385232b66bSmatt
2395232b66bSmatt #define bus_space_read_multi_1(t, h, o, a, c) \
2405232b66bSmatt vax_mem_read_multi_1((t), (h), (o), (a), (c))
2415232b66bSmatt
2425232b66bSmatt #define bus_space_read_multi_2(t, h, o, a, c) \
2435232b66bSmatt do { \
2440ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer"); \
2450ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \
2465232b66bSmatt vax_mem_read_multi_2((t), (h), (o), (a), (c)); \
2475232b66bSmatt } while (0)
2485232b66bSmatt
2495232b66bSmatt #define bus_space_read_multi_4(t, h, o, a, c) \
2505232b66bSmatt do { \
2510ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer"); \
2520ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \
2535232b66bSmatt vax_mem_read_multi_4((t), (h), (o), (a), (c)); \
2545232b66bSmatt } while (0)
2555232b66bSmatt
256fbae48b9Sperry static __inline void
vax_mem_read_multi_1(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,uint8_t * a,size_t c)257dfba8166Smatt vax_mem_read_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
258dfba8166Smatt uint8_t *a, size_t c)
2595232b66bSmatt {
2605232b66bSmatt const bus_addr_t addr = h + o;
2615232b66bSmatt
2625232b66bSmatt for (; c != 0; c--, a++)
2630ae74058Smatt *a = *(volatile uint8_t *)(addr);
2645232b66bSmatt }
2655232b66bSmatt
266fbae48b9Sperry static __inline void
vax_mem_read_multi_2(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,uint16_t * a,size_t c)267dfba8166Smatt vax_mem_read_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
268dfba8166Smatt uint16_t *a, size_t c)
2695232b66bSmatt {
2705232b66bSmatt const bus_addr_t addr = h + o;
2715232b66bSmatt
2725232b66bSmatt for (; c != 0; c--, a++)
2730ae74058Smatt *a = *(volatile uint16_t *)(addr);
2745232b66bSmatt }
2755232b66bSmatt
276fbae48b9Sperry static __inline void
vax_mem_read_multi_4(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,uint32_t * a,size_t c)277dfba8166Smatt vax_mem_read_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
278dfba8166Smatt uint32_t *a, size_t c)
2795232b66bSmatt {
2805232b66bSmatt const bus_addr_t addr = h + o;
2815232b66bSmatt
2825232b66bSmatt for (; c != 0; c--, a++)
2830ae74058Smatt *a = *(volatile uint32_t *)(addr);
2845232b66bSmatt }
2855232b66bSmatt
2865232b66bSmatt /*
287dfba8166Smatt * void bus_space_read_region_N(bus_space_tag_t tag,
2885232b66bSmatt * bus_space_handle_t bsh, bus_size_t offset,
289dfba8166Smatt * u_intN_t *addr, size_t count);
2905232b66bSmatt *
2915232b66bSmatt * Read `count' 1, 2, 4, or 8 byte quantities from bus space
2925232b66bSmatt * described by tag/handle and starting at `offset' and copy into
2935232b66bSmatt * buffer provided.
2945232b66bSmatt */
2955232b66bSmatt
296dfba8166Smatt static __inline void vax_mem_read_region_1(bus_space_tag_t,
297dfba8166Smatt bus_space_handle_t, bus_size_t, uint8_t *, size_t);
298dfba8166Smatt static __inline void vax_mem_read_region_2(bus_space_tag_t,
299dfba8166Smatt bus_space_handle_t, bus_size_t, uint16_t *, size_t);
300dfba8166Smatt static __inline void vax_mem_read_region_4(bus_space_tag_t,
301dfba8166Smatt bus_space_handle_t, bus_size_t, uint32_t *, size_t);
3025232b66bSmatt
3035232b66bSmatt #define bus_space_read_region_1(t, h, o, a, c) \
3045232b66bSmatt do { \
3055232b66bSmatt vax_mem_read_region_1((t), (h), (o), (a), (c)); \
3065232b66bSmatt } while (0)
3075232b66bSmatt
3085232b66bSmatt #define bus_space_read_region_2(t, h, o, a, c) \
3095232b66bSmatt do { \
3100ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer"); \
3110ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \
3125232b66bSmatt vax_mem_read_region_2((t), (h), (o), (a), (c)); \
3135232b66bSmatt } while (0)
3145232b66bSmatt
3155232b66bSmatt #define bus_space_read_region_4(t, h, o, a, c) \
3165232b66bSmatt do { \
3170ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer"); \
3180ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \
3195232b66bSmatt vax_mem_read_region_4((t), (h), (o), (a), (c)); \
3205232b66bSmatt } while (0)
3215232b66bSmatt
322fbae48b9Sperry static __inline void
vax_mem_read_region_1(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,uint8_t * a,size_t c)323dfba8166Smatt vax_mem_read_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
324dfba8166Smatt uint8_t *a, size_t c)
3255232b66bSmatt {
3265232b66bSmatt bus_addr_t addr = h + o;
3275232b66bSmatt
3285232b66bSmatt for (; c != 0; c--, addr++, a++)
3290ae74058Smatt *a = *(volatile uint8_t *)(addr);
3305232b66bSmatt }
3315232b66bSmatt
332fbae48b9Sperry static __inline void
vax_mem_read_region_2(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,uint16_t * a,size_t c)333dfba8166Smatt vax_mem_read_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
334dfba8166Smatt uint16_t *a, size_t c)
3355232b66bSmatt {
3365232b66bSmatt bus_addr_t addr = h + o;
3375232b66bSmatt
338f1b859f0Sragge for (; c != 0; c--, addr += 2, a++)
3390ae74058Smatt *a = *(volatile uint16_t *)(addr);
3405232b66bSmatt }
3415232b66bSmatt
342fbae48b9Sperry static __inline void
vax_mem_read_region_4(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,uint32_t * a,size_t c)343dfba8166Smatt vax_mem_read_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
344dfba8166Smatt uint32_t *a, size_t c)
3455232b66bSmatt {
3465232b66bSmatt bus_addr_t addr = h + o;
3475232b66bSmatt
348f1b859f0Sragge for (; c != 0; c--, addr += 4, a++)
3490ae74058Smatt *a = *(volatile uint32_t *)(addr);
3505232b66bSmatt }
3515232b66bSmatt
3525232b66bSmatt /*
353dfba8166Smatt * void bus_space_write_N(bus_space_tag_t tag,
3545232b66bSmatt * bus_space_handle_t bsh, bus_size_t offset,
355dfba8166Smatt * u_intN_t value);
3565232b66bSmatt *
3575232b66bSmatt * Write the 1, 2, 4, or 8 byte value `value' to bus space
3585232b66bSmatt * described by tag/handle/offset.
3595232b66bSmatt */
3605232b66bSmatt
3615232b66bSmatt #define bus_space_write_1(t, h, o, v) \
3625232b66bSmatt do { \
36357460631Schristos __USE(t); \
3640ae74058Smatt ((void)(*(volatile uint8_t *)((h) + (o)) = (v))); \
3655232b66bSmatt } while (0)
3665232b66bSmatt
3675232b66bSmatt #define bus_space_write_2(t, h, o, v) \
3685232b66bSmatt do { \
3690ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \
37057460631Schristos __USE(t); \
3710ae74058Smatt ((void)(*(volatile uint16_t *)((h) + (o)) = (v))); \
3725232b66bSmatt } while (0)
3735232b66bSmatt
3745232b66bSmatt #define bus_space_write_4(t, h, o, v) \
3755232b66bSmatt do { \
3760ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \
37757460631Schristos __USE(t); \
3780ae74058Smatt ((void)(*(volatile uint32_t *)((h) + (o)) = (v))); \
3795232b66bSmatt } while (0)
3805232b66bSmatt
3815232b66bSmatt /*
382dfba8166Smatt * void bus_space_write_multi_N(bus_space_tag_t tag,
3835232b66bSmatt * bus_space_handle_t bsh, bus_size_t offset,
384dfba8166Smatt * const u_intN_t *addr, size_t count);
3855232b66bSmatt *
3865232b66bSmatt * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
3875232b66bSmatt * provided to bus space described by tag/handle/offset.
3885232b66bSmatt */
389dfba8166Smatt static __inline void
390dfba8166Smatt vax_mem_write_multi_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
391dfba8166Smatt const uint8_t *, size_t),
392dfba8166Smatt vax_mem_write_multi_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
393dfba8166Smatt const uint16_t *, size_t),
394dfba8166Smatt vax_mem_write_multi_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
395dfba8166Smatt const uint32_t *, size_t);
3965232b66bSmatt
3975232b66bSmatt #define bus_space_write_multi_1(t, h, o, a, c) \
3985232b66bSmatt do { \
3995232b66bSmatt vax_mem_write_multi_1((t), (h), (o), (a), (c)); \
4005232b66bSmatt } while (0)
4015232b66bSmatt
4025232b66bSmatt #define bus_space_write_multi_2(t, h, o, a, c) \
4035232b66bSmatt do { \
4040ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer"); \
4050ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \
4065232b66bSmatt vax_mem_write_multi_2((t), (h), (o), (a), (c)); \
4075232b66bSmatt } while (0)
4085232b66bSmatt
4095232b66bSmatt #define bus_space_write_multi_4(t, h, o, a, c) \
4105232b66bSmatt do { \
4110ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer"); \
4120ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \
4135232b66bSmatt vax_mem_write_multi_4((t), (h), (o), (a), (c)); \
4145232b66bSmatt } while (0)
4155232b66bSmatt
416fbae48b9Sperry static __inline void
vax_mem_write_multi_1(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,const uint8_t * a,size_t c)417dfba8166Smatt vax_mem_write_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
418dfba8166Smatt const uint8_t *a, size_t c)
4195232b66bSmatt {
4205232b66bSmatt const bus_addr_t addr = h + o;
4215232b66bSmatt
4225232b66bSmatt for (; c != 0; c--, a++)
4230ae74058Smatt *(volatile uint8_t *)(addr) = *a;
4245232b66bSmatt }
4255232b66bSmatt
426fbae48b9Sperry static __inline void
vax_mem_write_multi_2(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,const uint16_t * a,size_t c)427dfba8166Smatt vax_mem_write_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
428dfba8166Smatt const uint16_t *a, size_t c)
4295232b66bSmatt {
4305232b66bSmatt const bus_addr_t addr = h + o;
4315232b66bSmatt
432832a061bSmatt for (; c != 0; c--, a++)
4330ae74058Smatt *(volatile uint16_t *)(addr) = *a;
4345232b66bSmatt }
4355232b66bSmatt
436fbae48b9Sperry static __inline void
vax_mem_write_multi_4(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,const uint32_t * a,size_t c)437dfba8166Smatt vax_mem_write_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
438dfba8166Smatt const uint32_t *a, size_t c)
4395232b66bSmatt {
4405232b66bSmatt const bus_addr_t addr = h + o;
4415232b66bSmatt
4425232b66bSmatt for (; c != 0; c--, a++)
4430ae74058Smatt *(volatile uint32_t *)(addr) = *a;
4445232b66bSmatt }
4455232b66bSmatt
4465232b66bSmatt /*
447dfba8166Smatt * void bus_space_write_region_N(bus_space_tag_t tag,
4485232b66bSmatt * bus_space_handle_t bsh, bus_size_t offset,
449dfba8166Smatt * const u_intN_t *addr, size_t count);
4505232b66bSmatt *
4515232b66bSmatt * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
4525232b66bSmatt * to bus space described by tag/handle starting at `offset'.
4535232b66bSmatt */
454dfba8166Smatt static __inline void
455dfba8166Smatt vax_mem_write_region_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
456dfba8166Smatt const uint8_t *, size_t),
457dfba8166Smatt vax_mem_write_region_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
458dfba8166Smatt const uint16_t *, size_t),
459dfba8166Smatt vax_mem_write_region_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
460dfba8166Smatt const uint32_t *, size_t);
4615232b66bSmatt
4625232b66bSmatt #define bus_space_write_region_1(t, h, o, a, c) \
4635232b66bSmatt vax_mem_write_region_1((t), (h), (o), (a), (c))
4645232b66bSmatt
4655232b66bSmatt #define bus_space_write_region_2(t, h, o, a, c) \
4665232b66bSmatt do { \
4670ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((a), uint16_t, "buffer"); \
4680ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \
4695232b66bSmatt vax_mem_write_region_2((t), (h), (o), (a), (c)); \
4705232b66bSmatt } while (0)
4715232b66bSmatt
4725232b66bSmatt #define bus_space_write_region_4(t, h, o, a, c) \
4735232b66bSmatt do { \
4740ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((a), uint32_t, "buffer"); \
4750ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \
4765232b66bSmatt vax_mem_write_region_4((t), (h), (o), (a), (c)); \
4775232b66bSmatt } while (0)
4785232b66bSmatt
479fbae48b9Sperry static __inline void
vax_mem_write_region_1(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,const uint8_t * a,size_t c)480dfba8166Smatt vax_mem_write_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
481dfba8166Smatt const uint8_t *a, size_t c)
4825232b66bSmatt {
4835232b66bSmatt bus_addr_t addr = h + o;
4845232b66bSmatt
4855232b66bSmatt for (; c != 0; c--, addr++, a++)
4860ae74058Smatt *(volatile uint8_t *)(addr) = *a;
4875232b66bSmatt }
4885232b66bSmatt
489fbae48b9Sperry static __inline void
vax_mem_write_region_2(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,const uint16_t * a,size_t c)490dfba8166Smatt vax_mem_write_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
491dfba8166Smatt const uint16_t *a, size_t c)
4925232b66bSmatt {
4935232b66bSmatt bus_addr_t addr = h + o;
4945232b66bSmatt
4955232b66bSmatt for (; c != 0; c--, addr++, a++)
4960ae74058Smatt *(volatile uint16_t *)(addr) = *a;
4975232b66bSmatt }
4985232b66bSmatt
499fbae48b9Sperry static __inline void
vax_mem_write_region_4(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,const uint32_t * a,size_t c)500dfba8166Smatt vax_mem_write_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
501dfba8166Smatt const uint32_t *a, size_t c)
5025232b66bSmatt {
5035232b66bSmatt bus_addr_t addr = h + o;
5045232b66bSmatt
5055232b66bSmatt for (; c != 0; c--, addr++, a++)
5060ae74058Smatt *(volatile uint32_t *)(addr) = *a;
5075232b66bSmatt }
5085232b66bSmatt
5095232b66bSmatt /*
510dfba8166Smatt * void bus_space_set_multi_N(bus_space_tag_t tag,
5115232b66bSmatt * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
512dfba8166Smatt * size_t count);
5135232b66bSmatt *
5145232b66bSmatt * Write the 1, 2, 4, or 8 byte value `val' to bus space described
5155232b66bSmatt * by tag/handle/offset `count' times.
5165232b66bSmatt */
5175232b66bSmatt
518dfba8166Smatt static __inline void
519dfba8166Smatt vax_mem_set_multi_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
520dfba8166Smatt uint8_t, size_t),
521dfba8166Smatt vax_mem_set_multi_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
522dfba8166Smatt uint16_t, size_t),
523dfba8166Smatt vax_mem_set_multi_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
524dfba8166Smatt uint32_t, size_t);
5255232b66bSmatt
5265232b66bSmatt #define bus_space_set_multi_1(t, h, o, v, c) \
5275232b66bSmatt vax_mem_set_multi_1((t), (h), (o), (v), (c))
5285232b66bSmatt
5295232b66bSmatt #define bus_space_set_multi_2(t, h, o, v, c) \
5305232b66bSmatt do { \
5310ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \
5325232b66bSmatt vax_mem_set_multi_2((t), (h), (o), (v), (c)); \
5335232b66bSmatt } while (0)
5345232b66bSmatt
5355232b66bSmatt #define bus_space_set_multi_4(t, h, o, v, c) \
5365232b66bSmatt do { \
5370ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \
5385232b66bSmatt vax_mem_set_multi_4((t), (h), (o), (v), (c)); \
5395232b66bSmatt } while (0)
5405232b66bSmatt
541fbae48b9Sperry static __inline void
vax_mem_set_multi_1(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,uint8_t v,size_t c)542dfba8166Smatt vax_mem_set_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
543dfba8166Smatt uint8_t v, size_t c)
5445232b66bSmatt {
5455232b66bSmatt bus_addr_t addr = h + o;
5465232b66bSmatt
5475232b66bSmatt while (c--)
5480ae74058Smatt *(volatile uint8_t *)(addr) = v;
5495232b66bSmatt }
5505232b66bSmatt
551fbae48b9Sperry static __inline void
vax_mem_set_multi_2(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,uint16_t v,size_t c)552dfba8166Smatt vax_mem_set_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
553dfba8166Smatt uint16_t v, size_t c)
5545232b66bSmatt {
5555232b66bSmatt bus_addr_t addr = h + o;
5565232b66bSmatt
5575232b66bSmatt while (c--)
5580ae74058Smatt *(volatile uint16_t *)(addr) = v;
5595232b66bSmatt }
5605232b66bSmatt
561fbae48b9Sperry static __inline void
vax_mem_set_multi_4(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,uint32_t v,size_t c)562dfba8166Smatt vax_mem_set_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
563dfba8166Smatt uint32_t v, size_t c)
5645232b66bSmatt {
5655232b66bSmatt bus_addr_t addr = h + o;
5665232b66bSmatt
5675232b66bSmatt while (c--)
5680ae74058Smatt *(volatile uint32_t *)(addr) = v;
5695232b66bSmatt }
5705232b66bSmatt
5715232b66bSmatt /*
572dfba8166Smatt * void bus_space_set_region_N(bus_space_tag_t tag,
5735232b66bSmatt * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
574dfba8166Smatt * size_t count);
5755232b66bSmatt *
5765232b66bSmatt * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
5775232b66bSmatt * by tag/handle starting at `offset'.
5785232b66bSmatt */
5795232b66bSmatt
580dfba8166Smatt static __inline void
581dfba8166Smatt vax_mem_set_region_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
582dfba8166Smatt uint8_t, size_t),
583dfba8166Smatt vax_mem_set_region_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
584dfba8166Smatt uint16_t, size_t),
585dfba8166Smatt vax_mem_set_region_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
586dfba8166Smatt uint32_t, size_t);
5875232b66bSmatt
5885232b66bSmatt #define bus_space_set_region_1(t, h, o, v, c) \
5895232b66bSmatt vax_mem_set_region_1((t), (h), (o), (v), (c))
5905232b66bSmatt
5915232b66bSmatt #define bus_space_set_region_2(t, h, o, v, c) \
5925232b66bSmatt do { \
5930ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint16_t, "bus addr"); \
5945232b66bSmatt vax_mem_set_region_2((t), (h), (o), (v), (c)); \
5955232b66bSmatt } while (0)
5965232b66bSmatt
5975232b66bSmatt #define bus_space_set_region_4(t, h, o, v, c) \
5985232b66bSmatt do { \
5990ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h) + (o), uint32_t, "bus addr"); \
6005232b66bSmatt vax_mem_set_region_4((t), (h), (o), (v), (c)); \
6015232b66bSmatt } while (0)
6025232b66bSmatt
603fbae48b9Sperry static __inline void
vax_mem_set_region_1(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,uint8_t v,size_t c)604dfba8166Smatt vax_mem_set_region_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
605dfba8166Smatt uint8_t v, size_t c)
6065232b66bSmatt {
6075232b66bSmatt bus_addr_t addr = h + o;
6085232b66bSmatt
6095232b66bSmatt for (; c != 0; c--, addr++)
6100ae74058Smatt *(volatile uint8_t *)(addr) = v;
6115232b66bSmatt }
6125232b66bSmatt
613fbae48b9Sperry static __inline void
vax_mem_set_region_2(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,uint16_t v,size_t c)614dfba8166Smatt vax_mem_set_region_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
615dfba8166Smatt uint16_t v, size_t c)
6165232b66bSmatt {
6175232b66bSmatt bus_addr_t addr = h + o;
6185232b66bSmatt
6195232b66bSmatt for (; c != 0; c--, addr += 2)
6200ae74058Smatt *(volatile uint16_t *)(addr) = v;
6215232b66bSmatt }
6225232b66bSmatt
623fbae48b9Sperry static __inline void
vax_mem_set_region_4(bus_space_tag_t t,bus_space_handle_t h,bus_size_t o,uint32_t v,size_t c)624dfba8166Smatt vax_mem_set_region_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
625dfba8166Smatt uint32_t v, size_t c)
6265232b66bSmatt {
6275232b66bSmatt bus_addr_t addr = h + o;
6285232b66bSmatt
6295232b66bSmatt for (; c != 0; c--, addr += 4)
6300ae74058Smatt *(volatile uint32_t *)(addr) = v;
6315232b66bSmatt }
6325232b66bSmatt
6335232b66bSmatt /*
634dfba8166Smatt * void bus_space_copy_region_N(bus_space_tag_t tag,
6355232b66bSmatt * bus_space_handle_t bsh1, bus_size_t off1,
6365232b66bSmatt * bus_space_handle_t bsh2, bus_size_t off2,
637dfba8166Smatt * size_t count);
6385232b66bSmatt *
6395232b66bSmatt * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
6405232b66bSmatt * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
6415232b66bSmatt */
6425232b66bSmatt
643dfba8166Smatt static __inline void
644dfba8166Smatt vax_mem_copy_region_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
645dfba8166Smatt bus_space_handle_t, bus_size_t, size_t),
646dfba8166Smatt vax_mem_copy_region_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
647dfba8166Smatt bus_space_handle_t, bus_size_t, size_t),
648dfba8166Smatt vax_mem_copy_region_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
649dfba8166Smatt bus_space_handle_t, bus_size_t, size_t);
6505232b66bSmatt
6515232b66bSmatt #define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \
6525232b66bSmatt vax_mem_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
6535232b66bSmatt
6545232b66bSmatt #define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \
6555232b66bSmatt do { \
6560ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), uint16_t, "bus addr 1"); \
6570ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), uint16_t, "bus addr 2"); \
6585232b66bSmatt vax_mem_copy_region_2((t), (h1), (o1), (h2), (o2), (c)); \
6595232b66bSmatt } while (0)
6605232b66bSmatt
6615232b66bSmatt #define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \
6625232b66bSmatt do { \
6630ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), uint32_t, "bus addr 1"); \
6640ae74058Smatt __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), uint32_t, "bus addr 2"); \
6655232b66bSmatt vax_mem_copy_region_4((t), (h1), (o1), (h2), (o2), (c)); \
6665232b66bSmatt } while (0)
6675232b66bSmatt
668fbae48b9Sperry static __inline void
vax_mem_copy_region_1(bus_space_tag_t t,bus_space_handle_t h1,bus_size_t o1,bus_space_handle_t h2,bus_size_t o2,size_t c)669dfba8166Smatt vax_mem_copy_region_1(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1,
670dfba8166Smatt bus_space_handle_t h2, bus_size_t o2, size_t c)
6715232b66bSmatt {
6725232b66bSmatt bus_addr_t addr1 = h1 + o1;
6735232b66bSmatt bus_addr_t addr2 = h2 + o2;
6745232b66bSmatt
6755232b66bSmatt if (addr1 >= addr2) {
6765232b66bSmatt /* src after dest: copy forward */
6775232b66bSmatt for (; c != 0; c--, addr1++, addr2++)
6780ae74058Smatt *(volatile uint8_t *)(addr2) =
6790ae74058Smatt *(volatile uint8_t *)(addr1);
6805232b66bSmatt } else {
6815232b66bSmatt /* dest after src: copy backwards */
6825232b66bSmatt for (addr1 += (c - 1), addr2 += (c - 1);
6835232b66bSmatt c != 0; c--, addr1--, addr2--)
6840ae74058Smatt *(volatile uint8_t *)(addr2) =
6850ae74058Smatt *(volatile uint8_t *)(addr1);
6865232b66bSmatt }
6875232b66bSmatt }
6885232b66bSmatt
689fbae48b9Sperry static __inline void
vax_mem_copy_region_2(bus_space_tag_t t,bus_space_handle_t h1,bus_size_t o1,bus_space_handle_t h2,bus_size_t o2,size_t c)690dfba8166Smatt vax_mem_copy_region_2(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1,
691dfba8166Smatt bus_space_handle_t h2, bus_size_t o2, size_t c)
6925232b66bSmatt {
6935232b66bSmatt bus_addr_t addr1 = h1 + o1;
6945232b66bSmatt bus_addr_t addr2 = h2 + o2;
6955232b66bSmatt
6965232b66bSmatt if (addr1 >= addr2) {
6975232b66bSmatt /* src after dest: copy forward */
6985232b66bSmatt for (; c != 0; c--, addr1 += 2, addr2 += 2)
6990ae74058Smatt *(volatile uint16_t *)(addr2) =
7000ae74058Smatt *(volatile uint16_t *)(addr1);
7015232b66bSmatt } else {
7025232b66bSmatt /* dest after src: copy backwards */
7035232b66bSmatt for (addr1 += 2 * (c - 1), addr2 += 2 * (c - 1);
7045232b66bSmatt c != 0; c--, addr1 -= 2, addr2 -= 2)
7050ae74058Smatt *(volatile uint16_t *)(addr2) =
7060ae74058Smatt *(volatile uint16_t *)(addr1);
7075232b66bSmatt }
7085232b66bSmatt }
7095232b66bSmatt
710fbae48b9Sperry static __inline void
vax_mem_copy_region_4(bus_space_tag_t t,bus_space_handle_t h1,bus_size_t o1,bus_space_handle_t h2,bus_size_t o2,size_t c)711dfba8166Smatt vax_mem_copy_region_4(bus_space_tag_t t, bus_space_handle_t h1, bus_size_t o1,
712dfba8166Smatt bus_space_handle_t h2, bus_size_t o2, size_t c)
7135232b66bSmatt {
7145232b66bSmatt bus_addr_t addr1 = h1 + o1;
7155232b66bSmatt bus_addr_t addr2 = h2 + o2;
7165232b66bSmatt
7175232b66bSmatt if (addr1 >= addr2) {
7185232b66bSmatt /* src after dest: copy forward */
7195232b66bSmatt for (; c != 0; c--, addr1 += 4, addr2 += 4)
7200ae74058Smatt *(volatile uint32_t *)(addr2) =
7210ae74058Smatt *(volatile uint32_t *)(addr1);
7225232b66bSmatt } else {
7235232b66bSmatt /* dest after src: copy backwards */
7245232b66bSmatt for (addr1 += 4 * (c - 1), addr2 += 4 * (c - 1);
7255232b66bSmatt c != 0; c--, addr1 -= 4, addr2 -= 4)
7260ae74058Smatt *(volatile uint32_t *)(addr2) =
7270ae74058Smatt *(volatile uint32_t *)(addr1);
7285232b66bSmatt }
7295232b66bSmatt }
7305232b66bSmatt
7315232b66bSmatt
7325232b66bSmatt /*
7335232b66bSmatt * Bus read/write barrier methods.
7345232b66bSmatt *
735dfba8166Smatt * void bus_space_barrier(bus_space_tag_t tag,
7365232b66bSmatt * bus_space_handle_t bsh, bus_size_t offset,
737dfba8166Smatt * bus_size_t len, int flags);
7385232b66bSmatt *
7395232b66bSmatt * Note: the vax does not currently require barriers, but we must
7405232b66bSmatt * provide the flags to MI code.
7415232b66bSmatt */
7425232b66bSmatt #define bus_space_barrier(t, h, o, l, f) \
7435232b66bSmatt ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
7445232b66bSmatt #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
7455232b66bSmatt #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
7465232b66bSmatt
7475232b66bSmatt
7485232b66bSmatt /*
7495232b66bSmatt * Flags used in various bus DMA methods.
7505232b66bSmatt */
751babefc53Sthorpej #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
752babefc53Sthorpej #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
753babefc53Sthorpej #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
754babefc53Sthorpej #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
755babefc53Sthorpej #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
756babefc53Sthorpej #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
757babefc53Sthorpej #define BUS_DMA_BUS2 0x020
758babefc53Sthorpej #define BUS_DMA_BUS3 0x040
759babefc53Sthorpej #define BUS_DMA_BUS4 0x080
760babefc53Sthorpej #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
761babefc53Sthorpej #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
762cd7d9faeSkent #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
7635232b66bSmatt
7649434b7b1Smatt #define VAX_BUS_DMA_SPILLPAGE BUS_DMA_BUS1 /* VS4000 kludge */
765f6d61fb6Sragge /*
766f6d61fb6Sragge * Private flags stored in the DMA map.
767f6d61fb6Sragge */
768f6d61fb6Sragge #define DMAMAP_HAS_SGMAP 0x80000000 /* sgva/len are valid */
769f6d61fb6Sragge
7705232b66bSmatt /* Forwards needed by prototypes below. */
7715232b66bSmatt struct mbuf;
7725232b66bSmatt struct uio;
7735232b66bSmatt struct vax_sgmap;
7745232b66bSmatt
7755232b66bSmatt /*
7765232b66bSmatt * Operations performed by bus_dmamap_sync().
7775232b66bSmatt */
7785232b66bSmatt #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
7795232b66bSmatt #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
7805232b66bSmatt #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
7815232b66bSmatt #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
7825232b66bSmatt
7835232b66bSmatt /*
7845232b66bSmatt * vax_bus_t
7855232b66bSmatt *
7865232b66bSmatt * Busses supported by NetBSD/vax, used by internal
7875232b66bSmatt * utility functions. NOT TO BE USED BY MACHINE-INDEPENDENT
7885232b66bSmatt * CODE!
7895232b66bSmatt */
7905232b66bSmatt typedef enum {
7915232b66bSmatt VAX_BUS_MAINBUS,
7925232b66bSmatt VAX_BUS_SBI,
7935232b66bSmatt VAX_BUS_MASSBUS,
7945232b66bSmatt VAX_BUS_UNIBUS, /* Also handles QBUS */
7955232b66bSmatt VAX_BUS_BI,
7965232b66bSmatt VAX_BUS_XMI,
7975232b66bSmatt VAX_BUS_TURBOCHANNEL
7985232b66bSmatt } vax_bus_t;
7995232b66bSmatt
8005232b66bSmatt typedef struct vax_bus_dma_tag *bus_dma_tag_t;
8015232b66bSmatt typedef struct vax_bus_dmamap *bus_dmamap_t;
8025232b66bSmatt
8037dd7f8baSfvdl #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
8047dd7f8baSfvdl
8055232b66bSmatt /*
8065232b66bSmatt * bus_dma_segment_t
8075232b66bSmatt *
8085232b66bSmatt * Describes a single contiguous DMA transaction. Values
8095232b66bSmatt * are suitable for programming into DMA registers.
8105232b66bSmatt */
8115232b66bSmatt struct vax_bus_dma_segment {
8125232b66bSmatt bus_addr_t ds_addr; /* DMA address */
8135232b66bSmatt bus_size_t ds_len; /* length of transfer */
8145232b66bSmatt };
8155232b66bSmatt typedef struct vax_bus_dma_segment bus_dma_segment_t;
8165232b66bSmatt
817c4611903Sragge struct proc;
818c4611903Sragge
8195232b66bSmatt /*
8205232b66bSmatt * bus_dma_tag_t
8215232b66bSmatt *
8225232b66bSmatt * A machine-dependent opaque type describing the implementation of
8235232b66bSmatt * DMA for a given bus.
8245232b66bSmatt */
8255232b66bSmatt struct vax_bus_dma_tag {
8265232b66bSmatt void *_cookie; /* cookie used in the guts */
8275232b66bSmatt bus_addr_t _wbase; /* DMA window base */
8285232b66bSmatt bus_size_t _wsize; /* DMA window size */
8295232b66bSmatt
8305232b66bSmatt /*
8315232b66bSmatt * Some chipsets have a built-in boundary constraint, independent
8325232b66bSmatt * of what the device requests. This allows that boundary to
833e2eaa3b8Swiz * be specified. If the device has a more restrictive constraint,
8345232b66bSmatt * the map will use that, otherwise this boundary will be used.
8355232b66bSmatt * This value is ignored if 0.
8365232b66bSmatt */
8375232b66bSmatt bus_size_t _boundary;
8385232b66bSmatt
8395232b66bSmatt /*
8405232b66bSmatt * A bus may have more than one SGMAP window, so SGMAP
8415232b66bSmatt * windows also get a pointer to their SGMAP state.
8425232b66bSmatt */
8435232b66bSmatt struct vax_sgmap *_sgmap;
8445232b66bSmatt
8455232b66bSmatt /*
8465232b66bSmatt * Internal-use only utility methods. NOT TO BE USED BY
8475232b66bSmatt * MACHINE-INDEPENDENT CODE!
8485232b66bSmatt */
849dfba8166Smatt bus_dma_tag_t (*_get_tag)(bus_dma_tag_t, vax_bus_t);
8505232b66bSmatt
8515232b66bSmatt /*
8525232b66bSmatt * DMA mapping methods.
8535232b66bSmatt */
854dfba8166Smatt int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
855dfba8166Smatt bus_size_t, bus_size_t, int, bus_dmamap_t *);
856dfba8166Smatt void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
857dfba8166Smatt int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
858dfba8166Smatt bus_size_t, struct proc *, int);
859dfba8166Smatt int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
860dfba8166Smatt struct mbuf *, int);
861dfba8166Smatt int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
862dfba8166Smatt struct uio *, int);
863dfba8166Smatt int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
864dfba8166Smatt bus_dma_segment_t *, int, bus_size_t, int);
865dfba8166Smatt void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
866dfba8166Smatt void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
867dfba8166Smatt bus_addr_t, bus_size_t, int);
8685232b66bSmatt
8695232b66bSmatt /*
8705232b66bSmatt * DMA memory utility functions.
8715232b66bSmatt */
872dfba8166Smatt int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
873dfba8166Smatt bus_size_t, bus_dma_segment_t *, int, int *, int);
874dfba8166Smatt void (*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int);
875dfba8166Smatt int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
876dfba8166Smatt int, size_t, void **, int);
877dfba8166Smatt void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
878dfba8166Smatt paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
879dfba8166Smatt int, off_t, int, int);
8805232b66bSmatt };
8815232b66bSmatt
8825232b66bSmatt #define vaxbus_dma_get_tag(t, b) \
8835232b66bSmatt (*(t)->_get_tag)(t, b)
8845232b66bSmatt
8855232b66bSmatt #define bus_dmamap_create(t, s, n, m, b, f, p) \
8865232b66bSmatt (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
8875232b66bSmatt #define bus_dmamap_destroy(t, p) \
8885232b66bSmatt (*(t)->_dmamap_destroy)((t), (p))
8895232b66bSmatt #define bus_dmamap_load(t, m, b, s, p, f) \
8905232b66bSmatt (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
8915232b66bSmatt #define bus_dmamap_load_mbuf(t, m, b, f) \
8925232b66bSmatt (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
8935232b66bSmatt #define bus_dmamap_load_uio(t, m, u, f) \
8945232b66bSmatt (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
8955232b66bSmatt #define bus_dmamap_load_raw(t, m, sg, n, s, f) \
8965232b66bSmatt (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
8975232b66bSmatt #define bus_dmamap_unload(t, p) \
8985232b66bSmatt (*(t)->_dmamap_unload)((t), (p))
8995232b66bSmatt #define bus_dmamap_sync(t, p, o, l, ops) \
9005232b66bSmatt (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
9015232b66bSmatt #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
9025232b66bSmatt (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
9035232b66bSmatt #define bus_dmamem_free(t, sg, n) \
9045232b66bSmatt (*(t)->_dmamem_free)((t), (sg), (n))
9055232b66bSmatt #define bus_dmamem_map(t, sg, n, s, k, f) \
9065232b66bSmatt (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
9075232b66bSmatt #define bus_dmamem_unmap(t, k, s) \
9085232b66bSmatt (*(t)->_dmamem_unmap)((t), (k), (s))
9095232b66bSmatt #define bus_dmamem_mmap(t, sg, n, o, p, f) \
9105232b66bSmatt (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
9115232b66bSmatt
9124410329bSmrg #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
9134410329bSmrg #define bus_dmatag_destroy(t)
9144410329bSmrg
9155232b66bSmatt /*
9165232b66bSmatt * bus_dmamap_t
9175232b66bSmatt *
9185232b66bSmatt * Describes a DMA mapping.
9195232b66bSmatt */
9205232b66bSmatt struct vax_bus_dmamap {
9215232b66bSmatt /*
9225232b66bSmatt * PRIVATE MEMBERS: not for use my machine-independent code.
9235232b66bSmatt */
9245232b66bSmatt bus_size_t _dm_size; /* largest DMA transfer mappable */
9255232b66bSmatt int _dm_segcnt; /* number of segs this map can map */
926a6db24a4Smatt bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
9275232b66bSmatt bus_size_t _dm_boundary; /* don't cross this */
9285232b66bSmatt int _dm_flags; /* misc. flags */
9295232b66bSmatt
9305232b66bSmatt /*
9315232b66bSmatt * This is used only for SGMAP-mapped DMA, but we keep it
9325232b66bSmatt * here to avoid pointless indirection.
9335232b66bSmatt */
9345232b66bSmatt int _dm_pteidx; /* PTE index */
9355232b66bSmatt int _dm_ptecnt; /* PTE count */
9365232b66bSmatt u_long _dm_sgva; /* allocated sgva */
9375232b66bSmatt bus_size_t _dm_sgvalen; /* svga length */
9385232b66bSmatt
9395232b66bSmatt /*
9405232b66bSmatt * PUBLIC MEMBERS: these are used by machine-independent code.
9415232b66bSmatt */
942a6db24a4Smatt bus_size_t dm_maxsegsz; /* largest possible segment */
9435232b66bSmatt bus_size_t dm_mapsize; /* size of the mapping */
9445232b66bSmatt int dm_nsegs; /* # valid segments in mapping */
9455232b66bSmatt bus_dma_segment_t dm_segs[1]; /* segments; variable length */
9465232b66bSmatt };
9475232b66bSmatt
94856effcf2Smatt /*#ifdef _VAX_BUS_DMA_PRIVATE */
949dfba8166Smatt int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
950dfba8166Smatt bus_size_t, int, bus_dmamap_t *);
951dfba8166Smatt void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
9525232b66bSmatt
953dfba8166Smatt int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t,
954dfba8166Smatt void *, bus_size_t, struct proc *, int);
955dfba8166Smatt int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int);
956dfba8166Smatt int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int);
957dfba8166Smatt int _bus_dmamap_load_raw(bus_dma_tag_t,
958dfba8166Smatt bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int);
9595232b66bSmatt
960dfba8166Smatt void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
961dfba8166Smatt void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
962dfba8166Smatt bus_size_t, int);
9635232b66bSmatt
964dfba8166Smatt int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
9655232b66bSmatt bus_size_t alignment, bus_size_t boundary,
966dfba8166Smatt bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
967dfba8166Smatt void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, int nsegs);
968dfba8166Smatt int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
969dfba8166Smatt int nsegs, size_t size, void **kvap, int flags);
970dfba8166Smatt void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, size_t size);
971dfba8166Smatt paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
972dfba8166Smatt int nsegs, off_t off, int prot, int flags);
97356effcf2Smatt /*#endif*/ /* _VAX_BUS_DMA_PRIVATE */
9745232b66bSmatt
9755232b66bSmatt #endif /* _VAX_BUS_H_ */
976