1 /* $NetBSD: psl.h,v 1.8 2001/05/29 21:29:32 ragge Exp $ */ 2 3 /* 4 * Rewritten for the VAX port. Based on Berkeley code. /IC 5 * 6 * Copyright (c) 1982, 1986 Regents of the University of California. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)psl.h 7.2 (Berkeley) 5/4/91 38 */ 39 40 #ifndef PSL_C 41 42 /* 43 * VAX program status longword 44 */ 45 46 #define PSL_C 0x00000001 /* carry bit */ 47 #define PSL_V 0x00000002 /* overflow bit */ 48 #define PSL_Z 0x00000004 /* zero bit */ 49 #define PSL_N 0x00000008 /* negative bit */ 50 #define PSL_T 0x00000010 /* trace enable bit */ 51 #define PSL_IPL00 0x00000000 /* interrupt priority level 0 */ 52 #define PSL_IPL01 0x00010000 /* interrupt priority level 1 */ 53 #define PSL_IPL02 0x00020000 /* interrupt priority level 2 */ 54 #define PSL_IPL03 0x00030000 /* interrupt priority level 3 */ 55 #define PSL_IPL04 0x00040000 /* interrupt priority level 4 */ 56 #define PSL_IPL05 0x00050000 /* interrupt priority level 5 */ 57 #define PSL_IPL06 0x00060000 /* interrupt priority level 6 */ 58 #define PSL_IPL07 0x00070000 /* interrupt priority level 7 */ 59 #define PSL_IPL08 0x00080000 /* interrupt priority level 8 */ 60 #define PSL_IPL09 0x00090000 /* interrupt priority level 9 */ 61 #define PSL_IPL0A 0x000a0000 /* interrupt priority level 10 */ 62 #define PSL_IPL0B 0x000b0000 /* interrupt priority level 11 */ 63 #define PSL_IPL0C 0x000c0000 /* interrupt priority level 12 */ 64 #define PSL_IPL0D 0x000d0000 /* interrupt priority level 13 */ 65 #define PSL_IPL0E 0x000e0000 /* interrupt priority level 14 */ 66 #define PSL_IPL0F 0x000f0000 /* interrupt priority level 15 */ 67 #define PSL_IPL10 0x00100000 /* interrupt priority level 16 */ 68 #define PSL_IPL11 0x00110000 /* interrupt priority level 17 */ 69 #define PSL_IPL12 0x00120000 /* interrupt priority level 18 */ 70 #define PSL_IPL13 0x00130000 /* interrupt priority level 19 */ 71 #define PSL_IPL14 0x00140000 /* interrupt priority level 20 */ 72 #define PSL_IPL15 0x00150000 /* interrupt priority level 21 */ 73 #define PSL_IPL16 0x00160000 /* interrupt priority level 22 */ 74 #define PSL_IPL17 0x00170000 /* interrupt priority level 23 */ 75 #define PSL_IPL18 0x00180000 /* interrupt priority level 24 */ 76 #define PSL_IPL19 0x00190000 /* interrupt priority level 25 */ 77 #define PSL_IPL1A 0x001a0000 /* interrupt priority level 26 */ 78 #define PSL_IPL1B 0x001b0000 /* interrupt priority level 27 */ 79 #define PSL_IPL1C 0x001c0000 /* interrupt priority level 28 */ 80 #define PSL_IPL1D 0x001d0000 /* interrupt priority level 29 */ 81 #define PSL_IPL1E 0x001e0000 /* interrupt priority level 30 */ 82 #define PSL_IPL1F 0x001f0000 /* interrupt priority level 31 */ 83 #define PSL_PREVU 0x00c00000 /* Previous user mode */ 84 #define PSL_K 0x00000000 /* kernel mode */ 85 #define PSL_E 0x01000000 /* executive mode */ 86 #define PSL_S 0x02000000 /* supervisor mode */ 87 #define PSL_U 0x03000000 /* user mode */ 88 #define PSL_IS 0x04000000 /* interrupt stack select */ 89 #define PSL_FPD 0x08000000 /* first part done flag */ 90 #define PSL_TP 0x40000000 /* trace pending */ 91 #define PSL_CM 0x80000000 /* compatibility mode */ 92 93 #define PSL_LOWIPL (PSL_K) 94 #define PSL_HIGHIPL (PSL_K | PSL_IPL1F) 95 #define PSL_IPL (PSL_IPL1F) 96 #define PSL_USER (0) 97 98 #define PSL_MBZ 0x3020ff00 /* must be zero bits */ 99 100 #define PSL_USERSET (0) 101 #define PSL_USERCLR (PSL_S | PSL_IPL1F | PSL_MBZ) 102 103 /* 104 * Macros to decode processor status word. 105 */ 106 #define CLKF_USERMODE(framep) ((((framep)->ps) & (PSL_U)) == PSL_U) 107 #define CLKF_BASEPRI(framep) ((((framep)->ps) & (PSL_IPL1F)) < PSL_IPL02) 108 #define CLKF_PC(framep) ((framep)->pc) 109 #define CLKF_INTR(framep) (((((framep)->ps) & (PSL_IS)) == PSL_IS) && \ 110 !CLKF_BASEPRI(framep)) 111 #define PSL2IPL(ps) ((ps) >> 16) 112 113 #endif 114