xref: /netbsd/sys/arch/x68k/dev/opm.c (revision bf9ec67e)
1 /*	$NetBSD: opm.c,v 1.7 2001/12/27 02:23:25 wiz Exp $	*/
2 
3 /*
4  * Copyright (c) 1995 Masanobu Saitoh, Takuya Harakawa.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Masanobu Saitoh.
18  * 4. Neither the name of the University nor of the Laboratory may be used
19  *    to endorse or promote products derived from this software without
20  *    specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  */
34 
35 /*
36  * Temporary implementation: not fully bus.h'fied.
37  */
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/device.h>
42 
43 #include <machine/bus.h>
44 #include <machine/cpu.h>
45 
46 #include <arch/x68k/dev/opmreg.h>
47 #include <arch/x68k/dev/intiovar.h>
48 
49 struct opm_softc {
50 	struct device		sc_dev;
51 
52 	bus_space_tag_t		sc_bst;
53 	bus_space_handle_t	sc_bht;
54 	u_int8_t		sc_regs[0x100];
55 	struct opm_voice	sc_vdata[8];
56 };
57 
58 struct opm_softc	*opm0;	/* XXX */
59 
60 static int opm_match __P((struct device *, struct cfdata *, void *));
61 static void opm_attach __P((struct device *, struct device *, void *));
62 
63 struct cfattach opm_ca = {
64 	sizeof (struct opm_softc), opm_match, opm_attach
65 };
66 
67 static int
68 opm_match(parent, cf, aux)
69 	struct device *parent;
70 	struct cfdata *cf;
71 	void *aux;
72 {
73 	struct intio_attach_args *ia = aux;
74 
75 	if (strcmp(ia->ia_name, "opm") != 0)
76 		return 0;
77 
78 	if (ia->ia_addr == INTIOCF_ADDR_DEFAULT)
79 		ia->ia_addr = 0xe90000;
80 	ia->ia_size = 0x2000;
81 	if (intio_map_allocate_region (parent, ia, INTIO_MAP_TESTONLY))
82 		return 0;
83 
84 	return 1;
85 }
86 
87 static void
88 opm_attach(parent, self, aux)
89 	struct device *parent, *self;
90 	void *aux;
91 {
92 	struct opm_softc *sc = (struct opm_softc *)self;
93 	struct intio_attach_args *ia = aux;
94 	int r;
95 
96 	printf ("\n");
97 	ia->ia_size = 0x2000;
98 	r = intio_map_allocate_region (parent, ia, INTIO_MAP_ALLOCATE);
99 #ifdef DIAGNOSTIC
100 	if (r)
101 		panic ("IO map for OPM corruption??");
102 #endif
103 
104 	sc->sc_bst = ia->ia_bst;
105 	r = bus_space_map (sc->sc_bst,
106 			   ia->ia_addr, ia->ia_size,
107 			   BUS_SPACE_MAP_SHIFTED,
108 			   &sc->sc_bht);
109 #ifdef DIAGNOSTIC
110 	if (r)
111 		panic ("Cannot map IO space for OPM.");
112 #endif
113 
114 	if (sc->sc_dev.dv_unit == 0)
115 		opm0 = sc;	/* XXX */
116 
117 	return;
118 }
119 
120 void opm_set_volume __P((int, int));
121 void opm_set_key __P((int, int));
122 void opm_set_voice __P((int, struct opm_voice *));
123 void opm_set_voice_sub __P((int, struct opm_operator *));
124 __inline static void writeopm __P((int, int));
125 __inline static int readopm __P((int));
126 void opm_key_on __P((u_char));
127 void opm_key_off __P((u_char));
128 int opmopen __P((dev_t, int, int));
129 int opmclose __P((dev_t));
130 
131 __inline static void
132 writeopm(reg, dat)
133 	int reg, dat;
134 {
135 	while (bus_space_read_1 (opm0->sc_bst, opm0->sc_bht, OPM_DATA) & 0x80);
136 	bus_space_write_1 (opm0->sc_bst, opm0->sc_bht, OPM_REG, reg);
137 	while (bus_space_read_1 (opm0->sc_bst, opm0->sc_bht, OPM_DATA) & 0x80);
138 	bus_space_write_1 (opm0->sc_bst, opm0->sc_bht, OPM_DATA, dat);
139 	opm0->sc_regs[reg] = dat;
140 }
141 
142 __inline static int
143 readopm(reg)
144 	int reg;
145 {
146 	return opm0->sc_regs[reg];
147 }
148 
149 #include "fd.h"
150 #include "vs.h"
151 #include "bell.h"
152 
153 #if NVS > 0
154 void
155 adpcm_chgclk(clk)
156 	u_char	clk;
157 {
158 	writeopm(0x1b, (readopm(0x1b) & ~OPM1B_CT1MSK) | clk);
159 }
160 #endif
161 
162 #if NFD > 0
163 void
164 fdc_force_ready(rdy)
165 	u_char	rdy;
166 {
167 	writeopm(0x1b, (readopm(0x1b) & ~OPM1B_CT2MSK) | rdy);
168 }
169 #endif
170 
171 #if NBELL > 0
172 void
173 opm_key_on(channel)
174 	u_char channel;
175 {
176     writeopm(0x08, opm0->sc_vdata[channel].sm << 3 | channel);
177 }
178 
179 void
180 opm_key_off(channel)
181 	u_char	channel;
182 {
183     writeopm(0x08, channel);
184 }
185 
186 void
187 opm_set_voice(channel, voice)
188 	int channel;
189 	struct opm_voice *voice;
190 {
191 	memcpy(&opm0->sc_vdata[channel], voice, sizeof(struct opm_voice));
192 
193 	opm_set_voice_sub(0x40 + channel, &voice->m1);
194 	opm_set_voice_sub(0x48 + channel, &voice->m2);
195 	opm_set_voice_sub(0x50 + channel, &voice->c1);
196 	opm_set_voice_sub(0x58 + channel, &voice->c2);
197 	writeopm(0x20 + channel, 0xc0 | (voice->fb & 0x7) << 3 | (voice->con & 0x7));
198 }
199 
200 void
201 opm_set_voice_sub(reg, op)
202 	register int reg;
203 	struct opm_operator *op;
204 {
205     /* DT1/MUL */
206     writeopm(reg, (op->dt1 & 0x7) << 3 | (op->mul & 0x7));
207 
208     /* TL */
209     writeopm(reg + 0x20, op->tl & 0x7f);
210 
211     /* KS/AR */
212     writeopm(reg + 0x40, (op->ks & 0x3) << 6 | (op->ar & 0x1f));
213 
214     /* AMS/D1R */
215     writeopm(reg + 0x60, (op->ame & 0x1) << 7 | (op->d1r & 0x1f));
216 
217     /* DT2/D2R */
218     writeopm(reg + 0x80, (op->dt2 & 0x3) << 6 | (op->d2r & 0x1f));
219 
220     /* D1L/RR */
221     writeopm(reg + 0xa0, (op->d1l & 0xf) << 4 | (op->rr & 0xf));
222 }
223 
224 void
225 opm_set_volume(channel, volume)
226 	int channel;
227 	int volume;
228 {
229     int value;
230 
231     switch (opm0->sc_vdata[channel].con) {
232     case 7:
233 	value = opm0->sc_vdata[channel].m1.tl + volume;
234 	writeopm(0x60 + channel, ((value > 0x7f) ? 0x7f : value));
235     case 6:
236     case 5:
237 	value = opm0->sc_vdata[channel].m2.tl + volume;
238 	writeopm(0x68 + channel, ((value > 0x7f) ? 0x7f : value));
239     case 4:
240 	value = opm0->sc_vdata[channel].c1.tl + volume;
241 	writeopm(0x70 + channel, ((value > 0x7f) ? 0x7f : value));
242     case 3:
243     case 2:
244     case 1:
245     case 0:
246 	value = opm0->sc_vdata[channel].c2.tl + volume;
247 	writeopm(0x78 + channel, ((value > 0x7f) ? 0x7f : value));
248     }
249 }
250 
251 void
252 opm_set_key(channel, tone)
253 	int channel;
254 	int tone;
255 {
256 	writeopm(0x28 + channel, tone >> 8);
257 	writeopm(0x30 + channel, tone & 0xff);
258 }
259 
260 /*ARGSUSED*/
261 int
262 opmopen(dev, flag, mode)
263 	dev_t dev;
264 	int flag, mode;
265 {
266 	return 0;
267 }
268 
269 /*ARGSUSED*/
270 int
271 opmclose(dev)
272 	dev_t dev;
273 {
274 	return 0;
275 }
276 
277 #endif
278