xref: /netbsd/sys/arch/x86/include/pmap.h (revision 6550d01e)
1 /*	$NetBSD: pmap.h,v 1.34 2011/02/01 20:19:32 chuck Exp $	*/
2 
3 /*
4  * Copyright (c) 1997 Charles D. Cranor and Washington University.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 /*
29  * Copyright (c) 2001 Wasabi Systems, Inc.
30  * All rights reserved.
31  *
32  * Written by Frank van der Linden for Wasabi Systems, Inc.
33  *
34  * Redistribution and use in source and binary forms, with or without
35  * modification, are permitted provided that the following conditions
36  * are met:
37  * 1. Redistributions of source code must retain the above copyright
38  *    notice, this list of conditions and the following disclaimer.
39  * 2. Redistributions in binary form must reproduce the above copyright
40  *    notice, this list of conditions and the following disclaimer in the
41  *    documentation and/or other materials provided with the distribution.
42  * 3. All advertising materials mentioning features or use of this software
43  *    must display the following acknowledgement:
44  *      This product includes software developed for the NetBSD Project by
45  *      Wasabi Systems, Inc.
46  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
47  *    or promote products derived from this software without specific prior
48  *    written permission.
49  *
50  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
51  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
52  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
53  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
54  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
60  * POSSIBILITY OF SUCH DAMAGE.
61  */
62 
63 /*
64  * pmap.h: see pmap.c for the history of this pmap module.
65  */
66 
67 #ifndef _X86_PMAP_H_
68 #define	_X86_PMAP_H_
69 
70 #define ptei(VA)	(((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
71 
72 /*
73  * pl*_pi: index in the ptp page for a pde mapping a VA.
74  * (pl*_i below is the index in the virtual array of all pdes per level)
75  */
76 #define pl1_pi(VA)	(((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
77 #define pl2_pi(VA)	(((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT)
78 #define pl3_pi(VA)	(((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT)
79 #define pl4_pi(VA)	(((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT)
80 
81 /*
82  * pl*_i: generate index into pde/pte arrays in virtual space
83  */
84 #define pl1_i(VA)	(((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT)
85 #define pl2_i(VA)	(((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT)
86 #define pl3_i(VA)	(((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT)
87 #define pl4_i(VA)	(((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT)
88 #define pl_i(va, lvl) \
89         (((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1])
90 
91 #define	pl_i_roundup(va, lvl)	pl_i((va)+ ~ptp_masks[(lvl)-1], (lvl))
92 
93 /*
94  * PTP macros:
95  *   a PTP's index is the PD index of the PDE that points to it
96  *   a PTP's offset is the byte-offset in the PTE space that this PTP is at
97  *   a PTP's VA is the first VA mapped by that PTP
98  */
99 
100 #define ptp_va2o(va, lvl)	(pl_i(va, (lvl)+1) * PAGE_SIZE)
101 
102 /* size of a PDP: usually one page, except for PAE */
103 #ifdef PAE
104 #define PDP_SIZE 4
105 #else
106 #define PDP_SIZE 1
107 #endif
108 
109 
110 #if defined(_KERNEL)
111 /*
112  * pmap data structures: see pmap.c for details of locking.
113  */
114 
115 /*
116  * we maintain a list of all non-kernel pmaps
117  */
118 
119 LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */
120 
121 /*
122  * the pmap structure
123  *
124  * note that the pm_obj contains the simple_lock, the reference count,
125  * page list, and number of PTPs within the pmap.
126  *
127  * pm_lock is the same as the spinlock for vm object 0. Changes to
128  * the other objects may only be made if that lock has been taken
129  * (the other object locks are only used when uvm_pagealloc is called)
130  *
131  * XXX If we ever support processor numbers higher than 31, we'll have
132  * XXX to rethink the CPU mask.
133  */
134 
135 struct pmap {
136 	struct uvm_object pm_obj[PTP_LEVELS-1]; /* objects for lvl >= 1) */
137 #define	pm_lock	pm_obj[0].vmobjlock
138 	LIST_ENTRY(pmap) pm_list;	/* list (lck by pm_list lock) */
139 	pd_entry_t *pm_pdir;		/* VA of PD (lck by object lock) */
140 	paddr_t pm_pdirpa[PDP_SIZE];	/* PA of PDs (read-only after create) */
141 	struct vm_page *pm_ptphint[PTP_LEVELS-1];
142 					/* pointer to a PTP in our pmap */
143 	struct pmap_statistics pm_stats;  /* pmap stats (lck by object lock) */
144 
145 #if !defined(__x86_64__)
146 	vaddr_t pm_hiexec;		/* highest executable mapping */
147 #endif /* !defined(__x86_64__) */
148 	int pm_flags;			/* see below */
149 
150 	union descriptor *pm_ldt;	/* user-set LDT */
151 	size_t pm_ldt_len;		/* size of LDT in bytes */
152 	int pm_ldt_sel;			/* LDT selector */
153 	uint32_t pm_cpus;		/* mask of CPUs using pmap */
154 	uint32_t pm_kernel_cpus;	/* mask of CPUs using kernel part
155 					 of pmap */
156 };
157 
158 /* macro to access pm_pdirpa slots */
159 #ifdef PAE
160 #define pmap_pdirpa(pmap, index) \
161 	((pmap)->pm_pdirpa[l2tol3(index)] + l2tol2(index) * sizeof(pd_entry_t))
162 #else
163 #define pmap_pdirpa(pmap, index) \
164 	((pmap)->pm_pdirpa[0] + (index) * sizeof(pd_entry_t))
165 #endif
166 
167 /*
168  * MD flags that we use for pmap_enter and pmap_kenter_pa:
169  */
170 
171 /*
172  * global kernel variables
173  */
174 
175 /*
176  * PDPpaddr is the physical address of the kernel's PDP.
177  * - i386 non-PAE and amd64: PDPpaddr corresponds directly to the %cr3
178  * value associated to the kernel process, proc0.
179  * - i386 PAE: it still represents the PA of the kernel's PDP (L2). Due to
180  * the L3 PD, it cannot be considered as the equivalent of a %cr3 any more.
181  * - Xen: it corresponds to the PFN of the kernel's PDP.
182  */
183 extern u_long PDPpaddr;
184 
185 extern int pmap_pg_g;			/* do we support PG_G? */
186 extern long nkptp[PTP_LEVELS];
187 
188 /*
189  * macros
190  */
191 
192 #define	pmap_resident_count(pmap)	((pmap)->pm_stats.resident_count)
193 #define	pmap_wired_count(pmap)		((pmap)->pm_stats.wired_count)
194 
195 #define pmap_clear_modify(pg)		pmap_clear_attrs(pg, PG_M)
196 #define pmap_clear_reference(pg)	pmap_clear_attrs(pg, PG_U)
197 #define pmap_copy(DP,SP,D,L,S)
198 #define pmap_is_modified(pg)		pmap_test_attrs(pg, PG_M)
199 #define pmap_is_referenced(pg)		pmap_test_attrs(pg, PG_U)
200 #define pmap_move(DP,SP,D,L,S)
201 #define pmap_phys_address(ppn)		x86_ptob(ppn)
202 #define pmap_valid_entry(E) 		((E) & PG_V) /* is PDE or PTE valid? */
203 
204 
205 /*
206  * prototypes
207  */
208 
209 void		pmap_activate(struct lwp *);
210 void		pmap_bootstrap(vaddr_t);
211 bool		pmap_clear_attrs(struct vm_page *, unsigned);
212 void		pmap_deactivate(struct lwp *);
213 void		pmap_page_remove (struct vm_page *);
214 void		pmap_remove(struct pmap *, vaddr_t, vaddr_t);
215 bool		pmap_test_attrs(struct vm_page *, unsigned);
216 void		pmap_write_protect(struct pmap *, vaddr_t, vaddr_t, vm_prot_t);
217 void		pmap_load(void);
218 paddr_t		pmap_init_tmp_pgtbl(paddr_t);
219 void		pmap_remove_all(struct pmap *);
220 void		pmap_ldt_sync(struct pmap *);
221 
222 void		pmap_emap_enter(vaddr_t, paddr_t, vm_prot_t);
223 void		pmap_emap_remove(vaddr_t, vsize_t);
224 void		pmap_emap_sync(bool);
225 
226 void		pmap_map_ptes(struct pmap *, struct pmap **, pd_entry_t **,
227 		    pd_entry_t * const **);
228 void		pmap_unmap_ptes(struct pmap *, struct pmap *);
229 
230 int		pmap_pdes_invalid(vaddr_t, pd_entry_t * const *, pd_entry_t *);
231 
232 vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */
233 
234 void	pmap_tlb_shootdown(pmap_t, vaddr_t, vaddr_t, pt_entry_t);
235 void	pmap_tlb_shootwait(void);
236 
237 #define	__HAVE_PMAP_EMAP
238 
239 #define PMAP_GROWKERNEL		/* turn on pmap_growkernel interface */
240 #define PMAP_FORK		/* turn on pmap_fork interface */
241 
242 /*
243  * Do idle page zero'ing uncached to avoid polluting the cache.
244  */
245 bool	pmap_pageidlezero(paddr_t);
246 #define	PMAP_PAGEIDLEZERO(pa)	pmap_pageidlezero((pa))
247 
248 /*
249  * inline functions
250  */
251 
252 __inline static bool __unused
253 pmap_pdes_valid(vaddr_t va, pd_entry_t * const *pdes, pd_entry_t *lastpde)
254 {
255 	return pmap_pdes_invalid(va, pdes, lastpde) == 0;
256 }
257 
258 /*
259  * pmap_update_pg: flush one page from the TLB (or flush the whole thing
260  *	if hardware doesn't support one-page flushing)
261  */
262 
263 __inline static void __unused
264 pmap_update_pg(vaddr_t va)
265 {
266 	invlpg(va);
267 }
268 
269 /*
270  * pmap_update_2pg: flush two pages from the TLB
271  */
272 
273 __inline static void __unused
274 pmap_update_2pg(vaddr_t va, vaddr_t vb)
275 {
276 	invlpg(va);
277 	invlpg(vb);
278 }
279 
280 /*
281  * pmap_page_protect: change the protection of all recorded mappings
282  *	of a managed page
283  *
284  * => this function is a frontend for pmap_page_remove/pmap_clear_attrs
285  * => we only have to worry about making the page more protected.
286  *	unprotecting a page is done on-demand at fault time.
287  */
288 
289 __inline static void __unused
290 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
291 {
292 	if ((prot & VM_PROT_WRITE) == 0) {
293 		if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
294 			(void) pmap_clear_attrs(pg, PG_RW);
295 		} else {
296 			pmap_page_remove(pg);
297 		}
298 	}
299 }
300 
301 /*
302  * pmap_protect: change the protection of pages in a pmap
303  *
304  * => this function is a frontend for pmap_remove/pmap_write_protect
305  * => we only have to worry about making the page more protected.
306  *	unprotecting a page is done on-demand at fault time.
307  */
308 
309 __inline static void __unused
310 pmap_protect(struct pmap *pmap, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
311 {
312 	if ((prot & VM_PROT_WRITE) == 0) {
313 		if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
314 			pmap_write_protect(pmap, sva, eva, prot);
315 		} else {
316 			pmap_remove(pmap, sva, eva);
317 		}
318 	}
319 }
320 
321 /*
322  * various address inlines
323  *
324  *  vtopte: return a pointer to the PTE mapping a VA, works only for
325  *  user and PT addresses
326  *
327  *  kvtopte: return a pointer to the PTE mapping a kernel VA
328  */
329 
330 #include <lib/libkern/libkern.h>
331 
332 static __inline pt_entry_t * __unused
333 vtopte(vaddr_t va)
334 {
335 
336 	KASSERT(va < VM_MIN_KERNEL_ADDRESS);
337 
338 	return (PTE_BASE + pl1_i(va));
339 }
340 
341 static __inline pt_entry_t * __unused
342 kvtopte(vaddr_t va)
343 {
344 	pd_entry_t *pde;
345 
346 	KASSERT(va >= VM_MIN_KERNEL_ADDRESS);
347 
348 	pde = L2_BASE + pl2_i(va);
349 	if (*pde & PG_PS)
350 		return ((pt_entry_t *)pde);
351 
352 	return (PTE_BASE + pl1_i(va));
353 }
354 
355 paddr_t vtophys(vaddr_t);
356 vaddr_t	pmap_map(vaddr_t, paddr_t, paddr_t, vm_prot_t);
357 void	pmap_cpu_init_early(struct cpu_info *);
358 void	pmap_cpu_init_late(struct cpu_info *);
359 bool	sse2_idlezero_page(void *);
360 
361 
362 #ifdef XEN
363 
364 #define XPTE_MASK	L1_FRAME
365 /* XPTE_SHIFT = L1_SHIFT - log2(sizeof(pt_entry_t)) */
366 #if defined(__x86_64__) || defined(PAE)
367 #define XPTE_SHIFT	9
368 #else
369 #define XPTE_SHIFT	10
370 #endif
371 
372 /* PTE access inline fuctions */
373 
374 /*
375  * Get the machine address of the pointed pte
376  * We use hardware MMU to get value so works only for levels 1-3
377  */
378 
379 static __inline paddr_t
380 xpmap_ptetomach(pt_entry_t *pte)
381 {
382 	pt_entry_t *up_pte;
383 	vaddr_t va = (vaddr_t) pte;
384 
385 	va = ((va & XPTE_MASK) >> XPTE_SHIFT) | (vaddr_t) PTE_BASE;
386 	up_pte = (pt_entry_t *) va;
387 
388 	return (paddr_t) (((*up_pte) & PG_FRAME) + (((vaddr_t) pte) & (~PG_FRAME & ~VA_SIGN_MASK)));
389 }
390 
391 /*
392  * xpmap_update()
393  * Update an active pt entry with Xen
394  * Equivalent to *pte = npte
395  */
396 
397 static __inline void
398 xpmap_update (pt_entry_t *pte, pt_entry_t npte)
399 {
400         int s = splvm();
401 
402         xpq_queue_pte_update(xpmap_ptetomach(pte), npte);
403         xpq_flush_queue();
404         splx(s);
405 }
406 
407 
408 /* Xen helpers to change bits of a pte */
409 #define XPMAP_UPDATE_DIRECT	1	/* Update direct map entry flags too */
410 
411 paddr_t	vtomach(vaddr_t);
412 #define vtomfn(va) (vtomach(va) >> PAGE_SHIFT)
413 
414 #endif	/* XEN */
415 
416 /* pmap functions with machine addresses */
417 void	pmap_kenter_ma(vaddr_t, paddr_t, vm_prot_t, u_int);
418 int	pmap_enter_ma(struct pmap *, vaddr_t, paddr_t, paddr_t,
419 	    vm_prot_t, u_int, int);
420 bool	pmap_extract_ma(pmap_t, vaddr_t, paddr_t *);
421 
422 /*
423  * Hooks for the pool allocator.
424  */
425 #define	POOL_VTOPHYS(va)	vtophys((vaddr_t) (va))
426 
427 /*
428  * TLB shootdown mailbox.
429  */
430 
431 struct pmap_mbox {
432 	volatile void		*mb_pointer;
433 	volatile uintptr_t	mb_addr1;
434 	volatile uintptr_t	mb_addr2;
435 	volatile uintptr_t	mb_head;
436 	volatile uintptr_t	mb_tail;
437 	volatile uintptr_t	mb_global;
438 };
439 
440 #endif /* _KERNEL */
441 
442 #endif /* _X86_PMAP_H_ */
443