1 /* $NetBSD: atavar.h,v 1.25 2002/04/23 20:41:14 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 */ 33 34 /* Hight-level functions and structures used by both ATA and ATAPI devices */ 35 36 /* Datas common to drives and controller drivers */ 37 struct ata_drive_datas { 38 u_int8_t drive; /* drive number */ 39 int8_t ata_vers; /* ATA version supported */ 40 u_int16_t drive_flags; /* bitmask for drives present/absent and cap */ 41 #define DRIVE_ATA 0x0001 42 #define DRIVE_ATAPI 0x0002 43 #define DRIVE_OLD 0x0004 44 #define DRIVE (DRIVE_ATA|DRIVE_ATAPI|DRIVE_OLD) 45 #define DRIVE_CAP32 0x0008 46 #define DRIVE_DMA 0x0010 47 #define DRIVE_UDMA 0x0020 48 #define DRIVE_MODE 0x0040 /* the drive reported its mode */ 49 #define DRIVE_RESET 0x0080 /* reset the drive state at next xfer */ 50 #define DRIVE_DMAERR 0x0100 /* Udma transfer had crc error, don't try DMA */ 51 #define DRIVE_ATAPIST 0x0100 /* device is an ATAPI tape drive */ 52 /* 53 * Current setting of drive's PIO, DMA and UDMA modes. 54 * Is initialised by the disks drivers at attach time, and may be 55 * changed later by the controller's code if needed 56 */ 57 u_int8_t PIO_mode; /* Current setting of drive's PIO mode */ 58 u_int8_t DMA_mode; /* Current setting of drive's DMA mode */ 59 u_int8_t UDMA_mode; /* Current setting of drive's UDMA mode */ 60 /* Supported modes for this drive */ 61 u_int8_t PIO_cap; /* supported drive's PIO mode */ 62 u_int8_t DMA_cap; /* supported drive's DMA mode */ 63 u_int8_t UDMA_cap; /* supported drive's UDMA mode */ 64 /* 65 * Drive state. 66 * This is reset to 0 after a channel reset. 67 */ 68 u_int8_t state; 69 #define RESET 0 70 #define RECAL 1 71 #define RECAL_WAIT 2 72 #define PIOMODE 3 73 #define PIOMODE_WAIT 4 74 #define DMAMODE 5 75 #define DMAMODE_WAIT 6 76 #define GEOMETRY 7 77 #define GEOMETRY_WAIT 8 78 #define MULTIMODE 9 79 #define MULTIMODE_WAIT 10 80 #define READY 11 81 82 /* numbers of xfers and DMA errs. Used by ata_dmaerr() */ 83 u_int8_t n_dmaerrs; 84 u_int32_t n_xfers; 85 /* Downgrade after NERRS_MAX errors in at most NXFER xfers */ 86 #define NERRS_MAX 4 87 #define NXFER 4000 88 89 struct device *drv_softc; /* ATA drives softc, if any */ 90 void* chnl_softc; /* channel softc */ 91 }; 92 93 /* User config flags that force (or disable) the use of a mode */ 94 #define ATA_CONFIG_PIO_MODES 0x0007 95 #define ATA_CONFIG_PIO_SET 0x0008 96 #define ATA_CONFIG_PIO_OFF 0 97 #define ATA_CONFIG_DMA_MODES 0x0070 98 #define ATA_CONFIG_DMA_SET 0x0080 99 #define ATA_CONFIG_DMA_DISABLE 0x0070 100 #define ATA_CONFIG_DMA_OFF 4 101 #define ATA_CONFIG_UDMA_MODES 0x0700 102 #define ATA_CONFIG_UDMA_SET 0x0800 103 #define ATA_CONFIG_UDMA_DISABLE 0x0700 104 #define ATA_CONFIG_UDMA_OFF 8 105 106 /* 107 * ATA/ATAPI commands description 108 * 109 * This structure defines the interface between the ATA/ATAPI device driver 110 * and the controller for short commands. It contains the command's parameter, 111 * the len of data's to read/write (if any), and a function to call upon 112 * completion. 113 * If no sleep is allowed, the driver can poll for command completion. 114 * Once the command completed, if the error registed is valid, the flag 115 * AT_ERROR is set and the error register value is copied to r_error . 116 * A separate interface is needed for read/write or ATAPI packet commands 117 * (which need multiple interrupts per commands). 118 */ 119 struct wdc_command { 120 u_int8_t r_command; /* Parameters to upload to registers */ 121 u_int8_t r_head; 122 u_int16_t r_cyl; 123 u_int8_t r_sector; 124 u_int8_t r_count; 125 u_int8_t r_precomp; 126 u_int8_t r_st_bmask; /* status register mask to wait for before command */ 127 u_int8_t r_st_pmask; /* status register mask to wait for after command */ 128 u_int8_t r_error; /* error register after command done */ 129 volatile u_int16_t flags; 130 #define AT_READ 0x0001 /* There is data to read */ 131 #define AT_WRITE 0x0002 /* There is data to write (excl. with AT_READ) */ 132 #define AT_WAIT 0x0008 /* wait in controller code for command completion */ 133 #define AT_POLL 0x0010 /* poll for command completion (no interrupts) */ 134 #define AT_DONE 0x0020 /* command is done */ 135 #define AT_XFDONE 0x0040 /* data xfer is done */ 136 #define AT_ERROR 0x0080 /* command is done with error */ 137 #define AT_TIMEOU 0x0100 /* command timed out */ 138 #define AT_DF 0x0200 /* Drive fault */ 139 #define AT_READREG 0x0400 /* Read registers on completion */ 140 int timeout; /* timeout (in ms) */ 141 void *data; /* Data buffer address */ 142 int bcount; /* number of bytes to transfer */ 143 void (*callback) __P((void*)); /* command to call once command completed */ 144 void *callback_arg; /* argument passed to *callback() */ 145 }; 146 147 int wdc_downgrade_mode __P((struct ata_drive_datas*)); 148 149 struct ataparams; 150 int ata_get_params __P((struct ata_drive_datas*, u_int8_t, 151 struct ataparams *)); 152 int ata_set_mode __P((struct ata_drive_datas*, u_int8_t, u_int8_t)); 153 /* return code for these cmds */ 154 #define CMD_OK 0 155 #define CMD_ERR 1 156 #define CMD_AGAIN 2 157 158 void ata_dmaerr __P((struct ata_drive_datas *)); 159