1 /* $NetBSD: ahc_cardbus.c,v 1.6 2002/01/16 02:11:22 ichiro Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * CardBus front-end for the Adaptec AIC-7xxx family of SCSI controllers. 42 * 43 * TODO: 44 * - power management 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: ahc_cardbus.c,v 1.6 2002/01/16 02:11:22 ichiro Exp $"); 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/queue.h> 55 #include <sys/device.h> 56 57 #include <machine/bus.h> 58 #include <machine/intr.h> 59 60 #include <dev/scsipi/scsi_all.h> 61 #include <dev/scsipi/scsipi_all.h> 62 #include <dev/scsipi/scsiconf.h> 63 64 #include <dev/pci/pcireg.h> 65 66 #include <dev/cardbus/cardbusvar.h> 67 #include <dev/cardbus/cardbusdevs.h> 68 69 #include <dev/ic/aic7xxxvar.h> 70 71 #include <dev/microcode/aic7xxx/aic7xxx_reg.h> 72 73 #define AHC_CARDBUS_IOBA 0x10 74 #define AHC_CARDBUS_MMBA 0x14 75 76 struct ahc_cardbus_softc { 77 struct ahc_softc sc_ahc; /* real AHC */ 78 79 /* CardBus-specific goo. */ 80 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 81 int sc_intrline; /* our interrupt line */ 82 cardbustag_t sc_tag; 83 84 int sc_cbenable; /* what CardBus access type to enable */ 85 int sc_csr; /* CSR bits */ 86 bus_size_t sc_size; 87 }; 88 89 int ahc_cardbus_match __P((struct device *, struct cfdata *, void *)); 90 void ahc_cardbus_attach __P((struct device *, struct device *, void *)); 91 int ahc_cardbus_detach __P((struct device *, int)); 92 93 struct cfattach ahc_cardbus_ca = { 94 sizeof(struct ahc_cardbus_softc), ahc_cardbus_match, ahc_cardbus_attach, 95 ahc_cardbus_detach, ahc_activate 96 }; 97 98 int 99 ahc_cardbus_match(parent, match, aux) 100 struct device *parent; 101 struct cfdata *match; 102 void *aux; 103 { 104 struct cardbus_attach_args *ca = aux; 105 106 if (CARDBUS_VENDOR(ca->ca_id) == CARDBUS_VENDOR_ADP && 107 CARDBUS_PRODUCT(ca->ca_id) == CARDBUS_PRODUCT_ADP_1480) 108 return (1); 109 110 return (0); 111 } 112 113 void 114 ahc_cardbus_attach(parent, self, aux) 115 struct device *parent, *self; 116 void *aux; 117 { 118 struct cardbus_attach_args *ca = aux; 119 struct ahc_cardbus_softc *csc = (void *) self; 120 struct ahc_softc *ahc = &csc->sc_ahc; 121 cardbus_devfunc_t ct = ca->ca_ct; 122 cardbus_chipset_tag_t cc = ct->ct_cc; 123 cardbus_function_tag_t cf = ct->ct_cf; 124 bus_space_tag_t bst; 125 bus_space_handle_t bsh; 126 pcireg_t reg; 127 u_int sxfrctl1 = 0; 128 ahc_chip ahc_t = AHC_NONE; 129 ahc_feature ahc_fe = AHC_FENONE; 130 ahc_flag ahc_f = AHC_FNONE; 131 132 133 csc->sc_ct = ct; 134 csc->sc_tag = ca->ca_tag; 135 csc->sc_intrline = ca->ca_intrline; 136 137 printf(": Adaptec ADP-1480 SCSI\n"); 138 139 /* 140 * Map the device. 141 */ 142 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE; 143 if (Cardbus_mapreg_map(csc->sc_ct, AHC_CARDBUS_MMBA, 144 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 145 &bst, &bsh, NULL, &csc->sc_size) == 0) { 146 csc->sc_cbenable = CARDBUS_MEM_ENABLE; 147 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE; 148 } else if (Cardbus_mapreg_map(csc->sc_ct, AHC_CARDBUS_IOBA, 149 PCI_MAPREG_TYPE_IO, 0, &bst, &bsh, NULL, &csc->sc_size) == 0) { 150 csc->sc_cbenable = CARDBUS_IO_ENABLE; 151 csc->sc_csr |= PCI_COMMAND_IO_ENABLE; 152 } else { 153 printf("%s: unable to map device registers\n", 154 ahc_name(ahc)); 155 return; 156 } 157 158 /* Make sure the right access type is on the CardBus bridge. */ 159 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cbenable); 160 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 161 162 /* Enable the appropriate bits in the PCI CSR. */ 163 reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG); 164 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 165 reg |= csc->sc_csr; 166 cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg); 167 168 /* 169 * Make sure the latency timer is set to some reasonable 170 * value. 171 */ 172 reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG); 173 if (PCI_LATTIMER(reg) < 0x20) { 174 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 175 reg |= (0x20 << PCI_LATTIMER_SHIFT); 176 cardbus_conf_write(cc, cf, ca->ca_tag, PCI_BHLC_REG, reg); 177 } 178 179 ahc->tag = bst; 180 ahc->bsh = bsh; 181 182 /* 183 * ADP-1480 is always an AIC-7860. 184 */ 185 ahc_t = AHC_AIC7860; 186 ahc_fe = AHC_AIC7860_FE; 187 188 /* 189 * On all CardBus adapters, we allow SCB paging. 190 */ 191 ahc_f = AHC_PAGESCBS; 192 193 if (ahc_alloc(ahc, bsh, bst, ca->ca_dmat, ahc_t | AHC_PCI /* XXX */, 194 ahc_fe, ahc_f) < 0) { 195 printf("%s: unable to initialize softc\n", ahc_name(ahc)); 196 return; 197 } 198 199 ahc->channel = 'A'; 200 201 ahc_reset(ahc); 202 203 /* 204 * Establish the interrupt. 205 */ 206 ahc->ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_BIO, 207 ahc_intr, ahc); 208 if (ahc->ih == NULL) { 209 printf("%s: unable to establish interrupt at %d\n", 210 ahc_name(ahc), ca->ca_intrline); 211 return; 212 } 213 printf("%s: interrupting at %d\n", ahc_name(ahc), ca->ca_intrline); 214 215 /* 216 * Do chip-specific initialization. 217 */ 218 { 219 u_char sblkctl; 220 const char *id_string; 221 222 switch (ahc->chip & AHC_CHIPID_MASK) { 223 case AHC_AIC7860: 224 id_string = "aic7860 "; 225 check_extport(ahc, &sxfrctl1); 226 break; 227 228 default: 229 printf("%s: unknown controller type\n", ahc_name(ahc)); 230 ahc_free(ahc); 231 return; 232 } 233 234 /* 235 * Take the LED out of diagnostic mode. 236 */ 237 sblkctl = ahc_inb(ahc, SBLKCTL); 238 ahc_outb(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON))); 239 240 /* 241 * I don't know where this is set in the SEEPROM or by the 242 * BIOS, so we default to 100%. 243 */ 244 ahc_outb(ahc, DSPCISTATUS, DFTHRSH_100); 245 246 if (ahc->flags & AHC_USEDEFAULTS) { 247 /* 248 * We can't "use defaults", as we have no way 249 * of knowing what default settings hould be. 250 */ 251 printf("%s: CardBus device requires an SEEPROM\n", 252 ahc_name(ahc)); 253 return; 254 } 255 256 printf("%s: %s", ahc_name(ahc), id_string); 257 } 258 259 /* 260 * XXX does this card have external SRAM? - fvdl 261 */ 262 263 /* 264 * Record our termination setting for the 265 * generic initialization routine. 266 */ 267 if ((sxfrctl1 & STPWEN) != 0) 268 ahc->flags |= AHC_TERM_ENB_A; 269 270 if (ahc_init(ahc)) { 271 ahc_free(ahc); 272 return; 273 } 274 275 ahc_attach(ahc); 276 } 277 278 int 279 ahc_cardbus_detach(self, flags) 280 struct device *self; 281 int flags; 282 { 283 struct ahc_cardbus_softc *csc = (void*)self; 284 struct ahc_softc *ahc = &csc->sc_ahc; 285 286 int rv; 287 288 rv = ahc_detach(ahc, flags); 289 if (rv) 290 return rv; 291 292 if (ahc->ih) { 293 cardbus_intr_disestablish(csc->sc_ct->ct_cc, 294 csc->sc_ct->ct_cf, ahc->ih); 295 ahc->ih = 0; 296 } 297 298 if (csc->sc_cbenable) { 299 if (csc->sc_cbenable == CARDBUS_MEM_ENABLE) 300 Cardbus_mapreg_unmap(csc->sc_ct, AHC_CARDBUS_MMBA, 301 ahc->tag, ahc->bsh, csc->sc_size); 302 else if (csc->sc_cbenable == CARDBUS_IO_ENABLE) 303 Cardbus_mapreg_unmap(csc->sc_ct, AHC_CARDBUS_IOBA, 304 ahc->tag, ahc->bsh, csc->sc_size); 305 csc->sc_cbenable = 0; 306 } 307 308 return (0); 309 } 310