1 /* $NetBSD: ahc_cardbus.c,v 1.9 2002/10/02 16:33:40 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * CardBus front-end for the Adaptec AIC-7xxx family of SCSI controllers. 42 * 43 * TODO: 44 * - power management 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: ahc_cardbus.c,v 1.9 2002/10/02 16:33:40 thorpej Exp $"); 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/queue.h> 55 #include <sys/device.h> 56 57 #include <machine/bus.h> 58 #include <machine/intr.h> 59 60 #include <dev/scsipi/scsi_all.h> 61 #include <dev/scsipi/scsipi_all.h> 62 #include <dev/scsipi/scsiconf.h> 63 64 #include <dev/pci/pcireg.h> 65 66 #include <dev/cardbus/cardbusvar.h> 67 #include <dev/cardbus/cardbusdevs.h> 68 69 #include <dev/ic/aic7xxxvar.h> 70 71 #include <dev/microcode/aic7xxx/aic7xxx_reg.h> 72 73 #define AHC_CARDBUS_IOBA 0x10 74 #define AHC_CARDBUS_MMBA 0x14 75 76 struct ahc_cardbus_softc { 77 struct ahc_softc sc_ahc; /* real AHC */ 78 79 /* CardBus-specific goo. */ 80 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 81 int sc_intrline; /* our interrupt line */ 82 cardbustag_t sc_tag; 83 84 int sc_cbenable; /* what CardBus access type to enable */ 85 int sc_csr; /* CSR bits */ 86 bus_size_t sc_size; 87 }; 88 89 int ahc_cardbus_match __P((struct device *, struct cfdata *, void *)); 90 void ahc_cardbus_attach __P((struct device *, struct device *, void *)); 91 int ahc_cardbus_detach __P((struct device *, int)); 92 93 CFATTACH_DECL(ahc_cardbus, sizeof(struct ahc_cardbus_softc), 94 ahc_cardbus_match, ahc_cardbus_attach, ahc_cardbus_detach, ahc_activate); 95 96 int 97 ahc_cardbus_match(parent, match, aux) 98 struct device *parent; 99 struct cfdata *match; 100 void *aux; 101 { 102 struct cardbus_attach_args *ca = aux; 103 104 if (CARDBUS_VENDOR(ca->ca_id) == CARDBUS_VENDOR_ADP && 105 CARDBUS_PRODUCT(ca->ca_id) == CARDBUS_PRODUCT_ADP_1480) 106 return (1); 107 108 return (0); 109 } 110 111 void 112 ahc_cardbus_attach(parent, self, aux) 113 struct device *parent, *self; 114 void *aux; 115 { 116 struct cardbus_attach_args *ca = aux; 117 struct ahc_cardbus_softc *csc = (void *) self; 118 struct ahc_softc *ahc = &csc->sc_ahc; 119 cardbus_devfunc_t ct = ca->ca_ct; 120 cardbus_chipset_tag_t cc = ct->ct_cc; 121 cardbus_function_tag_t cf = ct->ct_cf; 122 bus_space_tag_t bst; 123 bus_space_handle_t bsh; 124 pcireg_t reg; 125 u_int sxfrctl1 = 0; 126 ahc_chip ahc_t = AHC_NONE; 127 ahc_feature ahc_fe = AHC_FENONE; 128 ahc_flag ahc_f = AHC_FNONE; 129 130 131 csc->sc_ct = ct; 132 csc->sc_tag = ca->ca_tag; 133 csc->sc_intrline = ca->ca_intrline; 134 135 printf(": Adaptec ADP-1480 SCSI\n"); 136 137 /* 138 * Map the device. 139 */ 140 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE; 141 if (Cardbus_mapreg_map(csc->sc_ct, AHC_CARDBUS_MMBA, 142 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 143 &bst, &bsh, NULL, &csc->sc_size) == 0) { 144 csc->sc_cbenable = CARDBUS_MEM_ENABLE; 145 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE; 146 } else if (Cardbus_mapreg_map(csc->sc_ct, AHC_CARDBUS_IOBA, 147 PCI_MAPREG_TYPE_IO, 0, &bst, &bsh, NULL, &csc->sc_size) == 0) { 148 csc->sc_cbenable = CARDBUS_IO_ENABLE; 149 csc->sc_csr |= PCI_COMMAND_IO_ENABLE; 150 } else { 151 printf("%s: unable to map device registers\n", 152 ahc_name(ahc)); 153 return; 154 } 155 156 /* Make sure the right access type is on the CardBus bridge. */ 157 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cbenable); 158 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 159 160 /* Enable the appropriate bits in the PCI CSR. */ 161 reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG); 162 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 163 reg |= csc->sc_csr; 164 cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg); 165 166 /* 167 * Make sure the latency timer is set to some reasonable 168 * value. 169 */ 170 reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG); 171 if (PCI_LATTIMER(reg) < 0x20) { 172 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 173 reg |= (0x20 << PCI_LATTIMER_SHIFT); 174 cardbus_conf_write(cc, cf, ca->ca_tag, PCI_BHLC_REG, reg); 175 } 176 177 ahc->tag = bst; 178 ahc->bsh = bsh; 179 180 /* 181 * ADP-1480 is always an AIC-7860. 182 */ 183 ahc_t = AHC_AIC7860; 184 ahc_fe = AHC_AIC7860_FE; 185 186 /* 187 * On all CardBus adapters, we allow SCB paging. 188 */ 189 ahc_f = AHC_PAGESCBS; 190 191 if (ahc_alloc(ahc, bsh, bst, ca->ca_dmat, ahc_t | AHC_PCI /* XXX */, 192 ahc_fe, ahc_f) < 0) { 193 printf("%s: unable to initialize softc\n", ahc_name(ahc)); 194 return; 195 } 196 197 ahc->channel = 'A'; 198 199 ahc_reset(ahc); 200 201 /* 202 * Establish the interrupt. 203 */ 204 ahc->ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_BIO, 205 ahc_intr, ahc); 206 if (ahc->ih == NULL) { 207 printf("%s: unable to establish interrupt at %d\n", 208 ahc_name(ahc), ca->ca_intrline); 209 return; 210 } 211 printf("%s: interrupting at %d\n", ahc_name(ahc), ca->ca_intrline); 212 213 /* 214 * Do chip-specific initialization. 215 */ 216 { 217 u_char sblkctl; 218 const char *id_string; 219 220 switch (ahc->chip & AHC_CHIPID_MASK) { 221 case AHC_AIC7860: 222 id_string = "aic7860 "; 223 check_extport(ahc, &sxfrctl1); 224 break; 225 226 default: 227 printf("%s: unknown controller type\n", ahc_name(ahc)); 228 ahc_free(ahc); 229 return; 230 } 231 232 /* 233 * Take the LED out of diagnostic mode. 234 */ 235 sblkctl = ahc_inb(ahc, SBLKCTL); 236 ahc_outb(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON))); 237 238 /* 239 * I don't know where this is set in the SEEPROM or by the 240 * BIOS, so we default to 100%. 241 */ 242 ahc_outb(ahc, DSPCISTATUS, DFTHRSH_100); 243 244 if (ahc->flags & AHC_USEDEFAULTS) { 245 /* 246 * We can't "use defaults", as we have no way 247 * of knowing what default settings hould be. 248 */ 249 printf("%s: CardBus device requires an SEEPROM\n", 250 ahc_name(ahc)); 251 return; 252 } 253 254 printf("%s: %s", ahc_name(ahc), id_string); 255 } 256 257 /* 258 * XXX does this card have external SRAM? - fvdl 259 */ 260 261 /* 262 * Record our termination setting for the 263 * generic initialization routine. 264 */ 265 if ((sxfrctl1 & STPWEN) != 0) 266 ahc->flags |= AHC_TERM_ENB_A; 267 268 if (ahc_init(ahc)) { 269 ahc_free(ahc); 270 return; 271 } 272 273 ahc_attach(ahc); 274 } 275 276 int 277 ahc_cardbus_detach(self, flags) 278 struct device *self; 279 int flags; 280 { 281 struct ahc_cardbus_softc *csc = (void*)self; 282 struct ahc_softc *ahc = &csc->sc_ahc; 283 284 int rv; 285 286 rv = ahc_detach(ahc, flags); 287 if (rv) 288 return rv; 289 290 if (ahc->ih) { 291 cardbus_intr_disestablish(csc->sc_ct->ct_cc, 292 csc->sc_ct->ct_cf, ahc->ih); 293 ahc->ih = 0; 294 } 295 296 if (csc->sc_cbenable) { 297 if (csc->sc_cbenable == CARDBUS_MEM_ENABLE) 298 Cardbus_mapreg_unmap(csc->sc_ct, AHC_CARDBUS_MMBA, 299 ahc->tag, ahc->bsh, csc->sc_size); 300 else if (csc->sc_cbenable == CARDBUS_IO_ENABLE) 301 Cardbus_mapreg_unmap(csc->sc_ct, AHC_CARDBUS_IOBA, 302 ahc->tag, ahc->bsh, csc->sc_size); 303 csc->sc_cbenable = 0; 304 } 305 306 return (0); 307 } 308