xref: /netbsd/sys/dev/cardbus/cardbusreg.h (revision bf9ec67e)
1 /*	$NetBSD: cardbusreg.h,v 1.1 2001/06/01 10:30:37 haya Exp $ */
2 
3 /*
4  * Copyright (c) 2001
5  *       HAYAKAWA Koichi.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. The name of the author may not be used to endorse or promote products
16  *    derived from this software without specific prior written permission.
17  *
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
23  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
27  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
28  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _DEV_CARDBUS_CARDBUSREG_H_
33 #define _DEV_CARDBUS_CARDBUSREG_H_
34 
35 #include <dev/pci/pcivar.h>	/* for pcitag_t */
36 
37 typedef u_int32_t cardbusreg_t;
38 typedef pcitag_t cardbustag_t;
39 typedef int cardbus_intr_line_t;
40 
41 #define CARDBUS_ID_REG          0x00
42 
43 typedef u_int16_t cardbus_vendor_id_t;
44 typedef u_int16_t cardbus_product_id_t;
45 
46 #  define CARDBUS_VENDOR_SHIFT  0
47 #  define CARDBUS_VENDOR_MASK   0xffff
48 #  define CARDBUS_VENDOR(id) \
49 	    (((id) >> CARDBUS_VENDOR_SHIFT) & CARDBUS_VENDOR_MASK)
50 
51 #  define CARDBUS_PRODUCT_SHIFT  16
52 #  define CARDBUS_PRODUCT_MASK   0xffff
53 #  define CARDBUS_PRODUCT(id) \
54 	    (((id) >> CARDBUS_PRODUCT_SHIFT) & CARDBUS_PRODUCT_MASK)
55 
56 
57 #define	CARDBUS_COMMAND_STATUS_REG  0x04
58 
59 #  define CARDBUS_COMMAND_IO_ENABLE          0x00000001
60 #  define CARDBUS_COMMAND_MEM_ENABLE         0x00000002
61 #  define CARDBUS_COMMAND_MASTER_ENABLE      0x00000004
62 #  define CARDBUS_COMMAND_SPECIAL_ENABLE     0x00000008
63 #  define CARDBUS_COMMAND_INVALIDATE_ENABLE  0x00000010
64 #  define CARDBUS_COMMAND_PALETTE_ENABLE     0x00000020
65 #  define CARDBUS_COMMAND_PARITY_ENABLE      0x00000040
66 #  define CARDBUS_COMMAND_STEPPING_ENABLE    0x00000080
67 #  define CARDBUS_COMMAND_SERR_ENABLE        0x00000100
68 #  define CARDBUS_COMMAND_BACKTOBACK_ENABLE  0x00000200
69 
70 
71 #define CARDBUS_CLASS_REG       0x08
72 
73 #define	CARDBUS_CLASS_SHIFT				24
74 #define	CARDBUS_CLASS_MASK				0xff
75 #define	CARDBUS_CLASS(cr) \
76 	    (((cr) >> CARDBUS_CLASS_SHIFT) & CARDBUS_CLASS_MASK)
77 
78 #define	CARDBUS_SUBCLASS_SHIFT			16
79 #define	CARDBUS_SUBCLASS_MASK			0xff
80 #define	CARDBUS_SUBCLASS(cr) \
81 	    (((cr) >> CARDBUS_SUBCLASS_SHIFT) & CARDBUS_SUBCLASS_MASK)
82 
83 #define	CARDBUS_INTERFACE_SHIFT			8
84 #define	CARDBUS_INTERFACE_MASK			0xff
85 #define	CARDBUS_INTERFACE(cr) \
86 	    (((cr) >> CARDBUS_INTERFACE_SHIFT) & CARDBUS_INTERFACE_MASK)
87 
88 #define	CARDBUS_REVISION_SHIFT			0
89 #define	CARDBUS_REVISION_MASK			0xff
90 #define	CARDBUS_REVISION(cr) \
91 	    (((cr) >> CARDBUS_REVISION_SHIFT) & CARDBUS_REVISION_MASK)
92 
93 /* base classes */
94 #define	CARDBUS_CLASS_PREHISTORIC		0x00
95 #define	CARDBUS_CLASS_MASS_STORAGE		0x01
96 #define	CARDBUS_CLASS_NETWORK			0x02
97 #define	CARDBUS_CLASS_DISPLAY			0x03
98 #define	CARDBUS_CLASS_MULTIMEDIA		0x04
99 #define	CARDBUS_CLASS_MEMORY			0x05
100 #define	CARDBUS_CLASS_BRIDGE			0x06
101 #define	CARDBUS_CLASS_COMMUNICATIONS		0x07
102 #define	CARDBUS_CLASS_SYSTEM			0x08
103 #define	CARDBUS_CLASS_INPUT			0x09
104 #define	CARDBUS_CLASS_DOCK			0x0a
105 #define	CARDBUS_CLASS_PROCESSOR			0x0b
106 #define	CARDBUS_CLASS_SERIALBUS			0x0c
107 #define	CARDBUS_CLASS_UNDEFINED			0xff
108 
109 /* 0x07 serial bus subclasses */
110 #define	CARDBUS_SUBCLASS_COMMUNICATIONS_SERIAL	0x00
111 
112 /* 0x0c serial bus subclasses */
113 #define	CARDBUS_SUBCLASS_SERIALBUS_FIREWIRE	0x00
114 #define	CARDBUS_SUBCLASS_SERIALBUS_ACCESS	0x01
115 #define	CARDBUS_SUBCLASS_SERIALBUS_SSA		0x02
116 #define	CARDBUS_SUBCLASS_SERIALBUS_USB		0x03
117 #define	CARDBUS_SUBCLASS_SERIALBUS_FIBER	0x04
118 
119 /* BIST, Header Type, Latency Timer, Cache Line Size */
120 #define CARDBUS_BHLC_REG        0x0c
121 
122 #define	CARDBUS_BIST_SHIFT        24
123 #define	CARDBUS_BIST_MASK       0xff
124 #define	CARDBUS_BIST(bhlcr) \
125 	    (((bhlcr) >> CARDBUS_BIST_SHIFT) & CARDBUS_BIST_MASK)
126 
127 #define	CARDBUS_HDRTYPE_SHIFT     16
128 #define	CARDBUS_HDRTYPE_MASK    0xff
129 #define	CARDBUS_HDRTYPE(bhlcr) \
130 	    (((bhlcr) >> CARDBUS_HDRTYPE_SHIFT) & CARDBUS_HDRTYPE_MASK)
131 
132 #define	CARDBUS_HDRTYPE_TYPE(bhlcr) \
133 	    (CARDBUS_HDRTYPE(bhlcr) & 0x7f)
134 #define	CARDBUS_HDRTYPE_MULTIFN(bhlcr) \
135 	    ((CARDBUS_HDRTYPE(bhlcr) & 0x80) != 0)
136 
137 #define	CARDBUS_LATTIMER_SHIFT      8
138 #define	CARDBUS_LATTIMER_MASK    0xff
139 #define	CARDBUS_LATTIMER(bhlcr) \
140 	    (((bhlcr) >> CARDBUS_LATTIMER_SHIFT) & CARDBUS_LATTIMER_MASK)
141 
142 #define	CARDBUS_CACHELINE_SHIFT     0
143 #define	CARDBUS_CACHELINE_MASK   0xff
144 #define	CARDBUS_CACHELINE(bhlcr) \
145 	    (((bhlcr) >> CARDBUS_CACHELINE_SHIFT) & CARDBUS_CACHELINE_MASK)
146 
147 
148 /* Base Resisters */
149 #define CARDBUS_BASE0_REG  0x10
150 #define CARDBUS_BASE1_REG  0x14
151 #define CARDBUS_BASE2_REG  0x18
152 #define CARDBUS_BASE3_REG  0x1C
153 #define CARDBUS_BASE4_REG  0x20
154 #define CARDBUS_BASE5_REG  0x24
155 #define CARDBUS_CIS_REG    0x28
156 #define CARDBUS_ROM_REG	   0x30
157 #  define CARDBUS_CIS_ASIMASK 0x07
158 #    define CARDBUS_CIS_ASI(x) (CARDBUS_CIS_ASIMASK & (x))
159 #  define CARDBUS_CIS_ASI_TUPLE 0x00
160 #  define CARDBUS_CIS_ASI_BAR0  0x01
161 #  define CARDBUS_CIS_ASI_BAR1  0x02
162 #  define CARDBUS_CIS_ASI_BAR2  0x03
163 #  define CARDBUS_CIS_ASI_BAR3  0x04
164 #  define CARDBUS_CIS_ASI_BAR4  0x05
165 #  define CARDBUS_CIS_ASI_BAR5  0x06
166 #  define CARDBUS_CIS_ASI_ROM   0x07
167 #  define CARDBUS_CIS_ADDRMASK 0x0ffffff8
168 #    define CARDBUS_CIS_ADDR(x) (CARDBUS_CIS_ADDRMASK & (x))
169 #    define CARDBUS_CIS_ASI_BAR(x) (((CARDBUS_CIS_ASIMASK & (x))-1)*4+0x10)
170 #    define CARDBUS_CIS_ASI_ROM_IMAGE(x) (((x) >> 28) & 0xf)
171 
172 #define	CARDBUS_INTERRUPT_REG   0x3c
173 
174 #define CARDBUS_MAPREG_TYPE_MEM		0x00000000
175 #define CARDBUS_MAPREG_TYPE_IO		0x00000001
176 
177 #endif /* !_DEV_CARDBUS_CARDBUSREG_H_ */
178