xref: /netbsd/sys/dev/cardbus/if_atw_cardbus.c (revision 6550d01e)
1 /* $NetBSD: if_atw_cardbus.c,v 1.34 2010/03/04 22:34:37 dyoung Exp $ */
2 
3 /*-
4  * Copyright (c) 1999, 2000, 2003 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.  This code was adapted for the ADMtek ADM8211
10  * by David Young.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 /*
35  * CardBus bus front-end for the ADMtek ADM8211 802.11 MAC/BBP driver.
36  */
37 
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: if_atw_cardbus.c,v 1.34 2010/03/04 22:34:37 dyoung Exp $");
40 
41 #include "opt_inet.h"
42 
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/mbuf.h>
46 #include <sys/malloc.h>
47 #include <sys/kernel.h>
48 #include <sys/socket.h>
49 #include <sys/ioctl.h>
50 #include <sys/errno.h>
51 #include <sys/device.h>
52 
53 #include <machine/endian.h>
54 
55 #include <net/if.h>
56 #include <net/if_dl.h>
57 #include <net/if_media.h>
58 #include <net/if_ether.h>
59 
60 #include <net80211/ieee80211_netbsd.h>
61 #include <net80211/ieee80211_radiotap.h>
62 #include <net80211/ieee80211_var.h>
63 
64 #ifdef INET
65 #include <netinet/in.h>
66 #include <netinet/if_inarp.h>
67 #endif
68 
69 
70 #include <sys/bus.h>
71 #include <sys/intr.h>
72 
73 #include <dev/ic/atwreg.h>
74 #include <dev/ic/rf3000reg.h>
75 #include <dev/ic/si4136reg.h>
76 #include <dev/ic/atwvar.h>
77 
78 #include <dev/pci/pcivar.h>
79 #include <dev/pci/pcireg.h>
80 #include <dev/pci/pcidevs.h>
81 
82 #include <dev/cardbus/cardbusvar.h>
83 #include <dev/pci/pcidevs.h>
84 
85 /*
86  * PCI configuration space registers used by the ADM8211.
87  */
88 #define	ATW_PCI_IOBA		0x10	/* i/o mapped base */
89 #define	ATW_PCI_MMBA		0x14	/* memory mapped base */
90 
91 struct atw_cardbus_softc {
92 	struct atw_softc sc_atw;
93 
94 	/* CardBus-specific goo. */
95 	void			*sc_ih;		/* interrupt handle */
96 	cardbus_devfunc_t	sc_ct;		/* our CardBus devfuncs */
97 	pcitag_t		sc_tag;		/* our CardBus tag */
98 	pcireg_t		sc_csr;		/* CSR bits */
99 	bus_size_t		sc_mapsize;	/* the size of mapped bus space
100 						 * region
101 						 */
102 
103 	int			sc_bar_reg;	/* which BAR to use */
104 	pcireg_t		sc_bar_val;	/* value of the BAR */
105 
106 	cardbus_intr_line_t sc_intrline; /* interrupt line */
107 };
108 
109 static int	atw_cardbus_match(device_t, cfdata_t, void *);
110 static void	atw_cardbus_attach(device_t, device_t, void *);
111 static int	atw_cardbus_detach(device_t, int);
112 
113 CFATTACH_DECL3_NEW(atw_cardbus, sizeof(struct atw_cardbus_softc),
114     atw_cardbus_match, atw_cardbus_attach, atw_cardbus_detach, atw_activate,
115     NULL, NULL, DVF_DETACH_SHUTDOWN);
116 
117 static void	atw_cardbus_setup(struct atw_cardbus_softc *);
118 
119 static bool	atw_cardbus_suspend(device_t, const pmf_qual_t *);
120 static bool	atw_cardbus_resume(device_t, const pmf_qual_t *);
121 
122 static const struct atw_cardbus_product *atw_cardbus_lookup
123    (const struct cardbus_attach_args *);
124 
125 static const struct atw_cardbus_product {
126 	u_int32_t	 acp_vendor;	/* PCI vendor ID */
127 	u_int32_t	 acp_product;	/* PCI product ID */
128 	const char	*acp_product_name;
129 } atw_cardbus_products[] = {
130 	{ PCI_VENDOR_ADMTEK,		PCI_PRODUCT_ADMTEK_ADM8211,
131 	  "ADMtek ADM8211 802.11 MAC/BBP" },
132 
133 	{ 0,				0,	NULL },
134 };
135 
136 static const struct atw_cardbus_product *
137 atw_cardbus_lookup(const struct cardbus_attach_args *ca)
138 {
139 	const struct atw_cardbus_product *acp;
140 
141 	for (acp = atw_cardbus_products; acp->acp_product_name != NULL; acp++) {
142 		if (PCI_VENDOR(ca->ca_id) == acp->acp_vendor &&
143 		    PCI_PRODUCT(ca->ca_id) == acp->acp_product)
144 			return acp;
145 	}
146 	return NULL;
147 }
148 
149 static int
150 atw_cardbus_match(device_t parent, cfdata_t match, void *aux)
151 {
152 	struct cardbus_attach_args *ca = aux;
153 
154 	if (atw_cardbus_lookup(ca) != NULL)
155 		return 1;
156 
157 	return 0;
158 }
159 
160 static void
161 atw_cardbus_attach(device_t parent, device_t self, void *aux)
162 {
163 	struct atw_cardbus_softc *csc = device_private(self);
164 	struct atw_softc *sc = &csc->sc_atw;
165 	struct cardbus_attach_args *ca = aux;
166 	cardbus_devfunc_t ct = ca->ca_ct;
167 	const struct atw_cardbus_product *acp;
168 #if 0
169 	int i;
170 #define	FUNCREG(__x)	{#__x, (__x)}
171 	struct {
172 		const char *name;
173 		bus_size_t ofs;
174 	} funcregs[] = {
175 		FUNCREG(ATW_FER), FUNCREG(ATW_FEMR), FUNCREG(ATW_FPSR),
176 		FUNCREG(ATW_FFER)
177 	};
178 #undef FUNCREG
179 #endif
180 	bus_addr_t adr;
181 
182 	sc->sc_dev = self;
183 	sc->sc_dmat = ca->ca_dmat;
184 	csc->sc_ct = ct;
185 	csc->sc_tag = ca->ca_tag;
186 
187 	acp = atw_cardbus_lookup(ca);
188 	if (acp == NULL) {
189 		printf("\n");
190 		panic("atw_cardbus_attach: impossible");
191 	}
192 
193 	/* Get revision info. */
194 	sc->sc_rev = PCI_REVISION(ca->ca_class);
195 
196 	printf(": %s, revision %d.%d\n", acp->acp_product_name,
197 	    (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
198 
199 #if 0
200 	printf("%s: signature %08x\n", device_xname(self),
201 	    (rev >> 4) & 0xf, rev & 0xf,
202 	    Cardbus_conf_read(ct, csc->sc_tag, 0x80));
203 #endif
204 
205 	/*
206 	 * Map the device.
207 	 */
208 	csc->sc_csr = PCI_COMMAND_MASTER_ENABLE |
209 	              PCI_COMMAND_PARITY_ENABLE |
210 		      PCI_COMMAND_SERR_ENABLE;
211 	if (Cardbus_mapreg_map(ct, ATW_PCI_MMBA,
212 	    PCI_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr,
213 	    &csc->sc_mapsize) == 0) {
214 #if 0
215 		printf("%s: atw_cardbus_attach mapped %d bytes mem space\n",
216 		    device_xname(self), csc->sc_mapsize);
217 #endif
218 		csc->sc_csr |= PCI_COMMAND_MEM_ENABLE;
219 		csc->sc_bar_reg = ATW_PCI_MMBA;
220 		csc->sc_bar_val = adr | PCI_MAPREG_TYPE_MEM;
221 	} else if (Cardbus_mapreg_map(ct, ATW_PCI_IOBA,
222 	    PCI_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
223 	    &csc->sc_mapsize) == 0) {
224 #if 0
225 		printf("%s: atw_cardbus_attach mapped %d bytes I/O space\n",
226 		    device_xname(self), csc->sc_mapsize);
227 #endif
228 		csc->sc_csr |= PCI_COMMAND_IO_ENABLE;
229 		csc->sc_bar_reg = ATW_PCI_IOBA;
230 		csc->sc_bar_val = adr | PCI_MAPREG_TYPE_IO;
231 	} else {
232 		aprint_error_dev(self, "unable to map device registers\n");
233 		return;
234 	}
235 
236 	/*
237 	 * Bring the chip out of powersave mode and initialize the
238 	 * configuration registers.
239 	 */
240 	atw_cardbus_setup(csc);
241 
242 	/* Remember which interrupt line. */
243 	csc->sc_intrline = ca->ca_intrline;
244 
245 #if 0
246 	/*
247 	 * The CardBus cards will make it to store-and-forward mode as
248 	 * soon as you put them under any kind of load, so just start
249 	 * out there.
250 	 */
251 	sc->sc_txthresh = 3; /* TBD name constant */
252 #endif
253 
254 #if 0
255 	for (i = 0; i < __arraycount(funcregs); i++) {
256 		aprint_error_dev(sc->sc_dev, "%s %" PRIx32 "\n",
257 		    funcregs[i].name, ATW_READ(sc, funcregs[i].ofs));
258 	}
259 #endif
260 
261 	ATW_WRITE(sc, ATW_FEMR, 0);
262 	ATW_WRITE(sc, ATW_FER, ATW_READ(sc, ATW_FER));
263 
264 	/*
265 	 * Bus-independent attach.
266 	 */
267 	atw_attach(sc);
268 
269 	if (pmf_device_register1(sc->sc_dev, atw_cardbus_suspend,
270 	    atw_cardbus_resume, atw_shutdown))
271 		pmf_class_network_register(sc->sc_dev, &sc->sc_if);
272 	else
273 		aprint_error_dev(sc->sc_dev,
274 		    "couldn't establish power handler\n");
275 
276 	/*
277 	 * Power down the socket.
278 	 */
279 	pmf_device_suspend(sc->sc_dev, &sc->sc_qual);
280 }
281 
282 static int
283 atw_cardbus_detach(device_t self, int flags)
284 {
285 	struct atw_cardbus_softc *csc = device_private(self);
286 	struct atw_softc *sc = &csc->sc_atw;
287 	struct cardbus_devfunc *ct = csc->sc_ct;
288 	int rv;
289 
290 #if defined(DIAGNOSTIC)
291 	if (ct == NULL)
292 		panic("%s: data structure lacks", device_xname(self));
293 #endif
294 
295 	rv = atw_detach(sc);
296 	if (rv != 0)
297 		return rv;
298 
299 	/*
300 	 * Unhook the interrupt handler.
301 	 */
302 	if (csc->sc_ih != NULL)
303 		Cardbus_intr_disestablish(ct, csc->sc_ih);
304 
305 	/*
306 	 * Release bus space and close window.
307 	 */
308 	if (csc->sc_bar_reg != 0)
309 		Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
310 		    sc->sc_st, sc->sc_sh, csc->sc_mapsize);
311 
312 	return 0;
313 }
314 
315 static bool
316 atw_cardbus_resume(device_t self, const pmf_qual_t *qual)
317 {
318 	struct atw_cardbus_softc *csc = device_private(self);
319 	struct atw_softc *sc = &csc->sc_atw;
320 	cardbus_devfunc_t ct = csc->sc_ct;
321 
322 	/*
323 	 * Map and establish the interrupt.
324 	 */
325 	csc->sc_ih = Cardbus_intr_establish(ct, csc->sc_intrline, IPL_NET,
326 	    atw_intr, sc);
327 	if (csc->sc_ih == NULL) {
328 		aprint_error_dev(sc->sc_dev, "unable to establish interrupt\n");
329 		return false;
330 	}
331 
332 	return true;
333 }
334 
335 static bool
336 atw_cardbus_suspend(device_t self, const pmf_qual_t *qual)
337 {
338 	struct atw_cardbus_softc *csc = device_private(self);
339 	cardbus_devfunc_t ct = csc->sc_ct;
340 
341 	/* Unhook the interrupt handler. */
342 	Cardbus_intr_disestablish(ct, csc->sc_ih);
343 	csc->sc_ih = NULL;
344 
345 	return atw_suspend(self, qual);
346 }
347 
348 static void
349 atw_cardbus_setup(struct atw_cardbus_softc *csc)
350 {
351 	cardbus_devfunc_t ct = csc->sc_ct;
352 	pcireg_t csr;
353 	int rc;
354 
355 	if ((rc = cardbus_set_powerstate(ct, csc->sc_tag, PCI_PWR_D0)) != 0)
356 		aprint_debug("%s: cardbus_set_powerstate %d\n", __func__, rc);
357 
358 	/* Program the BAR. */
359 	Cardbus_conf_write(ct, csc->sc_tag, csc->sc_bar_reg,
360 	    csc->sc_bar_val);
361 
362 	/* Enable the appropriate bits in the PCI CSR. */
363 	csr = Cardbus_conf_read(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG);
364 	csr &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
365 	csr |= csc->sc_csr;
366 	Cardbus_conf_write(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG, csr);
367 }
368