1 /* $NetBSD: comreg.h,v 1.11 1997/10/19 14:26:21 fvdl Exp $ */ 2 3 /*- 4 * Copyright (c) 1991 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the University of 18 * California, Berkeley and its contributors. 19 * 4. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)comreg.h 7.2 (Berkeley) 5/9/91 36 */ 37 38 #include <dev/ic/ns16550reg.h> 39 40 #define COM_FREQ 1843200 /* 16-bit baud rate divisor */ 41 #define COM_TOLERANCE 30 /* baud rate tolerance, in 0.1% units */ 42 43 /* interrupt enable register */ 44 #define IER_ERXRDY 0x1 /* Enable receiver interrupt */ 45 #define IER_ETXRDY 0x2 /* Enable transmitter empty interrupt */ 46 #define IER_ERLS 0x4 /* Enable line status interrupt */ 47 #define IER_EMSC 0x8 /* Enable modem status interrupt */ 48 #define IER_ERTS 0x40 /* Enable RTS interrupt */ 49 #define IER_ECTS 0x80 /* Enable CTS interrupt */ 50 51 /* interrupt identification register */ 52 #define IIR_IMASK 0xf 53 #define IIR_RXTOUT 0xc 54 #define IIR_RLS 0x6 /* Line status change */ 55 #define IIR_RXRDY 0x4 /* Receiver ready */ 56 #define IIR_TXRDY 0x2 /* Transmitter ready */ 57 #define IIR_MLSC 0x0 /* Modem status */ 58 #define IIR_NOPEND 0x1 /* No pending interrupts */ 59 #define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */ 60 61 /* fifo control register */ 62 #define FIFO_ENABLE 0x01 /* Turn the FIFO on */ 63 #define FIFO_RCV_RST 0x02 /* Reset RX FIFO */ 64 #define FIFO_XMT_RST 0x04 /* Reset TX FIFO */ 65 #define FIFO_DMA_MODE 0x08 66 #define FIFO_TRIGGER_1 0x00 /* Trigger RXRDY intr on 1 character */ 67 #define FIFO_TRIGGER_4 0x40 /* ibid 4 */ 68 #define FIFO_TRIGGER_8 0x80 /* ibid 8 */ 69 #define FIFO_TRIGGER_14 0xc0 /* ibid 14 */ 70 71 /* enhanced feature register */ 72 #define EFR_AUTOCTS 0x80 /* Automatic CTS flow control */ 73 #define EFR_AUTORTS 0x40 /* Automatic RTS flow control */ 74 #define EFR_SPECIAL 0x20 /* Special char detect */ 75 #define EFR_EFCR 0x10 /* Enhanced function control bit */ 76 #define EFR_TXFLOWBOTH 0x0c /* Automatic transmit XON/XOFF 1 and 2 */ 77 #define EFR_TXFLOW1 0x08 /* Automatic transmit XON/XOFF 1 */ 78 #define EFR_TXFLOW2 0x04 /* Automatic transmit XON/XOFF 2 */ 79 #define EFR_TXFLOWNONE 0x00 /* No automatic XON/XOFF transmit */ 80 #define EFR_RXFLOWBOTH 0x03 /* Automatic receive XON/XOFF 1 and 2 */ 81 #define EFR_RXFLOW1 0x02 /* Automatic receive XON/XOFF 1 */ 82 #define EFR_RXFLOW2 0x01 /* Automatic receive XON/XOFF 2 */ 83 #define EFR_RXFLOWNONE 0x00 /* No automatic XON/XOFF receive */ 84 85 /* line control register */ 86 #define LCR_EERS 0xBF /* Enable access to Enhanced Register Set */ 87 #define LCR_DLAB 0x80 /* Divisor latch access enable */ 88 #define LCR_SBREAK 0x40 /* Break Control */ 89 #define LCR_PZERO 0x38 /* Space parity */ 90 #define LCR_PONE 0x28 /* Mark parity */ 91 #define LCR_PEVEN 0x18 /* Even parity */ 92 #define LCR_PODD 0x08 /* Odd parity */ 93 #define LCR_PNONE 0x00 /* No parity */ 94 #define LCR_PENAB 0x08 /* XXX - low order bit of all parity */ 95 #define LCR_STOPB 0x04 /* 2 stop bits per serial word */ 96 #define LCR_8BITS 0x03 /* 8 bits per serial word */ 97 #define LCR_7BITS 0x02 /* 7 bits */ 98 #define LCR_6BITS 0x01 /* 6 bits */ 99 #define LCR_5BITS 0x00 /* 5 bits */ 100 101 /* modem control register */ 102 #define MCR_LOOPBACK 0x10 /* Loop test: echos from TX to RX */ 103 #define MCR_IENABLE 0x08 /* Out2: enables UART interrupts */ 104 #define MCR_DRS 0x04 /* Out1: resets some internal modems */ 105 #define MCR_RTS 0x02 /* Request To Send */ 106 #define MCR_DTR 0x01 /* Data Terminal Ready */ 107 108 /* line status register */ 109 #define LSR_RCV_FIFO 0x80 110 #define LSR_TSRE 0x40 /* Transmitter empty: byte sent */ 111 #define LSR_TXRDY 0x20 /* Transmitter buffer empty */ 112 #define LSR_BI 0x10 /* Break detected */ 113 #define LSR_FE 0x08 /* Framing error: bad stop bit */ 114 #define LSR_PE 0x04 /* Parity error */ 115 #define LSR_OE 0x02 /* Overrun, lost incoming byte */ 116 #define LSR_RXRDY 0x01 /* Byte ready in Receive Buffer */ 117 #define LSR_RCV_MASK 0x1f /* Mask for incoming data or error */ 118 119 /* modem status register */ 120 /* All deltas are from the last read of the MSR. */ 121 #define MSR_DCD 0x80 /* Current Data Carrier Detect */ 122 #define MSR_RI 0x40 /* Current Ring Indicator */ 123 #define MSR_DSR 0x20 /* Current Data Set Ready */ 124 #define MSR_CTS 0x10 /* Current Clear to Send */ 125 #define MSR_DDCD 0x08 /* DCD has changed state */ 126 #define MSR_TERI 0x04 /* RI has toggled low to high */ 127 #define MSR_DDSR 0x02 /* DSR has changed state */ 128 #define MSR_DCTS 0x01 /* CTS has changed state */ 129 130 /* XXX ISA-specific. */ 131 #define COM_NPORTS 8 132