1 /* $NetBSD: cs4237reg.h,v 1.1 1999/09/06 17:07:05 rh Exp $ */ 2 3 /* 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Rene Hexel (rh@netbsd.org). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* CS4237/4236B mode3 extended register, added to AD1848 registers */ 40 #define CS_XREG 23 /* mode 3 extended register access */ 41 42 /* ALT_FEATURE3 - register I23 */ 43 #define ALT_F3_XA4 0x04 /* Extended Register Address bit 4 */ 44 #define ALT_F3_XRAE 0x08 /* Extended Register Access Enable */ 45 #define ALT_F3_XA0 0x10 /* Extended Register Address bit 0 */ 46 #define ALT_F3_XA1 0x20 /* Extended Register Address bit 1 */ 47 #define ALT_F3_XA2 0x40 /* Extended Register Address bit 2 */ 48 #define ALT_F3_XA3 0x80 /* Extended Register Address bit 3 */ 49 50 /* extended register set, accessed indirectly through I23 */ 51 #define CS_X_LEFT_LINE_ALT_VOL 0x08 /* Left LINE Alternate Volume */ 52 #define CS_X_RIGHT_LINE_ALT_VOL 0x18 /* Right LINE Alternate Volume */ 53 #define CS_X_LEFT_MIC_VOL 0x28 /* Left Microphone Volume */ 54 #define CS_X_RIGHT_MIC_VOL 0x38 /* Right Microphone Volume */ 55 #define CS_X_SYNTHINPUT_CONTROL 0x48 /* Synthesis and Input Mixer Control */ 56 #define CS_X_RIGHTINPUT_CONTROL 0x58 /* Right Input Mixer Control */ 57 #define CS_X_LEFT_FM_SYNTH_VOL 0x68 /* Left FM Synthesis Volume */ 58 #define CS_X_RIGHT_FM_SYNTH_VOL 0x78 /* Right FM Synthesis Volume */ 59 #define CS_X_LEFT_DSP_SER_VOL 0x88 /* Left DSP Serial Port Volume */ 60 #define CS_X_RIGHT_DSP_SER_VOL 0x98 /* Right DSP Serial Port Volume */ 61 #define CS_X_RIGHT_LOOPBACK_VOL 0xa8 /* Right Loopback Monitor Volume */ 62 #define CS_X_DAC_MUTE_IFSE_EN 0xb8 /* DAC Mute and IFSE Enable */ 63 #define CS_X_INDEP_ADC_FREQ 0xc8 /* Independendt ADC Sample Freq */ 64 #define CS_X_INDEP_DAC_FREQ 0xd8 /* Independendt DAC Sample Freq */ 65 #define CS_X_LEFT_DIGITAL_VOL 0xe8 /* Left Master Digital Audio Volume */ 66 #define CS_X_RIGHT_DIGITAL_VOL 0xf8 /* Right Master Digital Audio Volume */ 67 #define CS_X_LEFT_WAVE_SER_VOL 0x0c /* Left Wavetable Serial Port Volume */ 68 #define CS_X_RIGHT_WAVE_SER_VOL 0x1c /* Right Wavetable Serial Port Volume */ 69 #define CS_X_CHIP_VERSION 0x9c /* Chip Version and ID */ 70 71 /* CS_X_CHIP_VERSION - register X25 */ 72 #define X_CHIP_VERSIONF_CID 0x1f /* Chip ID mask */ 73 #define X_CHIP_VERSIONF_REV 0xe0 /* Chip Revision mask */ 74 75 #define X_CHIP_CID_CS4236BB 0x00 /* CS4236B revision B */ 76 #define X_CHIP_CID_CS4236B 0x0b /* CS4236B other revision */ 77 #define X_CHIP_CID_CS4237B 0x08 /* CS4237B */ 78