1 /* $NetBSD: elinkxl.c,v 1.63 2002/05/12 15:48:38 wiz Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: elinkxl.c,v 1.63 2002/05/12 15:48:38 wiz Exp $"); 41 42 #include "bpfilter.h" 43 #include "rnd.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/callout.h> 48 #include <sys/kernel.h> 49 #include <sys/mbuf.h> 50 #include <sys/socket.h> 51 #include <sys/ioctl.h> 52 #include <sys/errno.h> 53 #include <sys/syslog.h> 54 #include <sys/select.h> 55 #include <sys/device.h> 56 #if NRND > 0 57 #include <sys/rnd.h> 58 #endif 59 60 #include <uvm/uvm_extern.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_ether.h> 65 #include <net/if_media.h> 66 67 #if NBPFILTER > 0 68 #include <net/bpf.h> 69 #include <net/bpfdesc.h> 70 #endif 71 72 #include <machine/cpu.h> 73 #include <machine/bus.h> 74 #include <machine/intr.h> 75 #include <machine/endian.h> 76 77 #include <dev/mii/miivar.h> 78 #include <dev/mii/mii.h> 79 #include <dev/mii/mii_bitbang.h> 80 81 #include <dev/ic/elink3reg.h> 82 /* #include <dev/ic/elink3var.h> */ 83 #include <dev/ic/elinkxlreg.h> 84 #include <dev/ic/elinkxlvar.h> 85 86 #ifdef DEBUG 87 int exdebug = 0; 88 #endif 89 90 /* ifmedia callbacks */ 91 int ex_media_chg __P((struct ifnet *ifp)); 92 void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req)); 93 94 void ex_probe_media __P((struct ex_softc *)); 95 void ex_set_filter __P((struct ex_softc *)); 96 void ex_set_media __P((struct ex_softc *)); 97 struct mbuf *ex_get __P((struct ex_softc *, int)); 98 u_int16_t ex_read_eeprom __P((struct ex_softc *, int)); 99 int ex_init __P((struct ifnet *)); 100 void ex_read __P((struct ex_softc *)); 101 void ex_reset __P((struct ex_softc *)); 102 void ex_set_mc __P((struct ex_softc *)); 103 void ex_getstats __P((struct ex_softc *)); 104 void ex_printstats __P((struct ex_softc *)); 105 void ex_tick __P((void *)); 106 107 int ex_enable __P((struct ex_softc *)); 108 void ex_disable __P((struct ex_softc *)); 109 void ex_power __P((int, void *)); 110 111 static int ex_eeprom_busy __P((struct ex_softc *)); 112 static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *)); 113 static void ex_init_txdescs __P((struct ex_softc *)); 114 115 static void ex_shutdown __P((void *)); 116 static void ex_start __P((struct ifnet *)); 117 static void ex_txstat __P((struct ex_softc *)); 118 119 int ex_mii_readreg __P((struct device *, int, int)); 120 void ex_mii_writereg __P((struct device *, int, int, int)); 121 void ex_mii_statchg __P((struct device *)); 122 123 void ex_probemedia __P((struct ex_softc *)); 124 125 /* 126 * Structure to map media-present bits in boards to ifmedia codes and 127 * printable media names. Used for table-driven ifmedia initialization. 128 */ 129 struct ex_media { 130 int exm_mpbit; /* media present bit */ 131 const char *exm_name; /* name of medium */ 132 int exm_ifmedia; /* ifmedia word for medium */ 133 int exm_epmedia; /* ELINKMEDIA_* constant */ 134 }; 135 136 /* 137 * Media table for 3c90x chips. Note that chips with MII have no 138 * `native' media. 139 */ 140 struct ex_media ex_native_media[] = { 141 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 142 ELINKMEDIA_10BASE_T }, 143 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 144 ELINKMEDIA_10BASE_T }, 145 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 146 ELINKMEDIA_AUI }, 147 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 148 ELINKMEDIA_10BASE_2 }, 149 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 150 ELINKMEDIA_100BASE_TX }, 151 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 152 ELINKMEDIA_100BASE_TX }, 153 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 154 ELINKMEDIA_100BASE_FX }, 155 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 156 ELINKMEDIA_MII }, 157 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 158 ELINKMEDIA_100BASE_T4 }, 159 { 0, NULL, 0, 160 0 }, 161 }; 162 163 /* 164 * MII bit-bang glue. 165 */ 166 u_int32_t ex_mii_bitbang_read __P((struct device *)); 167 void ex_mii_bitbang_write __P((struct device *, u_int32_t)); 168 169 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 170 ex_mii_bitbang_read, 171 ex_mii_bitbang_write, 172 { 173 ELINK_PHY_DATA, /* MII_BIT_MDO */ 174 ELINK_PHY_DATA, /* MII_BIT_MDI */ 175 ELINK_PHY_CLK, /* MII_BIT_MDC */ 176 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 177 0, /* MII_BIT_DIR_PHY_HOST */ 178 } 179 }; 180 181 /* 182 * Back-end attach and configure. 183 */ 184 void 185 ex_config(sc) 186 struct ex_softc *sc; 187 { 188 struct ifnet *ifp; 189 u_int16_t val; 190 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 191 bus_space_tag_t iot = sc->sc_iot; 192 bus_space_handle_t ioh = sc->sc_ioh; 193 int i, error, attach_stage; 194 195 callout_init(&sc->ex_mii_callout); 196 197 ex_reset(sc); 198 199 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 200 macaddr[0] = val >> 8; 201 macaddr[1] = val & 0xff; 202 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 203 macaddr[2] = val >> 8; 204 macaddr[3] = val & 0xff; 205 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 206 macaddr[4] = val >> 8; 207 macaddr[5] = val & 0xff; 208 209 printf("%s: MAC address %s\n", sc->sc_dev.dv_xname, 210 ether_sprintf(macaddr)); 211 212 if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) { 213 GO_WINDOW(2); 214 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS); 215 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) 216 val |= ELINK_RESET_OPT_LEDPOLAR; 217 if (sc->ex_conf & EX_CONF_PHY_POWER) 218 val |= ELINK_RESET_OPT_PHYPOWER; 219 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val); 220 } 221 222 attach_stage = 0; 223 224 /* 225 * Allocate the upload descriptors, and create and load the DMA 226 * map for them. 227 */ 228 if ((error = bus_dmamem_alloc(sc->sc_dmat, 229 EX_NUPD * sizeof (struct ex_upd), PAGE_SIZE, 0, &sc->sc_useg, 1, 230 &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) { 231 printf("%s: can't allocate upload descriptors, error = %d\n", 232 sc->sc_dev.dv_xname, error); 233 goto fail; 234 } 235 236 attach_stage = 1; 237 238 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg, 239 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 240 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 241 printf("%s: can't map upload descriptors, error = %d\n", 242 sc->sc_dev.dv_xname, error); 243 goto fail; 244 } 245 246 attach_stage = 2; 247 248 if ((error = bus_dmamap_create(sc->sc_dmat, 249 EX_NUPD * sizeof (struct ex_upd), 1, 250 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 251 &sc->sc_upd_dmamap)) != 0) { 252 printf("%s: can't create upload desc. DMA map, error = %d\n", 253 sc->sc_dev.dv_xname, error); 254 goto fail; 255 } 256 257 attach_stage = 3; 258 259 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 260 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 261 BUS_DMA_NOWAIT)) != 0) { 262 printf("%s: can't load upload desc. DMA map, error = %d\n", 263 sc->sc_dev.dv_xname, error); 264 goto fail; 265 } 266 267 attach_stage = 4; 268 269 /* 270 * Allocate the download descriptors, and create and load the DMA 271 * map for them. 272 */ 273 if ((error = bus_dmamem_alloc(sc->sc_dmat, 274 EX_NDPD * sizeof (struct ex_dpd), PAGE_SIZE, 0, &sc->sc_dseg, 1, 275 &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) { 276 printf("%s: can't allocate download descriptors, error = %d\n", 277 sc->sc_dev.dv_xname, error); 278 goto fail; 279 } 280 281 attach_stage = 5; 282 283 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg, 284 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 285 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 286 printf("%s: can't map download descriptors, error = %d\n", 287 sc->sc_dev.dv_xname, error); 288 goto fail; 289 } 290 memset(sc->sc_dpd, 0, EX_NDPD * sizeof (struct ex_dpd)); 291 292 attach_stage = 6; 293 294 if ((error = bus_dmamap_create(sc->sc_dmat, 295 EX_NDPD * sizeof (struct ex_dpd), 1, 296 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 297 &sc->sc_dpd_dmamap)) != 0) { 298 printf("%s: can't create download desc. DMA map, error = %d\n", 299 sc->sc_dev.dv_xname, error); 300 goto fail; 301 } 302 303 attach_stage = 7; 304 305 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 306 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 307 BUS_DMA_NOWAIT)) != 0) { 308 printf("%s: can't load download desc. DMA map, error = %d\n", 309 sc->sc_dev.dv_xname, error); 310 goto fail; 311 } 312 313 attach_stage = 8; 314 315 316 /* 317 * Create the transmit buffer DMA maps. 318 */ 319 for (i = 0; i < EX_NDPD; i++) { 320 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 321 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 322 &sc->sc_tx_dmamaps[i])) != 0) { 323 printf("%s: can't create tx DMA map %d, error = %d\n", 324 sc->sc_dev.dv_xname, i, error); 325 goto fail; 326 } 327 } 328 329 attach_stage = 9; 330 331 /* 332 * Create the receive buffer DMA maps. 333 */ 334 for (i = 0; i < EX_NUPD; i++) { 335 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 336 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 337 &sc->sc_rx_dmamaps[i])) != 0) { 338 printf("%s: can't create rx DMA map %d, error = %d\n", 339 sc->sc_dev.dv_xname, i, error); 340 goto fail; 341 } 342 } 343 344 attach_stage = 10; 345 346 /* 347 * Create ring of upload descriptors, only once. The DMA engine 348 * will loop over this when receiving packets, stalling if it 349 * hits an UPD with a finished receive. 350 */ 351 for (i = 0; i < EX_NUPD; i++) { 352 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 353 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 354 sc->sc_upd[i].upd_frags[0].fr_len = 355 htole32((MCLBYTES - 2) | EX_FR_LAST); 356 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 357 printf("%s: can't allocate or map rx buffers\n", 358 sc->sc_dev.dv_xname); 359 goto fail; 360 } 361 } 362 363 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 364 EX_NUPD * sizeof (struct ex_upd), 365 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 366 367 ex_init_txdescs(sc); 368 369 attach_stage = 11; 370 371 372 GO_WINDOW(3); 373 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 374 if (val & ELINK_MEDIACAP_MII) 375 sc->ex_conf |= EX_CONF_MII; 376 377 ifp = &sc->sc_ethercom.ec_if; 378 379 /* 380 * Initialize our media structures and MII info. We'll 381 * probe the MII if we discover that we have one. 382 */ 383 sc->ex_mii.mii_ifp = ifp; 384 sc->ex_mii.mii_readreg = ex_mii_readreg; 385 sc->ex_mii.mii_writereg = ex_mii_writereg; 386 sc->ex_mii.mii_statchg = ex_mii_statchg; 387 ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg, 388 ex_media_stat); 389 390 if (sc->ex_conf & EX_CONF_MII) { 391 /* 392 * Find PHY, extract media information from it. 393 * First, select the right transceiver. 394 */ 395 u_int32_t icfg; 396 397 GO_WINDOW(3); 398 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 399 icfg &= ~(CONFIG_XCVR_SEL << 16); 400 if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 401 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 402 if (val & ELINK_MEDIACAP_100BASETX) 403 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 404 if (val & ELINK_MEDIACAP_100BASEFX) 405 icfg |= ELINKMEDIA_100BASE_FX 406 << (CONFIG_XCVR_SEL_SHIFT + 16); 407 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 408 409 mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 410 MII_PHY_ANY, MII_OFFSET_ANY, 0); 411 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 412 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 413 0, NULL); 414 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 415 } else { 416 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 417 } 418 } else 419 ex_probemedia(sc); 420 421 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 422 ifp->if_softc = sc; 423 ifp->if_start = ex_start; 424 ifp->if_ioctl = ex_ioctl; 425 ifp->if_watchdog = ex_watchdog; 426 ifp->if_init = ex_init; 427 ifp->if_stop = ex_stop; 428 ifp->if_flags = 429 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 430 IFQ_SET_READY(&ifp->if_snd); 431 432 /* 433 * We can support 802.1Q VLAN-sized frames. 434 */ 435 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 436 437 /* 438 * The 3c90xB has hardware IPv4/TCPv4/UDPv4 checksum support. 439 */ 440 if (sc->ex_conf & EX_CONF_90XB) 441 sc->sc_ethercom.ec_if.if_capabilities |= IFCAP_CSUM_IPv4 | 442 IFCAP_CSUM_TCPv4 | IFCAP_CSUM_UDPv4; 443 444 if_attach(ifp); 445 ether_ifattach(ifp, macaddr); 446 447 GO_WINDOW(1); 448 449 sc->tx_start_thresh = 20; 450 sc->tx_succ_ok = 0; 451 452 /* TODO: set queues to 0 */ 453 454 #if NRND > 0 455 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 456 RND_TYPE_NET, 0); 457 #endif 458 459 /* Establish callback to reset card when we reboot. */ 460 sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc); 461 if (sc->sc_sdhook == NULL) 462 printf("%s: WARNING: unable to establish shutdown hook\n", 463 sc->sc_dev.dv_xname); 464 465 /* Add a suspend hook to make sure we come back up after a resume. */ 466 sc->sc_powerhook = powerhook_establish(ex_power, sc); 467 if (sc->sc_powerhook == NULL) 468 printf("%s: WARNING: unable to establish power hook\n", 469 sc->sc_dev.dv_xname); 470 471 /* The attach is successful. */ 472 sc->ex_flags |= EX_FLAGS_ATTACHED; 473 return; 474 475 fail: 476 /* 477 * Free any resources we've allocated during the failed attach 478 * attempt. Do this in reverse order and fall though. 479 */ 480 switch (attach_stage) { 481 case 11: 482 { 483 struct ex_rxdesc *rxd; 484 485 for (i = 0; i < EX_NUPD; i++) { 486 rxd = &sc->sc_rxdescs[i]; 487 if (rxd->rx_mbhead != NULL) { 488 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 489 m_freem(rxd->rx_mbhead); 490 } 491 } 492 } 493 /* FALLTHROUGH */ 494 495 case 10: 496 for (i = 0; i < EX_NUPD; i++) 497 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 498 /* FALLTHROUGH */ 499 500 case 9: 501 for (i = 0; i < EX_NDPD; i++) 502 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 503 /* FALLTHROUGH */ 504 case 8: 505 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 506 /* FALLTHROUGH */ 507 508 case 7: 509 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 510 /* FALLTHROUGH */ 511 512 case 6: 513 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 514 EX_NDPD * sizeof (struct ex_dpd)); 515 /* FALLTHROUGH */ 516 517 case 5: 518 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 519 break; 520 521 case 4: 522 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 523 /* FALLTHROUGH */ 524 525 case 3: 526 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 527 /* FALLTHROUGH */ 528 529 case 2: 530 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 531 EX_NUPD * sizeof (struct ex_upd)); 532 /* FALLTHROUGH */ 533 534 case 1: 535 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 536 break; 537 } 538 539 } 540 541 /* 542 * Find the media present on non-MII chips. 543 */ 544 void 545 ex_probemedia(sc) 546 struct ex_softc *sc; 547 { 548 bus_space_tag_t iot = sc->sc_iot; 549 bus_space_handle_t ioh = sc->sc_ioh; 550 struct ifmedia *ifm = &sc->ex_mii.mii_media; 551 struct ex_media *exm; 552 u_int16_t config1, reset_options, default_media; 553 int defmedia = 0; 554 const char *sep = "", *defmedianame = NULL; 555 556 GO_WINDOW(3); 557 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 558 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 559 GO_WINDOW(0); 560 561 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 562 563 printf("%s: ", sc->sc_dev.dv_xname); 564 565 /* Sanity check that there are any media! */ 566 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 567 printf("no media present!\n"); 568 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 569 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 570 return; 571 } 572 573 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 574 575 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 576 if (reset_options & exm->exm_mpbit) { 577 /* 578 * Default media is a little complicated. We 579 * support full-duplex which uses the same 580 * reset options bit. 581 * 582 * XXX Check EEPROM for default to FDX? 583 */ 584 if (exm->exm_epmedia == default_media) { 585 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 586 defmedia = exm->exm_ifmedia; 587 defmedianame = exm->exm_name; 588 } 589 } else if (defmedia == 0) { 590 defmedia = exm->exm_ifmedia; 591 defmedianame = exm->exm_name; 592 } 593 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 594 NULL); 595 PRINT(exm->exm_name); 596 } 597 } 598 599 #undef PRINT 600 601 #ifdef DIAGNOSTIC 602 if (defmedia == 0) 603 panic("ex_probemedia: impossible"); 604 #endif 605 606 printf(", default %s\n", defmedianame); 607 ifmedia_set(ifm, defmedia); 608 } 609 610 /* 611 * Bring device up. 612 */ 613 int 614 ex_init(ifp) 615 struct ifnet *ifp; 616 { 617 struct ex_softc *sc = ifp->if_softc; 618 bus_space_tag_t iot = sc->sc_iot; 619 bus_space_handle_t ioh = sc->sc_ioh; 620 int i; 621 int error = 0; 622 623 if ((error = ex_enable(sc)) != 0) 624 goto out; 625 626 ex_waitcmd(sc); 627 ex_stop(ifp, 0); 628 629 /* 630 * Set the station address and clear the station mask. The latter 631 * is needed for 90x cards, 0 is the default for 90xB cards. 632 */ 633 GO_WINDOW(2); 634 for (i = 0; i < ETHER_ADDR_LEN; i++) { 635 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 636 LLADDR(ifp->if_sadl)[i]); 637 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 638 } 639 640 GO_WINDOW(3); 641 642 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 643 ex_waitcmd(sc); 644 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 645 ex_waitcmd(sc); 646 647 /* 648 * Disable reclaim threshold for 90xB, set free threshold to 649 * 6 * 256 = 1536 for 90x. 650 */ 651 if (sc->ex_conf & EX_CONF_90XB) 652 bus_space_write_2(iot, ioh, ELINK_COMMAND, 653 ELINK_TXRECLTHRESH | 255); 654 else 655 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 656 657 bus_space_write_2(iot, ioh, ELINK_COMMAND, 658 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 659 660 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 661 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 662 663 bus_space_write_2(iot, ioh, ELINK_COMMAND, 664 SET_RD_0_MASK | XL_WATCHED_INTERRUPTS); 665 bus_space_write_2(iot, ioh, ELINK_COMMAND, 666 SET_INTR_MASK | XL_WATCHED_INTERRUPTS); 667 668 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 669 if (sc->intr_ack) 670 (* sc->intr_ack)(sc); 671 ex_set_media(sc); 672 ex_set_mc(sc); 673 674 675 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 676 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 677 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 678 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 679 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 680 681 if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) { 682 u_int16_t cbcard_config; 683 684 GO_WINDOW(2); 685 cbcard_config = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 0x0c); 686 if (sc->ex_conf & EX_CONF_PHY_POWER) { 687 cbcard_config |= 0x4000; /* turn on PHY power */ 688 } 689 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) { 690 cbcard_config |= 0x0010; /* invert LED polarity */ 691 } 692 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 0x0c, cbcard_config); 693 694 GO_WINDOW(3); 695 } 696 697 ifp->if_flags |= IFF_RUNNING; 698 ifp->if_flags &= ~IFF_OACTIVE; 699 ex_start(ifp); 700 701 GO_WINDOW(1); 702 703 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 704 705 out: 706 if (error) { 707 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 708 ifp->if_timer = 0; 709 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 710 } 711 return (error); 712 } 713 714 #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & 0xff) 715 716 /* 717 * Set multicast receive filter. Also take care of promiscuous mode 718 * here (XXX). 719 */ 720 void 721 ex_set_mc(sc) 722 struct ex_softc *sc; 723 { 724 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 725 struct ethercom *ec = &sc->sc_ethercom; 726 struct ether_multi *enm; 727 struct ether_multistep estep; 728 int i; 729 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 730 731 if (ifp->if_flags & IFF_PROMISC) 732 mask |= FIL_PROMISC; 733 734 if (!(ifp->if_flags & IFF_MULTICAST)) 735 goto out; 736 737 if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) { 738 mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0; 739 } else { 740 ETHER_FIRST_MULTI(estep, ec, enm); 741 while (enm != NULL) { 742 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 743 ETHER_ADDR_LEN) != 0) 744 goto out; 745 i = ex_mchash(enm->enm_addrlo); 746 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 747 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 748 ETHER_NEXT_MULTI(estep, enm); 749 } 750 mask |= FIL_MULTIHASH; 751 } 752 out: 753 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 754 SET_RX_FILTER | mask); 755 } 756 757 758 static void 759 ex_txstat(sc) 760 struct ex_softc *sc; 761 { 762 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 763 bus_space_tag_t iot = sc->sc_iot; 764 bus_space_handle_t ioh = sc->sc_ioh; 765 int i; 766 767 /* 768 * We need to read+write TX_STATUS until we get a 0 status 769 * in order to turn off the interrupt flag. 770 */ 771 while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) { 772 bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0); 773 774 if (i & TXS_JABBER) { 775 ++sc->sc_ethercom.ec_if.if_oerrors; 776 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 777 printf("%s: jabber (%x)\n", 778 sc->sc_dev.dv_xname, i); 779 ex_init(ifp); 780 /* TODO: be more subtle here */ 781 } else if (i & TXS_UNDERRUN) { 782 ++sc->sc_ethercom.ec_if.if_oerrors; 783 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 784 printf("%s: fifo underrun (%x) @%d\n", 785 sc->sc_dev.dv_xname, i, 786 sc->tx_start_thresh); 787 if (sc->tx_succ_ok < 100) 788 sc->tx_start_thresh = min(ETHER_MAX_LEN, 789 sc->tx_start_thresh + 20); 790 sc->tx_succ_ok = 0; 791 ex_init(ifp); 792 /* TODO: be more subtle here */ 793 } else if (i & TXS_MAX_COLLISION) { 794 ++sc->sc_ethercom.ec_if.if_collisions; 795 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 796 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 797 } else 798 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 799 } 800 } 801 802 int 803 ex_media_chg(ifp) 804 struct ifnet *ifp; 805 { 806 807 if (ifp->if_flags & IFF_UP) 808 ex_init(ifp); 809 return 0; 810 } 811 812 void 813 ex_set_media(sc) 814 struct ex_softc *sc; 815 { 816 bus_space_tag_t iot = sc->sc_iot; 817 bus_space_handle_t ioh = sc->sc_ioh; 818 u_int32_t configreg; 819 820 if (((sc->ex_conf & EX_CONF_MII) && 821 (sc->ex_mii.mii_media_active & IFM_FDX)) 822 || (!(sc->ex_conf & EX_CONF_MII) && 823 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 824 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 825 MAC_CONTROL_FDX); 826 } else { 827 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 828 } 829 830 /* 831 * If the device has MII, select it, and then tell the 832 * PHY which media to use. 833 */ 834 if (sc->ex_conf & EX_CONF_MII) { 835 GO_WINDOW(3); 836 837 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 838 839 configreg &= ~(CONFIG_MEDIAMASK << 16); 840 configreg |= (ELINKMEDIA_MII << (CONFIG_MEDIAMASK_SHIFT + 16)); 841 842 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 843 mii_mediachg(&sc->ex_mii); 844 return; 845 } 846 847 GO_WINDOW(4); 848 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 849 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 850 delay(800); 851 852 /* 853 * Now turn on the selected media/transceiver. 854 */ 855 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 856 case IFM_10_T: 857 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 858 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 859 break; 860 861 case IFM_10_2: 862 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 863 DELAY(800); 864 break; 865 866 case IFM_100_TX: 867 case IFM_100_FX: 868 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 869 LINKBEAT_ENABLE); 870 DELAY(800); 871 break; 872 873 case IFM_10_5: 874 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 875 SQE_ENABLE); 876 DELAY(800); 877 break; 878 879 case IFM_MANUAL: 880 break; 881 882 case IFM_NONE: 883 return; 884 885 default: 886 panic("ex_set_media: impossible"); 887 } 888 889 GO_WINDOW(3); 890 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 891 892 configreg &= ~(CONFIG_MEDIAMASK << 16); 893 configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 894 (CONFIG_MEDIAMASK_SHIFT + 16)); 895 896 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 897 } 898 899 /* 900 * Get currently-selected media from card. 901 * (if_media callback, may be called before interface is brought up). 902 */ 903 void 904 ex_media_stat(ifp, req) 905 struct ifnet *ifp; 906 struct ifmediareq *req; 907 { 908 struct ex_softc *sc = ifp->if_softc; 909 910 if (sc->ex_conf & EX_CONF_MII) { 911 mii_pollstat(&sc->ex_mii); 912 req->ifm_status = sc->ex_mii.mii_media_status; 913 req->ifm_active = sc->ex_mii.mii_media_active; 914 } else { 915 GO_WINDOW(4); 916 req->ifm_status = IFM_AVALID; 917 req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media; 918 if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 919 ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT) 920 req->ifm_status |= IFM_ACTIVE; 921 GO_WINDOW(1); 922 } 923 } 924 925 926 927 /* 928 * Start outputting on the interface. 929 */ 930 static void 931 ex_start(ifp) 932 struct ifnet *ifp; 933 { 934 struct ex_softc *sc = ifp->if_softc; 935 bus_space_tag_t iot = sc->sc_iot; 936 bus_space_handle_t ioh = sc->sc_ioh; 937 volatile struct ex_fraghdr *fr = NULL; 938 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 939 struct ex_txdesc *txp; 940 struct mbuf *mb_head; 941 bus_dmamap_t dmamap; 942 int offset, totlen, segment, error; 943 u_int32_t csum_flags; 944 945 if (sc->tx_head || sc->tx_free == NULL) 946 return; 947 948 txp = NULL; 949 950 /* 951 * We're finished if there is nothing more to add to the list or if 952 * we're all filled up with buffers to transmit. 953 */ 954 while (sc->tx_free != NULL) { 955 /* 956 * Grab a packet to transmit. 957 */ 958 IFQ_DEQUEUE(&ifp->if_snd, mb_head); 959 if (mb_head == NULL) 960 break; 961 962 /* 963 * Get pointer to next available tx desc. 964 */ 965 txp = sc->tx_free; 966 dmamap = txp->tx_dmamap; 967 968 /* 969 * Go through each of the mbufs in the chain and initialize 970 * the transmit buffer descriptors with the physical address 971 * and size of the mbuf. 972 */ 973 reload: 974 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 975 mb_head, BUS_DMA_WRITE|BUS_DMA_NOWAIT); 976 switch (error) { 977 case 0: 978 /* Success. */ 979 break; 980 981 case EFBIG: 982 { 983 struct mbuf *mn; 984 985 /* 986 * We ran out of segments. We have to recopy this 987 * mbuf chain first. Bail out if we can't get the 988 * new buffers. 989 */ 990 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 991 992 MGETHDR(mn, M_DONTWAIT, MT_DATA); 993 if (mn == NULL) { 994 m_freem(mb_head); 995 printf("aborting\n"); 996 goto out; 997 } 998 if (mb_head->m_pkthdr.len > MHLEN) { 999 MCLGET(mn, M_DONTWAIT); 1000 if ((mn->m_flags & M_EXT) == 0) { 1001 m_freem(mn); 1002 m_freem(mb_head); 1003 printf("aborting\n"); 1004 goto out; 1005 } 1006 } 1007 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 1008 mtod(mn, caddr_t)); 1009 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 1010 m_freem(mb_head); 1011 mb_head = mn; 1012 printf("retrying\n"); 1013 goto reload; 1014 } 1015 1016 default: 1017 /* 1018 * Some other problem; report it. 1019 */ 1020 printf("%s: can't load mbuf chain, error = %d\n", 1021 sc->sc_dev.dv_xname, error); 1022 m_freem(mb_head); 1023 goto out; 1024 } 1025 1026 /* 1027 * remove our tx desc from freelist. 1028 */ 1029 sc->tx_free = txp->tx_next; 1030 txp->tx_next = NULL; 1031 1032 fr = &txp->tx_dpd->dpd_frags[0]; 1033 totlen = 0; 1034 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1035 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr); 1036 fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len); 1037 totlen += dmamap->dm_segs[segment].ds_len; 1038 } 1039 fr--; 1040 fr->fr_len |= htole32(EX_FR_LAST); 1041 txp->tx_mbhead = mb_head; 1042 1043 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1044 BUS_DMASYNC_PREWRITE); 1045 1046 dpd = txp->tx_dpd; 1047 dpd->dpd_nextptr = 0; 1048 dpd->dpd_fsh = htole32(totlen); 1049 1050 /* Byte-swap constants so compiler can optimize. */ 1051 1052 if (sc->ex_conf & EX_CONF_90XB) { 1053 csum_flags = 0; 1054 1055 if (mb_head->m_pkthdr.csum_flags & M_CSUM_IPv4) 1056 csum_flags |= htole32(EX_DPD_IPCKSUM); 1057 1058 if (mb_head->m_pkthdr.csum_flags & M_CSUM_TCPv4) 1059 csum_flags |= htole32(EX_DPD_TCPCKSUM); 1060 else if (mb_head->m_pkthdr.csum_flags & M_CSUM_UDPv4) 1061 csum_flags |= htole32(EX_DPD_UDPCKSUM); 1062 1063 dpd->dpd_fsh |= csum_flags; 1064 } else { 1065 KDASSERT((mb_head->m_pkthdr.csum_flags & 1066 (M_CSUM_IPv4|M_CSUM_TCPv4|M_CSUM_UDPv4)) == 0); 1067 } 1068 1069 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1070 ((caddr_t)dpd - (caddr_t)sc->sc_dpd), 1071 sizeof (struct ex_dpd), 1072 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1073 1074 /* 1075 * No need to stall the download engine, we know it's 1076 * not busy right now. 1077 * 1078 * Fix up pointers in both the "soft" tx and the physical 1079 * tx list. 1080 */ 1081 if (sc->tx_head != NULL) { 1082 prevdpd = sc->tx_tail->tx_dpd; 1083 offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd); 1084 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1085 offset, sizeof (struct ex_dpd), 1086 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1087 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp)); 1088 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1089 offset, sizeof (struct ex_dpd), 1090 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1091 sc->tx_tail->tx_next = txp; 1092 sc->tx_tail = txp; 1093 } else { 1094 sc->tx_tail = sc->tx_head = txp; 1095 } 1096 1097 #if NBPFILTER > 0 1098 /* 1099 * Pass packet to bpf if there is a listener. 1100 */ 1101 if (ifp->if_bpf) 1102 bpf_mtap(ifp->if_bpf, mb_head); 1103 #endif 1104 } 1105 out: 1106 if (sc->tx_head) { 1107 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND); 1108 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1109 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1110 sizeof (struct ex_dpd), 1111 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1112 ifp->if_flags |= IFF_OACTIVE; 1113 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1114 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1115 DPD_DMADDR(sc, sc->tx_head)); 1116 1117 /* trigger watchdog */ 1118 ifp->if_timer = 5; 1119 } 1120 } 1121 1122 1123 int 1124 ex_intr(arg) 1125 void *arg; 1126 { 1127 struct ex_softc *sc = arg; 1128 bus_space_tag_t iot = sc->sc_iot; 1129 bus_space_handle_t ioh = sc->sc_ioh; 1130 u_int16_t stat; 1131 int ret = 0; 1132 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1133 1134 if ((ifp->if_flags & IFF_RUNNING) == 0 || 1135 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1136 return (0); 1137 1138 for (;;) { 1139 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1140 1141 if ((stat & XL_WATCHED_INTERRUPTS) == 0) { 1142 if ((stat & INTR_LATCH) == 0) { 1143 #if 0 1144 printf("%s: intr latch cleared\n", 1145 sc->sc_dev.dv_xname); 1146 #endif 1147 break; 1148 } 1149 } 1150 1151 ret = 1; 1152 1153 /* 1154 * Acknowledge interrupts. 1155 */ 1156 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1157 (stat & (XL_WATCHED_INTERRUPTS | INTR_LATCH))); 1158 if (sc->intr_ack) 1159 (*sc->intr_ack)(sc); 1160 1161 if (stat & HOST_ERROR) { 1162 printf("%s: adapter failure (%x)\n", 1163 sc->sc_dev.dv_xname, stat); 1164 ex_reset(sc); 1165 ex_init(ifp); 1166 return 1; 1167 } 1168 if (stat & TX_COMPLETE) { 1169 ex_txstat(sc); 1170 } 1171 if (stat & UPD_STATS) { 1172 ex_getstats(sc); 1173 } 1174 if (stat & DN_COMPLETE) { 1175 struct ex_txdesc *txp, *ptxp = NULL; 1176 bus_dmamap_t txmap; 1177 1178 /* reset watchdog timer, was set in ex_start() */ 1179 ifp->if_timer = 0; 1180 1181 for (txp = sc->tx_head; txp != NULL; 1182 txp = txp->tx_next) { 1183 bus_dmamap_sync(sc->sc_dmat, 1184 sc->sc_dpd_dmamap, 1185 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1186 sizeof (struct ex_dpd), 1187 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1188 if (txp->tx_mbhead != NULL) { 1189 txmap = txp->tx_dmamap; 1190 bus_dmamap_sync(sc->sc_dmat, txmap, 1191 0, txmap->dm_mapsize, 1192 BUS_DMASYNC_POSTWRITE); 1193 bus_dmamap_unload(sc->sc_dmat, txmap); 1194 m_freem(txp->tx_mbhead); 1195 txp->tx_mbhead = NULL; 1196 } 1197 ptxp = txp; 1198 } 1199 1200 /* 1201 * Move finished tx buffers back to the tx free list. 1202 */ 1203 if (sc->tx_free) { 1204 sc->tx_ftail->tx_next = sc->tx_head; 1205 sc->tx_ftail = ptxp; 1206 } else 1207 sc->tx_ftail = sc->tx_free = sc->tx_head; 1208 1209 sc->tx_head = sc->tx_tail = NULL; 1210 ifp->if_flags &= ~IFF_OACTIVE; 1211 } 1212 1213 if (stat & UP_COMPLETE) { 1214 struct ex_rxdesc *rxd; 1215 struct mbuf *m; 1216 struct ex_upd *upd; 1217 bus_dmamap_t rxmap; 1218 u_int32_t pktstat; 1219 1220 rcvloop: 1221 rxd = sc->rx_head; 1222 rxmap = rxd->rx_dmamap; 1223 m = rxd->rx_mbhead; 1224 upd = rxd->rx_upd; 1225 1226 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1227 rxmap->dm_mapsize, 1228 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1229 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1230 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1231 sizeof (struct ex_upd), 1232 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1233 pktstat = le32toh(upd->upd_pktstatus); 1234 1235 if (pktstat & EX_UPD_COMPLETE) { 1236 /* 1237 * Remove first packet from the chain. 1238 */ 1239 sc->rx_head = rxd->rx_next; 1240 rxd->rx_next = NULL; 1241 1242 /* 1243 * Add a new buffer to the receive chain. 1244 * If this fails, the old buffer is recycled 1245 * instead. 1246 */ 1247 if (ex_add_rxbuf(sc, rxd) == 0) { 1248 u_int16_t total_len; 1249 1250 if (pktstat & 1251 ((sc->sc_ethercom.ec_capenable & 1252 ETHERCAP_VLAN_MTU) ? 1253 EX_UPD_ERR_VLAN : EX_UPD_ERR)) { 1254 ifp->if_ierrors++; 1255 m_freem(m); 1256 goto rcvloop; 1257 } 1258 1259 total_len = pktstat & EX_UPD_PKTLENMASK; 1260 if (total_len < 1261 sizeof(struct ether_header)) { 1262 m_freem(m); 1263 goto rcvloop; 1264 } 1265 m->m_pkthdr.rcvif = ifp; 1266 m->m_pkthdr.len = m->m_len = total_len; 1267 #if NBPFILTER > 0 1268 if (ifp->if_bpf) 1269 bpf_mtap(ifp->if_bpf, m); 1270 #endif 1271 /* 1272 * Set the incoming checksum information for the packet. 1273 */ 1274 if ((sc->ex_conf & EX_CONF_90XB) != 0 && 1275 (pktstat & EX_UPD_IPCHECKED) != 0) { 1276 m->m_pkthdr.csum_flags |= M_CSUM_IPv4; 1277 if (pktstat & EX_UPD_IPCKSUMERR) 1278 m->m_pkthdr.csum_flags |= M_CSUM_IPv4_BAD; 1279 if (pktstat & EX_UPD_TCPCHECKED) { 1280 m->m_pkthdr.csum_flags |= M_CSUM_TCPv4; 1281 if (pktstat & EX_UPD_TCPCKSUMERR) 1282 m->m_pkthdr.csum_flags |= 1283 M_CSUM_TCP_UDP_BAD; 1284 } else if (pktstat & EX_UPD_UDPCHECKED) { 1285 m->m_pkthdr.csum_flags |= M_CSUM_UDPv4; 1286 if (pktstat & EX_UPD_UDPCKSUMERR) 1287 m->m_pkthdr.csum_flags |= 1288 M_CSUM_TCP_UDP_BAD; 1289 } 1290 } 1291 (*ifp->if_input)(ifp, m); 1292 } 1293 goto rcvloop; 1294 } 1295 /* 1296 * Just in case we filled up all UPDs and the DMA engine 1297 * stalled. We could be more subtle about this. 1298 */ 1299 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1300 printf("%s: uplistptr was 0\n", 1301 sc->sc_dev.dv_xname); 1302 ex_init(ifp); 1303 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1304 & 0x2000) { 1305 printf("%s: receive stalled\n", 1306 sc->sc_dev.dv_xname); 1307 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1308 ELINK_UPUNSTALL); 1309 } 1310 } 1311 } 1312 1313 /* no more interrupts */ 1314 if (ret && IFQ_IS_EMPTY(&ifp->if_snd) == 0) 1315 ex_start(ifp); 1316 return ret; 1317 } 1318 1319 int 1320 ex_ioctl(ifp, cmd, data) 1321 struct ifnet *ifp; 1322 u_long cmd; 1323 caddr_t data; 1324 { 1325 struct ex_softc *sc = ifp->if_softc; 1326 struct ifreq *ifr = (struct ifreq *)data; 1327 int s, error; 1328 1329 s = splnet(); 1330 1331 switch (cmd) { 1332 case SIOCSIFMEDIA: 1333 case SIOCGIFMEDIA: 1334 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1335 break; 1336 1337 default: 1338 error = ether_ioctl(ifp, cmd, data); 1339 if (error == ENETRESET) { 1340 if (sc->enabled) { 1341 /* 1342 * Multicast list has changed; set the hardware filter 1343 * accordingly. 1344 */ 1345 ex_set_mc(sc); 1346 } 1347 error = 0; 1348 } 1349 break; 1350 } 1351 1352 splx(s); 1353 return (error); 1354 } 1355 1356 void 1357 ex_getstats(sc) 1358 struct ex_softc *sc; 1359 { 1360 bus_space_handle_t ioh = sc->sc_ioh; 1361 bus_space_tag_t iot = sc->sc_iot; 1362 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1363 u_int8_t upperok; 1364 1365 GO_WINDOW(6); 1366 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1367 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1368 ifp->if_ipackets += (upperok & 0x03) << 8; 1369 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1370 ifp->if_opackets += (upperok & 0x30) << 4; 1371 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1372 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1373 /* 1374 * There seems to be no way to get the exact number of collisions, 1375 * this is the number that occurred at the very least. 1376 */ 1377 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1378 TX_AFTER_X_COLLISIONS); 1379 /* 1380 * Interface byte counts are counted by ether_input() and 1381 * ether_output(), so don't accumulate them here. Just 1382 * read the NIC counters so they don't generate overflow interrupts. 1383 * Upper byte counters are latched from reading the totals, so 1384 * they don't need to be read if we don't need their values. 1385 */ 1386 bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1387 bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1388 1389 /* 1390 * Clear the following to avoid stats overflow interrupts 1391 */ 1392 bus_space_read_1(iot, ioh, TX_DEFERRALS); 1393 bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1394 bus_space_read_1(iot, ioh, TX_NO_SQE); 1395 bus_space_read_1(iot, ioh, TX_CD_LOST); 1396 GO_WINDOW(4); 1397 bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1398 GO_WINDOW(1); 1399 } 1400 1401 void 1402 ex_printstats(sc) 1403 struct ex_softc *sc; 1404 { 1405 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1406 1407 ex_getstats(sc); 1408 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1409 "%llu\n", (unsigned long long)ifp->if_ipackets, 1410 (unsigned long long)ifp->if_opackets, 1411 (unsigned long long)ifp->if_ierrors, 1412 (unsigned long long)ifp->if_oerrors, 1413 (unsigned long long)ifp->if_ibytes, 1414 (unsigned long long)ifp->if_obytes); 1415 } 1416 1417 void 1418 ex_tick(arg) 1419 void *arg; 1420 { 1421 struct ex_softc *sc = arg; 1422 int s; 1423 1424 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1425 return; 1426 1427 s = splnet(); 1428 1429 if (sc->ex_conf & EX_CONF_MII) 1430 mii_tick(&sc->ex_mii); 1431 1432 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1433 & COMMAND_IN_PROGRESS)) 1434 ex_getstats(sc); 1435 1436 splx(s); 1437 1438 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 1439 } 1440 1441 void 1442 ex_reset(sc) 1443 struct ex_softc *sc; 1444 { 1445 u_int16_t val = GLOBAL_RESET; 1446 1447 if (sc->ex_conf & EX_CONF_RESETHACK) 1448 val |= 0x10; 1449 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val); 1450 /* 1451 * XXX apparently the command in progress bit can't be trusted 1452 * during a reset, so we just always wait this long. Fortunately 1453 * we normally only reset the chip during autoconfig. 1454 */ 1455 delay(100000); 1456 ex_waitcmd(sc); 1457 } 1458 1459 void 1460 ex_watchdog(ifp) 1461 struct ifnet *ifp; 1462 { 1463 struct ex_softc *sc = ifp->if_softc; 1464 1465 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1466 ++sc->sc_ethercom.ec_if.if_oerrors; 1467 1468 ex_reset(sc); 1469 ex_init(ifp); 1470 } 1471 1472 void 1473 ex_stop(ifp, disable) 1474 struct ifnet *ifp; 1475 int disable; 1476 { 1477 struct ex_softc *sc = ifp->if_softc; 1478 bus_space_tag_t iot = sc->sc_iot; 1479 bus_space_handle_t ioh = sc->sc_ioh; 1480 struct ex_txdesc *tx; 1481 struct ex_rxdesc *rx; 1482 int i; 1483 1484 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1485 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1486 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1487 1488 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1489 if (tx->tx_mbhead == NULL) 1490 continue; 1491 m_freem(tx->tx_mbhead); 1492 tx->tx_mbhead = NULL; 1493 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1494 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1495 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1496 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1497 sizeof (struct ex_dpd), 1498 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1499 } 1500 sc->tx_tail = sc->tx_head = NULL; 1501 ex_init_txdescs(sc); 1502 1503 sc->rx_tail = sc->rx_head = 0; 1504 for (i = 0; i < EX_NUPD; i++) { 1505 rx = &sc->sc_rxdescs[i]; 1506 if (rx->rx_mbhead != NULL) { 1507 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1508 m_freem(rx->rx_mbhead); 1509 rx->rx_mbhead = NULL; 1510 } 1511 ex_add_rxbuf(sc, rx); 1512 } 1513 1514 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1515 1516 callout_stop(&sc->ex_mii_callout); 1517 if (sc->ex_conf & EX_CONF_MII) 1518 mii_down(&sc->ex_mii); 1519 1520 if (disable) 1521 ex_disable(sc); 1522 1523 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1524 ifp->if_timer = 0; 1525 } 1526 1527 static void 1528 ex_init_txdescs(sc) 1529 struct ex_softc *sc; 1530 { 1531 int i; 1532 1533 for (i = 0; i < EX_NDPD; i++) { 1534 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1535 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1536 if (i < EX_NDPD - 1) 1537 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1538 else 1539 sc->sc_txdescs[i].tx_next = NULL; 1540 } 1541 sc->tx_free = &sc->sc_txdescs[0]; 1542 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1543 } 1544 1545 1546 int 1547 ex_activate(self, act) 1548 struct device *self; 1549 enum devact act; 1550 { 1551 struct ex_softc *sc = (void *) self; 1552 int s, error = 0; 1553 1554 s = splnet(); 1555 switch (act) { 1556 case DVACT_ACTIVATE: 1557 error = EOPNOTSUPP; 1558 break; 1559 1560 case DVACT_DEACTIVATE: 1561 if (sc->ex_conf & EX_CONF_MII) 1562 mii_activate(&sc->ex_mii, act, MII_PHY_ANY, 1563 MII_OFFSET_ANY); 1564 if_deactivate(&sc->sc_ethercom.ec_if); 1565 break; 1566 } 1567 splx(s); 1568 1569 return (error); 1570 } 1571 1572 int 1573 ex_detach(sc) 1574 struct ex_softc *sc; 1575 { 1576 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1577 struct ex_rxdesc *rxd; 1578 int i; 1579 1580 /* Succeed now if there's no work to do. */ 1581 if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0) 1582 return (0); 1583 1584 /* Unhook our tick handler. */ 1585 callout_stop(&sc->ex_mii_callout); 1586 1587 if (sc->ex_conf & EX_CONF_MII) { 1588 /* Detach all PHYs */ 1589 mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY); 1590 } 1591 1592 /* Delete all remaining media. */ 1593 ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY); 1594 1595 #if NRND > 0 1596 rnd_detach_source(&sc->rnd_source); 1597 #endif 1598 ether_ifdetach(ifp); 1599 if_detach(ifp); 1600 1601 for (i = 0; i < EX_NUPD; i++) { 1602 rxd = &sc->sc_rxdescs[i]; 1603 if (rxd->rx_mbhead != NULL) { 1604 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 1605 m_freem(rxd->rx_mbhead); 1606 rxd->rx_mbhead = NULL; 1607 } 1608 } 1609 for (i = 0; i < EX_NUPD; i++) 1610 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 1611 for (i = 0; i < EX_NDPD; i++) 1612 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 1613 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 1614 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 1615 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 1616 EX_NDPD * sizeof (struct ex_dpd)); 1617 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 1618 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 1619 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 1620 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 1621 EX_NUPD * sizeof (struct ex_upd)); 1622 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 1623 1624 shutdownhook_disestablish(sc->sc_sdhook); 1625 powerhook_disestablish(sc->sc_powerhook); 1626 1627 return (0); 1628 } 1629 1630 /* 1631 * Before reboots, reset card completely. 1632 */ 1633 static void 1634 ex_shutdown(arg) 1635 void *arg; 1636 { 1637 struct ex_softc *sc = arg; 1638 1639 ex_stop(&sc->sc_ethercom.ec_if, 1); 1640 } 1641 1642 /* 1643 * Read EEPROM data. 1644 * XXX what to do if EEPROM doesn't unbusy? 1645 */ 1646 u_int16_t 1647 ex_read_eeprom(sc, offset) 1648 struct ex_softc *sc; 1649 int offset; 1650 { 1651 bus_space_tag_t iot = sc->sc_iot; 1652 bus_space_handle_t ioh = sc->sc_ioh; 1653 u_int16_t data = 0, cmd = READ_EEPROM; 1654 int off; 1655 1656 off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0; 1657 cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM; 1658 1659 GO_WINDOW(0); 1660 if (ex_eeprom_busy(sc)) 1661 goto out; 1662 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1663 cmd | (off + (offset & 0x3f))); 1664 if (ex_eeprom_busy(sc)) 1665 goto out; 1666 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1667 out: 1668 return data; 1669 } 1670 1671 static int 1672 ex_eeprom_busy(sc) 1673 struct ex_softc *sc; 1674 { 1675 bus_space_tag_t iot = sc->sc_iot; 1676 bus_space_handle_t ioh = sc->sc_ioh; 1677 int i = 100; 1678 1679 while (i--) { 1680 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1681 EEPROM_BUSY)) 1682 return 0; 1683 delay(100); 1684 } 1685 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1686 return (1); 1687 } 1688 1689 /* 1690 * Create a new rx buffer and add it to the 'soft' rx list. 1691 */ 1692 static int 1693 ex_add_rxbuf(sc, rxd) 1694 struct ex_softc *sc; 1695 struct ex_rxdesc *rxd; 1696 { 1697 struct mbuf *m, *oldm; 1698 bus_dmamap_t rxmap; 1699 int error, rval = 0; 1700 1701 oldm = rxd->rx_mbhead; 1702 rxmap = rxd->rx_dmamap; 1703 1704 MGETHDR(m, M_DONTWAIT, MT_DATA); 1705 if (m != NULL) { 1706 MCLGET(m, M_DONTWAIT); 1707 if ((m->m_flags & M_EXT) == 0) { 1708 m_freem(m); 1709 if (oldm == NULL) 1710 return 1; 1711 m = oldm; 1712 m->m_data = m->m_ext.ext_buf; 1713 rval = 1; 1714 } 1715 } else { 1716 if (oldm == NULL) 1717 return 1; 1718 m = oldm; 1719 m->m_data = m->m_ext.ext_buf; 1720 rval = 1; 1721 } 1722 1723 /* 1724 * Setup the DMA map for this receive buffer. 1725 */ 1726 if (m != oldm) { 1727 if (oldm != NULL) 1728 bus_dmamap_unload(sc->sc_dmat, rxmap); 1729 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1730 m->m_ext.ext_buf, MCLBYTES, NULL, 1731 BUS_DMA_READ|BUS_DMA_NOWAIT); 1732 if (error) { 1733 printf("%s: can't load rx buffer, error = %d\n", 1734 sc->sc_dev.dv_xname, error); 1735 panic("ex_add_rxbuf"); /* XXX */ 1736 } 1737 } 1738 1739 /* 1740 * Align for data after 14 byte header. 1741 */ 1742 m->m_data += 2; 1743 1744 rxd->rx_mbhead = m; 1745 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2); 1746 rxd->rx_upd->upd_frags[0].fr_addr = 1747 htole32(rxmap->dm_segs[0].ds_addr + 2); 1748 rxd->rx_upd->upd_nextptr = 0; 1749 1750 /* 1751 * Attach it to the end of the list. 1752 */ 1753 if (sc->rx_head != NULL) { 1754 sc->rx_tail->rx_next = rxd; 1755 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma + 1756 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1757 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1758 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1759 sizeof (struct ex_upd), 1760 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1761 } else { 1762 sc->rx_head = rxd; 1763 } 1764 sc->rx_tail = rxd; 1765 1766 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1767 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1768 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1769 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1770 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1771 return (rval); 1772 } 1773 1774 u_int32_t 1775 ex_mii_bitbang_read(self) 1776 struct device *self; 1777 { 1778 struct ex_softc *sc = (void *) self; 1779 1780 /* We're already in Window 4. */ 1781 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1782 } 1783 1784 void 1785 ex_mii_bitbang_write(self, val) 1786 struct device *self; 1787 u_int32_t val; 1788 { 1789 struct ex_softc *sc = (void *) self; 1790 1791 /* We're already in Window 4. */ 1792 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1793 } 1794 1795 int 1796 ex_mii_readreg(v, phy, reg) 1797 struct device *v; 1798 int phy, reg; 1799 { 1800 struct ex_softc *sc = (struct ex_softc *)v; 1801 int val; 1802 1803 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1804 return 0; 1805 1806 GO_WINDOW(4); 1807 1808 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1809 1810 GO_WINDOW(1); 1811 1812 return (val); 1813 } 1814 1815 void 1816 ex_mii_writereg(v, phy, reg, data) 1817 struct device *v; 1818 int phy; 1819 int reg; 1820 int data; 1821 { 1822 struct ex_softc *sc = (struct ex_softc *)v; 1823 1824 GO_WINDOW(4); 1825 1826 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1827 1828 GO_WINDOW(1); 1829 } 1830 1831 void 1832 ex_mii_statchg(v) 1833 struct device *v; 1834 { 1835 struct ex_softc *sc = (struct ex_softc *)v; 1836 bus_space_tag_t iot = sc->sc_iot; 1837 bus_space_handle_t ioh = sc->sc_ioh; 1838 int mctl; 1839 1840 GO_WINDOW(3); 1841 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1842 if (sc->ex_mii.mii_media_active & IFM_FDX) 1843 mctl |= MAC_CONTROL_FDX; 1844 else 1845 mctl &= ~MAC_CONTROL_FDX; 1846 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1847 GO_WINDOW(1); /* back to operating window */ 1848 } 1849 1850 int 1851 ex_enable(sc) 1852 struct ex_softc *sc; 1853 { 1854 if (sc->enabled == 0 && sc->enable != NULL) { 1855 if ((*sc->enable)(sc) != 0) { 1856 printf("%s: de/vice enable failed\n", 1857 sc->sc_dev.dv_xname); 1858 return (EIO); 1859 } 1860 sc->enabled = 1; 1861 } 1862 return (0); 1863 } 1864 1865 void 1866 ex_disable(sc) 1867 struct ex_softc *sc; 1868 { 1869 if (sc->enabled == 1 && sc->disable != NULL) { 1870 (*sc->disable)(sc); 1871 sc->enabled = 0; 1872 } 1873 } 1874 1875 void 1876 ex_power(why, arg) 1877 int why; 1878 void *arg; 1879 { 1880 struct ex_softc *sc = (void *)arg; 1881 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1882 int s; 1883 1884 s = splnet(); 1885 switch (why) { 1886 case PWR_SUSPEND: 1887 case PWR_STANDBY: 1888 ex_stop(ifp, 0); 1889 if (sc->power != NULL) 1890 (*sc->power)(sc, why); 1891 break; 1892 case PWR_RESUME: 1893 if (ifp->if_flags & IFF_UP) { 1894 if (sc->power != NULL) 1895 (*sc->power)(sc, why); 1896 ex_init(ifp); 1897 } 1898 break; 1899 case PWR_SOFTSUSPEND: 1900 case PWR_SOFTSTANDBY: 1901 case PWR_SOFTRESUME: 1902 break; 1903 } 1904 splx(s); 1905 } 1906