1 /* $NetBSD: iha.c,v 1.17 2002/04/05 18:27:52 bouyer Exp $ */ 2 /* 3 * Initio INI-9xxxU/UW SCSI Device Driver 4 * 5 * Copyright (c) 2000 Ken Westerback 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer, 13 * without modification, immediately at the beginning of the file. 14 * 2. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 26 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 *------------------------------------------------------------------------- 30 * 31 * Ported from i91u.c, provided by Initio Corporation, which credits: 32 * 33 * Device driver for the INI-9XXXU/UW or INIC-940/950 PCI SCSI Controller. 34 * 35 * FreeBSD 36 * 37 * Written for 386bsd and FreeBSD by 38 * Winston Hung <winstonh@initio.com> 39 * 40 * Copyright (c) 1997-99 Initio Corp. All rights reserved. 41 * 42 *------------------------------------------------------------------------- 43 */ 44 45 /* 46 * Ported to NetBSD by Izumi Tsutsui <tsutsui@ceres.dti.ne.jp> from OpenBSD: 47 * $OpenBSD: iha.c,v 1.3 2001/02/20 00:47:33 krw Exp $ 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: iha.c,v 1.17 2002/04/05 18:27:52 bouyer Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/kernel.h> 56 #include <sys/buf.h> 57 #include <sys/device.h> 58 #include <sys/malloc.h> 59 60 #include <uvm/uvm_extern.h> 61 62 #include <machine/bus.h> 63 #include <machine/intr.h> 64 65 #include <dev/scsipi/scsi_all.h> 66 #include <dev/scsipi/scsipi_all.h> 67 #include <dev/scsipi/scsiconf.h> 68 #include <dev/scsipi/scsi_message.h> 69 70 #include <dev/ic/ihareg.h> 71 #include <dev/ic/ihavar.h> 72 73 /* 74 * SCSI Rate Table, indexed by FLAG_SCSI_RATE field of 75 * tcs flags. 76 */ 77 static const u_int8_t iha_rate_tbl[] = { 78 /* fast 20 */ 79 /* nanosecond divide by 4 */ 80 12, /* 50ns, 20M */ 81 18, /* 75ns, 13.3M */ 82 25, /* 100ns, 10M */ 83 31, /* 125ns, 8M */ 84 37, /* 150ns, 6.6M */ 85 43, /* 175ns, 5.7M */ 86 50, /* 200ns, 5M */ 87 62 /* 250ns, 4M */ 88 }; 89 #define IHA_MAX_PERIOD 62 90 91 #ifdef notused 92 static u_int16_t eeprom_default[EEPROM_SIZE] = { 93 /* -- Header ------------------------------------ */ 94 /* signature */ 95 EEP_SIGNATURE, 96 /* size, revision */ 97 EEP_WORD(EEPROM_SIZE * 2, 0x01), 98 /* -- Host Adapter Structure -------------------- */ 99 /* model */ 100 0x0095, 101 /* model info, number of channel */ 102 EEP_WORD(0x00, 1), 103 /* BIOS config */ 104 EEP_BIOSCFG_DEFAULT, 105 /* host adapter config */ 106 0, 107 108 /* -- eeprom_adapter[0] ------------------------------- */ 109 /* ID, adapter config 1 */ 110 EEP_WORD(7, CFG_DEFAULT), 111 /* adapter config 2, number of targets */ 112 EEP_WORD(0x00, 8), 113 /* target flags */ 114 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 115 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 116 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 117 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 118 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 119 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 120 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 121 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 122 123 /* -- eeprom_adapter[1] ------------------------------- */ 124 /* ID, adapter config 1 */ 125 EEP_WORD(7, CFG_DEFAULT), 126 /* adapter config 2, number of targets */ 127 EEP_WORD(0x00, 8), 128 /* target flags */ 129 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 130 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 131 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 132 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 133 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 134 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 135 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 136 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 137 /* reserved[5] */ 138 0, 0, 0, 0, 0, 139 /* checksum */ 140 0 141 }; 142 #endif 143 144 static void iha_append_free_scb(struct iha_softc *, struct iha_scb *); 145 static void iha_append_done_scb(struct iha_softc *, struct iha_scb *, u_int8_t); 146 static __inline struct iha_scb *iha_pop_done_scb(struct iha_softc *); 147 148 static struct iha_scb *iha_find_pend_scb(struct iha_softc *); 149 static __inline void iha_append_pend_scb(struct iha_softc *, struct iha_scb *); 150 static __inline void iha_push_pend_scb(struct iha_softc *, struct iha_scb *); 151 static __inline void iha_del_pend_scb(struct iha_softc *, struct iha_scb *); 152 static __inline void iha_mark_busy_scb(struct iha_scb *); 153 154 static __inline void iha_set_ssig(struct iha_softc *, u_int8_t, u_int8_t); 155 156 static int iha_alloc_sglist(struct iha_softc *); 157 158 static void iha_scsipi_request(struct scsipi_channel *, scsipi_adapter_req_t, 159 void *); 160 static void iha_update_xfer_mode(struct iha_softc *, int); 161 162 static void iha_reset_scsi_bus(struct iha_softc *); 163 static void iha_reset_chip(struct iha_softc *); 164 static void iha_reset_dma(struct iha_softc *); 165 static void iha_reset_tcs(struct tcs *, u_int8_t); 166 167 static void iha_main(struct iha_softc *); 168 static void iha_scsi(struct iha_softc *); 169 static void iha_select(struct iha_softc *, struct iha_scb *, u_int8_t); 170 static int iha_wait(struct iha_softc *, u_int8_t); 171 172 static void iha_exec_scb(struct iha_softc *, struct iha_scb *); 173 static void iha_done_scb(struct iha_softc *, struct iha_scb *); 174 static int iha_push_sense_request(struct iha_softc *, struct iha_scb *); 175 176 static void iha_timeout(void *); 177 static void iha_abort_xs(struct iha_softc *, struct scsipi_xfer *, u_int8_t); 178 static u_int8_t iha_data_over_run(struct iha_scb *); 179 180 static int iha_next_state(struct iha_softc *); 181 static int iha_state_1(struct iha_softc *); 182 static int iha_state_2(struct iha_softc *); 183 static int iha_state_3(struct iha_softc *); 184 static int iha_state_4(struct iha_softc *); 185 static int iha_state_5(struct iha_softc *); 186 static int iha_state_6(struct iha_softc *); 187 static int iha_state_8(struct iha_softc *); 188 189 static int iha_xfer_data(struct iha_softc *, struct iha_scb *, int); 190 static int iha_xpad_in(struct iha_softc *); 191 static int iha_xpad_out(struct iha_softc *); 192 193 static int iha_status_msg(struct iha_softc *); 194 static void iha_busfree(struct iha_softc *); 195 static int iha_resel(struct iha_softc *); 196 197 static int iha_msgin(struct iha_softc *); 198 static int iha_msgin_extended(struct iha_softc *); 199 static int iha_msgin_sdtr(struct iha_softc *); 200 static int iha_msgin_ignore_wid_resid(struct iha_softc *); 201 202 static int iha_msgout(struct iha_softc *, u_int8_t); 203 static void iha_msgout_abort(struct iha_softc *, u_int8_t); 204 static int iha_msgout_reject(struct iha_softc *); 205 static int iha_msgout_extended(struct iha_softc *); 206 static int iha_msgout_wdtr(struct iha_softc *); 207 static int iha_msgout_sdtr(struct iha_softc *); 208 209 static void iha_wide_done(struct iha_softc *); 210 static void iha_sync_done(struct iha_softc *); 211 212 static void iha_bad_seq(struct iha_softc *); 213 214 static void iha_read_eeprom(struct iha_softc *, struct iha_eeprom *); 215 static int iha_se2_rd_all(struct iha_softc *, u_int16_t *); 216 static void iha_se2_instr(struct iha_softc *, int); 217 static u_int16_t iha_se2_rd(struct iha_softc *, int); 218 #ifdef notused 219 static void iha_se2_update_all(struct iha_softc *); 220 static void iha_se2_wr(struct iha_softc *, int, u_int16_t); 221 #endif 222 223 /* 224 * iha_append_free_scb - append the supplied SCB to the tail of the 225 * sc_freescb queue after clearing and resetting 226 * everything possible. 227 */ 228 static void 229 iha_append_free_scb(sc, scb) 230 struct iha_softc *sc; 231 struct iha_scb *scb; 232 { 233 int s; 234 235 s = splbio(); 236 237 if (scb == sc->sc_actscb) 238 sc->sc_actscb = NULL; 239 240 scb->status = STATUS_QUEUED; 241 scb->ha_stat = HOST_OK; 242 scb->ta_stat = SCSI_OK; 243 244 scb->nextstat = 0; 245 scb->scb_tagmsg = 0; 246 247 scb->xs = NULL; 248 scb->tcs = NULL; 249 250 /* 251 * scb_tagid, sg_addr, sglist 252 * SCB_SensePtr are set at initialization 253 * and never change 254 */ 255 256 TAILQ_INSERT_TAIL(&sc->sc_freescb, scb, chain); 257 258 splx(s); 259 } 260 261 static void 262 iha_append_done_scb(sc, scb, hastat) 263 struct iha_softc *sc; 264 struct iha_scb *scb; 265 u_int8_t hastat; 266 { 267 struct tcs *tcs; 268 int s; 269 270 s = splbio(); 271 272 if (scb->xs != NULL) 273 callout_stop(&scb->xs->xs_callout); 274 275 if (scb == sc->sc_actscb) 276 sc->sc_actscb = NULL; 277 278 tcs = scb->tcs; 279 280 if (scb->scb_tagmsg != 0) { 281 if (tcs->tagcnt) 282 tcs->tagcnt--; 283 } else if (tcs->ntagscb == scb) 284 tcs->ntagscb = NULL; 285 286 scb->status = STATUS_QUEUED; 287 scb->ha_stat = hastat; 288 289 TAILQ_INSERT_TAIL(&sc->sc_donescb, scb, chain); 290 291 splx(s); 292 } 293 294 static __inline struct iha_scb * 295 iha_pop_done_scb(sc) 296 struct iha_softc *sc; 297 { 298 struct iha_scb *scb; 299 int s; 300 301 s = splbio(); 302 303 scb = TAILQ_FIRST(&sc->sc_donescb); 304 305 if (scb != NULL) { 306 scb->status = STATUS_RENT; 307 TAILQ_REMOVE(&sc->sc_donescb, scb, chain); 308 } 309 310 splx(s); 311 312 return (scb); 313 } 314 315 /* 316 * iha_find_pend_scb - scan the pending queue for a SCB that can be 317 * processed immediately. Return NULL if none found 318 * and a pointer to the SCB if one is found. If there 319 * is an active SCB, return NULL! 320 */ 321 static struct iha_scb * 322 iha_find_pend_scb(sc) 323 struct iha_softc *sc; 324 { 325 struct iha_scb *scb; 326 struct tcs *tcs; 327 int s; 328 329 s = splbio(); 330 331 if (sc->sc_actscb != NULL) 332 scb = NULL; 333 334 else 335 TAILQ_FOREACH(scb, &sc->sc_pendscb, chain) { 336 if ((scb->xs->xs_control & XS_CTL_RESET) != 0) 337 /* ALWAYS willing to reset a device */ 338 break; 339 340 tcs = scb->tcs; 341 342 if ((scb->scb_tagmsg) != 0) { 343 /* 344 * A Tagged I/O. OK to start If no 345 * non-tagged I/O is active on the same 346 * target 347 */ 348 if (tcs->ntagscb == NULL) 349 break; 350 351 } else if (scb->cmd[0] == REQUEST_SENSE) { 352 /* 353 * OK to do a non-tagged request sense 354 * even if a non-tagged I/O has been 355 * started, 'cuz we don't allow any 356 * disconnect during a request sense op 357 */ 358 break; 359 360 } else if (tcs->tagcnt == 0) { 361 /* 362 * No tagged I/O active on this target, 363 * ok to start a non-tagged one if one 364 * is not already active 365 */ 366 if (tcs->ntagscb == NULL) 367 break; 368 } 369 } 370 371 splx(s); 372 373 return (scb); 374 } 375 376 static __inline void 377 iha_append_pend_scb(sc, scb) 378 struct iha_softc *sc; 379 struct iha_scb *scb; 380 { 381 /* ASSUMPTION: only called within a splbio()/splx() pair */ 382 383 if (scb == sc->sc_actscb) 384 sc->sc_actscb = NULL; 385 386 scb->status = STATUS_QUEUED; 387 388 TAILQ_INSERT_TAIL(&sc->sc_pendscb, scb, chain); 389 } 390 391 static __inline void 392 iha_push_pend_scb(sc, scb) 393 struct iha_softc *sc; 394 struct iha_scb *scb; 395 { 396 int s; 397 398 s = splbio(); 399 400 if (scb == sc->sc_actscb) 401 sc->sc_actscb = NULL; 402 403 scb->status = STATUS_QUEUED; 404 405 TAILQ_INSERT_HEAD(&sc->sc_pendscb, scb, chain); 406 407 splx(s); 408 } 409 410 /* 411 * iha_del_pend_scb - remove scb from sc_pendscb 412 */ 413 static __inline void 414 iha_del_pend_scb(sc, scb) 415 struct iha_softc *sc; 416 struct iha_scb *scb; 417 { 418 int s; 419 420 s = splbio(); 421 422 TAILQ_REMOVE(&sc->sc_pendscb, scb, chain); 423 424 splx(s); 425 } 426 427 static __inline void 428 iha_mark_busy_scb(scb) 429 struct iha_scb *scb; 430 { 431 int s; 432 433 s = splbio(); 434 435 scb->status = STATUS_BUSY; 436 437 if (scb->scb_tagmsg == 0) 438 scb->tcs->ntagscb = scb; 439 else 440 scb->tcs->tagcnt++; 441 442 splx(s); 443 } 444 445 /* 446 * iha_set_ssig - read the current scsi signal mask, then write a new 447 * one which turns off/on the specified signals. 448 */ 449 static __inline void 450 iha_set_ssig(sc, offsigs, onsigs) 451 struct iha_softc *sc; 452 u_int8_t offsigs, onsigs; 453 { 454 bus_space_tag_t iot = sc->sc_iot; 455 bus_space_handle_t ioh = sc->sc_ioh; 456 u_int8_t currsigs; 457 458 currsigs = bus_space_read_1(iot, ioh, TUL_SSIGI); 459 bus_space_write_1(iot, ioh, TUL_SSIGO, (currsigs & ~offsigs) | onsigs); 460 } 461 462 /* 463 * iha_intr - the interrupt service routine for the iha driver 464 */ 465 int 466 iha_intr(arg) 467 void *arg; 468 { 469 bus_space_tag_t iot; 470 bus_space_handle_t ioh; 471 struct iha_softc *sc; 472 int s; 473 474 sc = (struct iha_softc *)arg; 475 iot = sc->sc_iot; 476 ioh = sc->sc_ioh; 477 478 if ((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 479 return (0); 480 481 s = splbio(); /* XXX - Or are interrupts off when ISR's are called? */ 482 483 if (sc->sc_semaph != SEMAPH_IN_MAIN) { 484 /* XXX - need these inside a splbio()/splx()? */ 485 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 486 sc->sc_semaph = SEMAPH_IN_MAIN; 487 488 iha_main(sc); 489 490 sc->sc_semaph = ~SEMAPH_IN_MAIN; 491 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 492 } 493 494 splx(s); 495 496 return (1); 497 } 498 499 void 500 iha_attach(sc) 501 struct iha_softc *sc; 502 { 503 bus_space_tag_t iot = sc->sc_iot; 504 bus_space_handle_t ioh = sc->sc_ioh; 505 struct iha_scb *scb; 506 struct iha_eeprom eeprom; 507 struct eeprom_adapter *conf; 508 int i, error, reg; 509 510 iha_read_eeprom(sc, &eeprom); 511 512 conf = &eeprom.adapter[0]; 513 514 /* 515 * fill in the rest of the iha_softc fields 516 */ 517 sc->sc_id = CFG_ID(conf->config1); 518 sc->sc_semaph = ~SEMAPH_IN_MAIN; 519 sc->sc_status0 = 0; 520 sc->sc_actscb = NULL; 521 522 TAILQ_INIT(&sc->sc_freescb); 523 TAILQ_INIT(&sc->sc_pendscb); 524 TAILQ_INIT(&sc->sc_donescb); 525 error = iha_alloc_sglist(sc); 526 if (error != 0) { 527 printf(": cannot allocate sglist\n"); 528 return; 529 } 530 531 sc->sc_scb = malloc(sizeof(struct iha_scb) * IHA_MAX_SCB, 532 M_DEVBUF, M_NOWAIT|M_ZERO); 533 if (sc->sc_scb == NULL) { 534 printf(": cannot allocate SCB\n"); 535 return; 536 } 537 538 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) { 539 scb->scb_tagid = i; 540 scb->sgoffset = IHA_SG_SIZE * i; 541 scb->sglist = sc->sc_sglist + IHA_MAX_SG_ENTRIES * i; 542 scb->sg_addr = 543 sc->sc_dmamap->dm_segs[0].ds_addr + scb->sgoffset; 544 545 error = bus_dmamap_create(sc->sc_dmat, 546 MAXPHYS, IHA_MAX_SG_ENTRIES, MAXPHYS, 0, 547 BUS_DMA_NOWAIT, &scb->dmap); 548 549 if (error != 0) { 550 printf(": couldn't create SCB DMA map, error = %d\n", 551 error); 552 return; 553 } 554 TAILQ_INSERT_TAIL(&sc->sc_freescb, scb, chain); 555 } 556 557 /* Mask all the interrupts */ 558 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 559 560 /* Stop any I/O and reset the scsi module */ 561 iha_reset_dma(sc); 562 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSMOD); 563 564 /* Program HBA's SCSI ID */ 565 bus_space_write_1(iot, ioh, TUL_SID, sc->sc_id << 4); 566 567 /* 568 * Configure the channel as requested by the NVRAM settings read 569 * by iha_read_eeprom() above. 570 */ 571 572 sc->sc_sconf1 = SCONFIG0DEFAULT; 573 if ((conf->config1 & CFG_EN_PAR) != 0) 574 sc->sc_sconf1 |= SPCHK; 575 bus_space_write_1(iot, ioh, TUL_SCONFIG0, sc->sc_sconf1); 576 577 /* set selection time out 250 ms */ 578 bus_space_write_1(iot, ioh, TUL_STIMO, STIMO_250MS); 579 580 /* Enable desired SCSI termination configuration read from eeprom */ 581 reg = 0; 582 if (conf->config1 & CFG_ACT_TERM1) 583 reg |= ENTMW; 584 if (conf->config1 & CFG_ACT_TERM2) 585 reg |= ENTM; 586 bus_space_write_1(iot, ioh, TUL_DCTRL0, reg); 587 588 reg = bus_space_read_1(iot, ioh, TUL_GCTRL1) & ~ATDEN; 589 if (conf->config1 & CFG_AUTO_TERM) 590 reg |= ATDEN; 591 bus_space_write_1(iot, ioh, TUL_GCTRL1, reg); 592 593 for (i = 0; i < IHA_MAX_TARGETS / 2; i++) { 594 sc->sc_tcs[i * 2 ].flags = EEP_LBYTE(conf->tflags[i]); 595 sc->sc_tcs[i * 2 + 1].flags = EEP_HBYTE(conf->tflags[i]); 596 iha_reset_tcs(&sc->sc_tcs[i * 2 ], sc->sc_sconf1); 597 iha_reset_tcs(&sc->sc_tcs[i * 2 + 1], sc->sc_sconf1); 598 } 599 600 iha_reset_chip(sc); 601 bus_space_write_1(iot, ioh, TUL_SIEN, ALL_INTERRUPTS); 602 603 /* 604 * fill in the adapter. 605 */ 606 sc->sc_adapter.adapt_dev = &sc->sc_dev; 607 sc->sc_adapter.adapt_nchannels = 1; 608 sc->sc_adapter.adapt_openings = IHA_MAX_SCB; 609 sc->sc_adapter.adapt_max_periph = IHA_MAX_SCB; 610 sc->sc_adapter.adapt_ioctl = NULL; 611 sc->sc_adapter.adapt_minphys = minphys; 612 sc->sc_adapter.adapt_request = iha_scsipi_request; 613 614 /* 615 * fill in the channel. 616 */ 617 sc->sc_channel.chan_adapter = &sc->sc_adapter; 618 sc->sc_channel.chan_bustype = &scsi_bustype; 619 sc->sc_channel.chan_channel = 0; 620 sc->sc_channel.chan_ntargets = CFG_TARGET(conf->config2); 621 sc->sc_channel.chan_nluns = 8; 622 sc->sc_channel.chan_id = sc->sc_id; 623 624 /* 625 * Now try to attach all the sub devices. 626 */ 627 config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 628 } 629 630 /* 631 * iha_alloc_sglist - allocate and map sglist for SCB's 632 */ 633 static int 634 iha_alloc_sglist(sc) 635 struct iha_softc *sc; 636 { 637 bus_dma_segment_t seg; 638 int error, rseg; 639 640 /* 641 * Allocate dma-safe memory for the SCB's sglist 642 */ 643 if ((error = bus_dmamem_alloc(sc->sc_dmat, 644 IHA_SG_SIZE * IHA_MAX_SCB, 645 PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 646 printf(": unable to allocate sglist, error = %d\n", error); 647 return (error); 648 } 649 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 650 IHA_SG_SIZE * IHA_MAX_SCB, (caddr_t *)&sc->sc_sglist, 651 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 652 printf(": unable to map sglist, error = %d\n", error); 653 return (error); 654 } 655 656 /* 657 * Create and load the DMA map used for the SCBs 658 */ 659 if ((error = bus_dmamap_create(sc->sc_dmat, 660 IHA_SG_SIZE * IHA_MAX_SCB, 1, IHA_SG_SIZE * IHA_MAX_SCB, 661 0, BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 662 printf(": unable to create control DMA map, error = %d\n", 663 error); 664 return (error); 665 } 666 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, 667 sc->sc_sglist, IHA_SG_SIZE * IHA_MAX_SCB, 668 NULL, BUS_DMA_NOWAIT)) != 0) { 669 printf(": unable to load control DMA map, error = %d\n", error); 670 return (error); 671 } 672 673 memset(sc->sc_sglist, 0, IHA_SG_SIZE * IHA_MAX_SCB); 674 675 return (0); 676 } 677 678 void 679 iha_scsipi_request(chan, req, arg) 680 struct scsipi_channel *chan; 681 scsipi_adapter_req_t req; 682 void *arg; 683 { 684 struct scsipi_xfer *xs; 685 struct scsipi_periph *periph; 686 struct iha_scb *scb; 687 struct iha_softc *sc; 688 int error, s; 689 690 sc = (struct iha_softc *)chan->chan_adapter->adapt_dev; 691 692 switch (req) { 693 case ADAPTER_REQ_RUN_XFER: 694 xs = arg; 695 periph = xs->xs_periph; 696 697 if (xs->cmdlen > sizeof(struct scsi_generic) || 698 periph->periph_target >= IHA_MAX_TARGETS) { 699 xs->error = XS_DRIVER_STUFFUP; 700 return; 701 } 702 703 s = splbio(); 704 scb = TAILQ_FIRST(&sc->sc_freescb); 705 if (scb != NULL) { 706 scb->status = STATUS_RENT; 707 TAILQ_REMOVE(&sc->sc_freescb, scb, chain); 708 } 709 #ifdef DIAGNOSTIC 710 else { 711 scsipi_printaddr(periph); 712 printf("unable to allocate scb\n"); 713 panic("iha_scsipi_request"); 714 } 715 #endif 716 splx(s); 717 718 scb->target = periph->periph_target; 719 scb->lun = periph->periph_lun; 720 scb->tcs = &sc->sc_tcs[scb->target]; 721 scb->scb_id = MSG_IDENTIFY(periph->periph_lun, 722 (xs->xs_control & XS_CTL_REQSENSE) == 0); 723 724 scb->xs = xs; 725 scb->cmdlen = xs->cmdlen; 726 memcpy(&scb->cmd, xs->cmd, xs->cmdlen); 727 scb->buflen = xs->datalen; 728 scb->flags = 0; 729 if (xs->xs_control & XS_CTL_DATA_OUT) 730 scb->flags |= FLAG_DATAOUT; 731 if (xs->xs_control & XS_CTL_DATA_IN) 732 scb->flags |= FLAG_DATAIN; 733 734 if (scb->flags & (FLAG_DATAIN | FLAG_DATAOUT)) { 735 error = bus_dmamap_load(sc->sc_dmat, scb->dmap, 736 xs->data, scb->buflen, NULL, 737 ((xs->xs_control & XS_CTL_NOSLEEP) ? 738 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) | 739 BUS_DMA_STREAMING | 740 ((scb->flags & FLAG_DATAIN) ? 741 BUS_DMA_READ : BUS_DMA_WRITE)); 742 743 if (error) { 744 printf("%s: error %d loading dma map\n", 745 sc->sc_dev.dv_xname, error); 746 iha_append_free_scb(sc, scb); 747 xs->error = XS_DRIVER_STUFFUP; 748 scsipi_done(xs); 749 return; 750 } 751 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 752 0, scb->dmap->dm_mapsize, 753 (scb->flags & FLAG_DATAIN) ? 754 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 755 } 756 757 iha_exec_scb(sc, scb); 758 return; 759 760 case ADAPTER_REQ_GROW_RESOURCES: 761 return; /* XXX */ 762 763 case ADAPTER_REQ_SET_XFER_MODE: 764 { 765 struct tcs *tcs; 766 struct scsipi_xfer_mode *xm = arg; 767 768 tcs = &sc->sc_tcs[xm->xm_target]; 769 770 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0 && 771 (tcs->flags & FLAG_NO_WIDE) == 0) 772 tcs->flags &= ~(FLAG_WIDE_DONE|FLAG_SYNC_DONE); 773 774 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 && 775 (tcs->flags & FLAG_NO_SYNC) == 0) 776 tcs->flags &= ~FLAG_SYNC_DONE; 777 778 /* 779 * If we're not going to negotiate, send the 780 * notification now, since it won't happen later. 781 */ 782 if ((tcs->flags & (FLAG_WIDE_DONE|FLAG_SYNC_DONE)) == 783 (FLAG_WIDE_DONE|FLAG_SYNC_DONE)) 784 iha_update_xfer_mode(sc, xm->xm_target); 785 786 return; 787 } 788 } 789 } 790 791 void 792 iha_update_xfer_mode(sc, target) 793 struct iha_softc *sc; 794 int target; 795 { 796 struct tcs *tcs = &sc->sc_tcs[target]; 797 struct scsipi_xfer_mode xm; 798 799 xm.xm_target = target; 800 xm.xm_mode = 0; 801 xm.xm_period = 0; 802 xm.xm_offset = 0; 803 804 if (tcs->syncm & PERIOD_WIDE_SCSI) 805 xm.xm_mode |= PERIPH_CAP_WIDE16; 806 807 if (tcs->period) { 808 xm.xm_mode |= PERIPH_CAP_SYNC; 809 xm.xm_period = tcs->period; 810 xm.xm_offset = tcs->offset; 811 } 812 813 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); 814 } 815 816 static void 817 iha_reset_scsi_bus(sc) 818 struct iha_softc *sc; 819 { 820 struct iha_scb *scb; 821 struct tcs *tcs; 822 int i, s; 823 824 s = splbio(); 825 826 iha_reset_dma(sc); 827 828 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 829 switch (scb->status) { 830 case STATUS_BUSY: 831 iha_append_done_scb(sc, scb, HOST_SCSI_RST); 832 break; 833 834 case STATUS_SELECT: 835 iha_push_pend_scb(sc, scb); 836 break; 837 838 default: 839 break; 840 } 841 842 for (i = 0, tcs = sc->sc_tcs; i < IHA_MAX_TARGETS; i++, tcs++) 843 iha_reset_tcs(tcs, sc->sc_sconf1); 844 845 splx(s); 846 } 847 848 void 849 iha_reset_chip(sc) 850 struct iha_softc *sc; 851 { 852 bus_space_tag_t iot = sc->sc_iot; 853 bus_space_handle_t ioh = sc->sc_ioh; 854 855 /* reset tulip chip */ 856 857 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSCSI); 858 859 do { 860 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 861 } while ((sc->sc_sistat & SRSTD) == 0); 862 863 iha_set_ssig(sc, 0, 0); 864 865 bus_space_read_1(iot, ioh, TUL_SISTAT); /* Clear any active interrupt*/ 866 } 867 868 /* 869 * iha_reset_dma - abort any active DMA xfer, reset tulip FIFO. 870 */ 871 static void 872 iha_reset_dma(sc) 873 struct iha_softc *sc; 874 { 875 bus_space_tag_t iot = sc->sc_iot; 876 bus_space_handle_t ioh = sc->sc_ioh; 877 878 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 879 /* if DMA xfer is pending, abort DMA xfer */ 880 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 881 /* wait Abort DMA xfer done */ 882 while ((bus_space_read_1(iot, ioh, TUL_ISTUS0) & DABT) == 0) 883 ; 884 } 885 886 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 887 } 888 889 /* 890 * iha_reset_tcs - reset the target control structure pointed 891 * to by tcs to default values. tcs flags 892 * only has the negotiation done bits reset as 893 * the other bits are fixed at initialization. 894 */ 895 static void 896 iha_reset_tcs(tcs, config0) 897 struct tcs *tcs; 898 u_int8_t config0; 899 { 900 901 tcs->flags &= ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 902 tcs->period = 0; 903 tcs->offset = 0; 904 tcs->tagcnt = 0; 905 tcs->ntagscb = NULL; 906 tcs->syncm = 0; 907 tcs->sconfig0 = config0; 908 } 909 910 /* 911 * iha_main - process the active SCB, taking one off pending and making it 912 * active if necessary, and any done SCB's created as 913 * a result until there are no interrupts pending and no pending 914 * SCB's that can be started. 915 */ 916 static void 917 iha_main(sc) 918 struct iha_softc *sc; 919 { 920 bus_space_tag_t iot = sc->sc_iot; 921 bus_space_handle_t ioh =sc->sc_ioh; 922 struct iha_scb *scb; 923 924 for (;;) { 925 iha_scsi(sc); 926 927 while ((scb = iha_pop_done_scb(sc)) != NULL) 928 iha_done_scb(sc, scb); 929 930 /* 931 * If there are no interrupts pending, or we can't start 932 * a pending sc, break out of the for(;;). Otherwise 933 * continue the good work with another call to 934 * iha_scsi(). 935 */ 936 if (((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 937 && (iha_find_pend_scb(sc) == NULL)) 938 break; 939 } 940 } 941 942 /* 943 * iha_scsi - service any outstanding interrupts. If there are none, try to 944 * start another SCB currently in the pending queue. 945 */ 946 static void 947 iha_scsi(sc) 948 struct iha_softc *sc; 949 { 950 bus_space_tag_t iot = sc->sc_iot; 951 bus_space_handle_t ioh = sc->sc_ioh; 952 struct iha_scb *scb; 953 struct tcs *tcs; 954 u_int8_t stat; 955 956 /* service pending interrupts asap */ 957 958 stat = bus_space_read_1(iot, ioh, TUL_STAT0); 959 if ((stat & INTPD) != 0) { 960 sc->sc_status0 = stat; 961 sc->sc_status1 = bus_space_read_1(iot, ioh, TUL_STAT1); 962 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 963 964 sc->sc_phase = sc->sc_status0 & PH_MASK; 965 966 if ((sc->sc_sistat & SRSTD) != 0) { 967 iha_reset_scsi_bus(sc); 968 return; 969 } 970 971 if ((sc->sc_sistat & RSELED) != 0) { 972 iha_resel(sc); 973 return; 974 } 975 976 if ((sc->sc_sistat & (STIMEO | DISCD)) != 0) { 977 iha_busfree(sc); 978 return; 979 } 980 981 if ((sc->sc_sistat & (SCMDN | SBSRV)) != 0) { 982 iha_next_state(sc); 983 return; 984 } 985 986 if ((sc->sc_sistat & SELED) != 0) 987 iha_set_ssig(sc, 0, 0); 988 } 989 990 /* 991 * There were no interrupts pending which required action elsewhere, so 992 * see if it is possible to start the selection phase on a pending SCB 993 */ 994 if ((scb = iha_find_pend_scb(sc)) == NULL) 995 return; 996 997 tcs = scb->tcs; 998 999 /* program HBA's SCSI ID & target SCSI ID */ 1000 bus_space_write_1(iot, ioh, TUL_SID, (sc->sc_id << 4) | scb->target); 1001 1002 if ((scb->xs->xs_control & XS_CTL_RESET) == 0) { 1003 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 1004 1005 if ((tcs->flags & FLAG_NO_NEG_SYNC) == 0 || 1006 (tcs->flags & FLAG_NO_NEG_WIDE) == 0) 1007 iha_select(sc, scb, SELATNSTOP); 1008 1009 else if (scb->scb_tagmsg != 0) 1010 iha_select(sc, scb, SEL_ATN3); 1011 1012 else 1013 iha_select(sc, scb, SEL_ATN); 1014 1015 } else { 1016 iha_select(sc, scb, SELATNSTOP); 1017 scb->nextstat = 8; 1018 } 1019 1020 if ((scb->xs->xs_control & XS_CTL_POLL) != 0) { 1021 int timeout; 1022 for (timeout = scb->xs->timeout; timeout > 0; timeout--) { 1023 if (iha_wait(sc, NO_OP) == -1) 1024 break; 1025 if (iha_next_state(sc) == -1) 1026 break; 1027 delay(1000); /* Only happens in boot, so it's ok */ 1028 } 1029 1030 /* 1031 * Since done queue processing not done until AFTER this 1032 * function returns, scb is on the done queue, not 1033 * the free queue at this point and still has valid data 1034 * 1035 * Conversely, xs->error has not been set yet 1036 */ 1037 if (timeout == 0) 1038 iha_timeout(scb); 1039 } 1040 } 1041 1042 static void 1043 iha_select(sc, scb, select_type) 1044 struct iha_softc *sc; 1045 struct iha_scb *scb; 1046 u_int8_t select_type; 1047 { 1048 bus_space_tag_t iot = sc->sc_iot; 1049 bus_space_handle_t ioh = sc->sc_ioh; 1050 1051 switch (select_type) { 1052 case SEL_ATN: 1053 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 1054 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 1055 scb->cmd, scb->cmdlen); 1056 1057 scb->nextstat = 2; 1058 break; 1059 1060 case SELATNSTOP: 1061 scb->nextstat = 1; 1062 break; 1063 1064 case SEL_ATN3: 1065 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 1066 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_tagmsg); 1067 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_tagid); 1068 1069 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, scb->cmd, 1070 scb->cmdlen); 1071 1072 scb->nextstat = 2; 1073 break; 1074 1075 default: 1076 printf("[debug] iha_select() - unknown select type = 0x%02x\n", 1077 select_type); 1078 return; 1079 } 1080 1081 iha_del_pend_scb(sc, scb); 1082 scb->status = STATUS_SELECT; 1083 1084 sc->sc_actscb = scb; 1085 1086 bus_space_write_1(iot, ioh, TUL_SCMD, select_type); 1087 } 1088 1089 /* 1090 * iha_wait - wait for an interrupt to service or a SCSI bus phase change 1091 * after writing the supplied command to the tulip chip. If 1092 * the command is NO_OP, skip the command writing. 1093 */ 1094 static int 1095 iha_wait(sc, cmd) 1096 struct iha_softc *sc; 1097 u_int8_t cmd; 1098 { 1099 bus_space_tag_t iot = sc->sc_iot; 1100 bus_space_handle_t ioh = sc->sc_ioh; 1101 1102 if (cmd != NO_OP) 1103 bus_space_write_1(iot, ioh, TUL_SCMD, cmd); 1104 1105 /* 1106 * Have to do this here, in addition to in iha_isr, because 1107 * interrupts might be turned off when we get here. 1108 */ 1109 do { 1110 sc->sc_status0 = bus_space_read_1(iot, ioh, TUL_STAT0); 1111 } while ((sc->sc_status0 & INTPD) == 0); 1112 1113 sc->sc_status1 = bus_space_read_1(iot, ioh, TUL_STAT1); 1114 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 1115 1116 sc->sc_phase = sc->sc_status0 & PH_MASK; 1117 1118 if ((sc->sc_sistat & SRSTD) != 0) { 1119 /* SCSI bus reset interrupt */ 1120 iha_reset_scsi_bus(sc); 1121 return (-1); 1122 } 1123 1124 if ((sc->sc_sistat & RSELED) != 0) 1125 /* Reselection interrupt */ 1126 return (iha_resel(sc)); 1127 1128 if ((sc->sc_sistat & STIMEO) != 0) { 1129 /* selected/reselected timeout interrupt */ 1130 iha_busfree(sc); 1131 return (-1); 1132 } 1133 1134 if ((sc->sc_sistat & DISCD) != 0) { 1135 /* BUS disconnection interrupt */ 1136 if ((sc->sc_flags & FLAG_EXPECT_DONE_DISC) != 0) { 1137 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1138 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 1139 SCONFIG0DEFAULT); 1140 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1141 iha_append_done_scb(sc, sc->sc_actscb, HOST_OK); 1142 sc->sc_flags &= ~FLAG_EXPECT_DONE_DISC; 1143 1144 } else if ((sc->sc_flags & FLAG_EXPECT_DISC) != 0) { 1145 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1146 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 1147 SCONFIG0DEFAULT); 1148 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1149 sc->sc_actscb = NULL; 1150 sc->sc_flags &= ~FLAG_EXPECT_DISC; 1151 1152 } else 1153 iha_busfree(sc); 1154 1155 return (-1); 1156 } 1157 1158 return (sc->sc_phase); 1159 } 1160 1161 static void 1162 iha_exec_scb(sc, scb) 1163 struct iha_softc *sc; 1164 struct iha_scb *scb; 1165 { 1166 bus_space_tag_t iot; 1167 bus_space_handle_t ioh; 1168 bus_dmamap_t dm; 1169 struct scsipi_xfer *xs = scb->xs; 1170 int nseg, s; 1171 1172 dm = scb->dmap; 1173 nseg = dm->dm_nsegs; 1174 1175 if (nseg > 1) { 1176 struct iha_sg_element *sg = scb->sglist; 1177 int i; 1178 1179 for (i = 0; i < nseg; i++) { 1180 sg[i].sg_len = htole32(dm->dm_segs[i].ds_len); 1181 sg[i].sg_addr = htole32(dm->dm_segs[i].ds_addr); 1182 } 1183 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1184 scb->sgoffset, IHA_SG_SIZE, 1185 BUS_DMASYNC_PREWRITE); 1186 1187 scb->flags |= FLAG_SG; 1188 scb->sg_size = scb->sg_max = nseg; 1189 scb->sg_index = 0; 1190 1191 scb->bufaddr = scb->sg_addr; 1192 } else 1193 scb->bufaddr = dm->dm_segs[0].ds_addr; 1194 1195 if ((xs->xs_control & XS_CTL_POLL) == 0) { 1196 int timeout = mstohz(xs->timeout); 1197 if (timeout == 0) 1198 timeout = 1; 1199 callout_reset(&xs->xs_callout, timeout, iha_timeout, scb); 1200 } 1201 1202 s = splbio(); 1203 1204 if (((scb->xs->xs_control & XS_RESET) != 0) || 1205 (scb->cmd[0] == REQUEST_SENSE)) 1206 iha_push_pend_scb(sc, scb); /* Insert SCB at head of Pend */ 1207 else 1208 iha_append_pend_scb(sc, scb); /* Append SCB to tail of Pend */ 1209 1210 /* 1211 * Run through iha_main() to ensure something is active, if 1212 * only this new SCB. 1213 */ 1214 if (sc->sc_semaph != SEMAPH_IN_MAIN) { 1215 iot = sc->sc_iot; 1216 ioh = sc->sc_ioh; 1217 1218 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 1219 sc->sc_semaph = SEMAPH_IN_MAIN;; 1220 1221 splx(s); 1222 iha_main(sc); 1223 s = splbio(); 1224 1225 sc->sc_semaph = ~SEMAPH_IN_MAIN;; 1226 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 1227 } 1228 1229 splx(s); 1230 } 1231 1232 /* 1233 * iha_done_scb - We have a scb which has been processed by the 1234 * adaptor, now we look to see how the operation went. 1235 */ 1236 static void 1237 iha_done_scb(sc, scb) 1238 struct iha_softc *sc; 1239 struct iha_scb *scb; 1240 { 1241 struct scsipi_xfer *xs = scb->xs; 1242 1243 if (xs != NULL) { 1244 /* Cancel the timeout. */ 1245 callout_stop(&xs->xs_callout); 1246 1247 if (scb->flags & (FLAG_DATAIN | FLAG_DATAOUT)) { 1248 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 1249 0, scb->dmap->dm_mapsize, 1250 (scb->flags & FLAG_DATAIN) ? 1251 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1252 bus_dmamap_unload(sc->sc_dmat, scb->dmap); 1253 } 1254 1255 xs->status = scb->ta_stat; 1256 1257 switch (scb->ha_stat) { 1258 case HOST_OK: 1259 switch (scb->ta_stat) { 1260 case SCSI_OK: 1261 case SCSI_CONDITION_MET: 1262 case SCSI_INTERM: 1263 case SCSI_INTERM_COND_MET: 1264 xs->resid = scb->buflen; 1265 xs->error = XS_NOERROR; 1266 if ((scb->flags & FLAG_RSENS) != 0) 1267 xs->error = XS_SENSE; 1268 break; 1269 1270 case SCSI_RESV_CONFLICT: 1271 case SCSI_BUSY: 1272 case SCSI_QUEUE_FULL: 1273 xs->error = XS_BUSY; 1274 break; 1275 1276 case SCSI_TERMINATED: 1277 case SCSI_ACA_ACTIVE: 1278 case SCSI_CHECK: 1279 scb->tcs->flags &= 1280 ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 1281 1282 if ((scb->flags & FLAG_RSENS) != 0 || 1283 iha_push_sense_request(sc, scb) != 0) { 1284 scb->flags &= ~FLAG_RSENS; 1285 printf("%s: request sense failed\n", 1286 sc->sc_dev.dv_xname); 1287 xs->error = XS_DRIVER_STUFFUP; 1288 break; 1289 } 1290 1291 xs->error = XS_SENSE; 1292 return; 1293 1294 default: 1295 xs->error = XS_DRIVER_STUFFUP; 1296 break; 1297 } 1298 break; 1299 1300 case HOST_SEL_TOUT: 1301 xs->error = XS_SELTIMEOUT; 1302 break; 1303 1304 case HOST_SCSI_RST: 1305 case HOST_DEV_RST: 1306 xs->error = XS_RESET; 1307 break; 1308 1309 case HOST_SPERR: 1310 printf("%s: SCSI Parity error detected\n", 1311 sc->sc_dev.dv_xname); 1312 xs->error = XS_DRIVER_STUFFUP; 1313 break; 1314 1315 case HOST_TIMED_OUT: 1316 xs->error = XS_TIMEOUT; 1317 break; 1318 1319 case HOST_DO_DU: 1320 case HOST_BAD_PHAS: 1321 default: 1322 xs->error = XS_DRIVER_STUFFUP; 1323 break; 1324 } 1325 1326 scsipi_done(xs); 1327 } 1328 1329 iha_append_free_scb(sc, scb); 1330 } 1331 1332 /* 1333 * iha_push_sense_request - obtain auto sense data by pushing the 1334 * SCB needing it back onto the pending 1335 * queue with a REQUEST_SENSE CDB. 1336 */ 1337 static int 1338 iha_push_sense_request(sc, scb) 1339 struct iha_softc *sc; 1340 struct iha_scb *scb; 1341 { 1342 struct scsipi_xfer *xs = scb->xs; 1343 struct scsipi_periph *periph = xs->xs_periph; 1344 struct scsipi_sense *ss = (struct scsipi_sense *)scb->cmd; 1345 int lun = periph->periph_lun; 1346 int err; 1347 1348 ss->opcode = REQUEST_SENSE; 1349 ss->byte2 = lun << SCSI_CMD_LUN_SHIFT; 1350 ss->unused[0] = ss->unused[1] = 0; 1351 ss->length = sizeof(struct scsipi_sense_data); 1352 ss->control = 0; 1353 1354 scb->flags = FLAG_RSENS | FLAG_DATAIN; 1355 1356 scb->scb_id &= ~MSG_IDENTIFY_DISCFLAG; 1357 1358 scb->scb_tagmsg = 0; 1359 scb->ta_stat = SCSI_OK; 1360 1361 scb->cmdlen = sizeof(struct scsipi_sense); 1362 scb->buflen = ss->length; 1363 1364 err = bus_dmamap_load(sc->sc_dmat, scb->dmap, 1365 &xs->sense.scsi_sense, scb->buflen, NULL, 1366 BUS_DMA_READ|BUS_DMA_NOWAIT); 1367 if (err != 0) { 1368 printf("iha_push_sense_request: cannot bus_dmamap_load()\n"); 1369 xs->error = XS_DRIVER_STUFFUP; 1370 return 1; 1371 } 1372 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 1373 0, scb->buflen, BUS_DMASYNC_PREREAD); 1374 1375 /* XXX What about queued command? */ 1376 iha_exec_scb(sc, scb); 1377 1378 return 0; 1379 } 1380 1381 static void 1382 iha_timeout(arg) 1383 void *arg; 1384 { 1385 struct iha_scb *scb = (struct iha_scb *)arg; 1386 struct scsipi_xfer *xs = scb->xs; 1387 struct scsipi_periph *periph = xs->xs_periph; 1388 struct iha_softc *sc; 1389 1390 sc = (void *)periph->periph_channel->chan_adapter->adapt_dev; 1391 1392 if (xs == NULL) 1393 printf("[debug] iha_timeout called with xs == NULL\n"); 1394 1395 else { 1396 scsipi_printaddr(periph); 1397 printf("SCSI OpCode 0x%02x timed out\n", xs->cmd->opcode); 1398 1399 iha_abort_xs(sc, xs, HOST_TIMED_OUT); 1400 } 1401 } 1402 1403 /* 1404 * iha_abort_xs - find the SCB associated with the supplied xs and 1405 * stop all processing on it, moving it to the done 1406 * queue with the supplied host status value. 1407 */ 1408 static void 1409 iha_abort_xs(sc, xs, hastat) 1410 struct iha_softc *sc; 1411 struct scsipi_xfer *xs; 1412 u_int8_t hastat; 1413 { 1414 struct iha_scb *scb; 1415 int i, s; 1416 1417 s = splbio(); 1418 1419 /* Check the pending queue for the SCB pointing to xs */ 1420 1421 TAILQ_FOREACH(scb, &sc->sc_pendscb, chain) 1422 if (scb->xs == xs) { 1423 iha_del_pend_scb(sc, scb); 1424 iha_append_done_scb(sc, scb, hastat); 1425 splx(s); 1426 return; 1427 } 1428 1429 /* 1430 * If that didn't work, check all BUSY/SELECTING SCB's for one 1431 * pointing to xs 1432 */ 1433 1434 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 1435 switch (scb->status) { 1436 case STATUS_BUSY: 1437 case STATUS_SELECT: 1438 if (scb->xs == xs) { 1439 iha_append_done_scb(sc, scb, hastat); 1440 splx(s); 1441 return; 1442 } 1443 break; 1444 default: 1445 break; 1446 } 1447 1448 splx(s); 1449 } 1450 1451 /* 1452 * iha_data_over_run - return HOST_OK for all SCSI opcodes where BufLen 1453 * is an 'Allocation Length'. All other SCSI opcodes 1454 * get HOST_DO_DU as they SHOULD have xferred all the 1455 * data requested. 1456 * 1457 * The list of opcodes using 'Allocation Length' was 1458 * found by scanning all the SCSI-3 T10 drafts. See 1459 * www.t10.org for the curious with a .pdf reader. 1460 */ 1461 static u_int8_t 1462 iha_data_over_run(scb) 1463 struct iha_scb *scb; 1464 { 1465 switch (scb->cmd[0]) { 1466 case 0x03: /* Request Sense SPC-2 */ 1467 case 0x12: /* Inquiry SPC-2 */ 1468 case 0x1a: /* Mode Sense (6 byte version) SPC-2 */ 1469 case 0x1c: /* Receive Diagnostic Results SPC-2 */ 1470 case 0x23: /* Read Format Capacities MMC-2 */ 1471 case 0x29: /* Read Generation SBC */ 1472 case 0x34: /* Read Position SSC-2 */ 1473 case 0x37: /* Read Defect Data SBC */ 1474 case 0x3c: /* Read Buffer SPC-2 */ 1475 case 0x42: /* Read Sub Channel MMC-2 */ 1476 case 0x43: /* Read TOC/PMA/ATIP MMC */ 1477 1478 /* XXX - 2 with same opcode of 0x44? */ 1479 case 0x44: /* Read Header/Read Density Suprt MMC/SSC*/ 1480 1481 case 0x46: /* Get Configuration MMC-2 */ 1482 case 0x4a: /* Get Event/Status Notification MMC-2 */ 1483 case 0x4d: /* Log Sense SPC-2 */ 1484 case 0x51: /* Read Disc Information MMC */ 1485 case 0x52: /* Read Track Information MMC */ 1486 case 0x59: /* Read Master CUE MMC */ 1487 case 0x5a: /* Mode Sense (10 byte version) SPC-2 */ 1488 case 0x5c: /* Read Buffer Capacity MMC */ 1489 case 0x5e: /* Persistant Reserve In SPC-2 */ 1490 case 0x84: /* Receive Copy Results SPC-2 */ 1491 case 0xa0: /* Report LUNs SPC-2 */ 1492 case 0xa3: /* Various Report requests SBC-2/SCC-2*/ 1493 case 0xa4: /* Report Key MMC-2 */ 1494 case 0xad: /* Read DVD Structure MMC-2 */ 1495 case 0xb4: /* Read Element Status (Attached) SMC */ 1496 case 0xb5: /* Request Volume Element Address SMC */ 1497 case 0xb7: /* Read Defect Data (12 byte ver.) SBC */ 1498 case 0xb8: /* Read Element Status (Independ.) SMC */ 1499 case 0xba: /* Report Redundancy SCC-2 */ 1500 case 0xbd: /* Mechanism Status MMC */ 1501 case 0xbe: /* Report Basic Redundancy SCC-2 */ 1502 1503 return (HOST_OK); 1504 break; 1505 1506 default: 1507 return (HOST_DO_DU); 1508 break; 1509 } 1510 } 1511 1512 /* 1513 * iha_next_state - prcess the current SCB as requested in it's 1514 * nextstat member. 1515 */ 1516 static int 1517 iha_next_state(sc) 1518 struct iha_softc *sc; 1519 { 1520 1521 if (sc->sc_actscb == NULL) 1522 return (-1); 1523 1524 switch (sc->sc_actscb->nextstat) { 1525 case 1: 1526 if (iha_state_1(sc) == 3) 1527 goto state_3; 1528 break; 1529 1530 case 2: 1531 switch (iha_state_2(sc)) { 1532 case 3: 1533 goto state_3; 1534 case 4: 1535 goto state_4; 1536 default: 1537 break; 1538 } 1539 break; 1540 1541 case 3: 1542 state_3: 1543 if (iha_state_3(sc) == 4) 1544 goto state_4; 1545 break; 1546 1547 case 4: 1548 state_4: 1549 switch (iha_state_4(sc)) { 1550 case 0: 1551 return (0); 1552 case 6: 1553 goto state_6; 1554 default: 1555 break; 1556 } 1557 break; 1558 1559 case 5: 1560 switch (iha_state_5(sc)) { 1561 case 4: 1562 goto state_4; 1563 case 6: 1564 goto state_6; 1565 default: 1566 break; 1567 } 1568 break; 1569 1570 case 6: 1571 state_6: 1572 iha_state_6(sc); 1573 break; 1574 1575 case 8: 1576 iha_state_8(sc); 1577 break; 1578 1579 default: 1580 #ifdef IHA_DEBUG_STATE 1581 printf("[debug] -unknown state: %i-\n", 1582 sc->sc_actscb->nextstat); 1583 #endif 1584 iha_bad_seq(sc); 1585 break; 1586 } 1587 1588 return (-1); 1589 } 1590 1591 /* 1592 * iha_state_1 - selection is complete after a SELATNSTOP. If the target 1593 * has put the bus into MSG_OUT phase start wide/sync 1594 * negotiation. Otherwise clear the FIFO and go to state 3, 1595 * which will send the SCSI CDB to the target. 1596 */ 1597 static int 1598 iha_state_1(sc) 1599 struct iha_softc *sc; 1600 { 1601 bus_space_tag_t iot = sc->sc_iot; 1602 bus_space_handle_t ioh = sc->sc_ioh; 1603 struct iha_scb *scb = sc->sc_actscb; 1604 struct tcs *tcs; 1605 int flags; 1606 1607 iha_mark_busy_scb(scb); 1608 1609 tcs = scb->tcs; 1610 1611 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 1612 1613 /* 1614 * If we are in PHASE_MSG_OUT, send 1615 * a) IDENT message (with tags if appropriate) 1616 * b) WDTR if the target is configured to negotiate wide xfers 1617 * ** OR ** 1618 * c) SDTR if the target is configured to negotiate sync xfers 1619 * but not wide ones 1620 * 1621 * If we are NOT, then the target is not asking for anything but 1622 * the data/command, so go straight to state 3. 1623 */ 1624 if (sc->sc_phase == PHASE_MSG_OUT) { 1625 bus_space_write_1(iot, ioh, TUL_SCTRL1, (ESBUSIN | EHRSL)); 1626 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 1627 1628 if (scb->scb_tagmsg != 0) { 1629 bus_space_write_1(iot, ioh, TUL_SFIFO, 1630 scb->scb_tagmsg); 1631 bus_space_write_1(iot, ioh, TUL_SFIFO, 1632 scb->scb_tagid); 1633 } 1634 1635 flags = tcs->flags; 1636 if ((flags & FLAG_NO_NEG_WIDE) == 0) { 1637 if (iha_msgout_wdtr(sc) == -1) 1638 return (-1); 1639 } else if ((flags & FLAG_NO_NEG_SYNC) == 0) { 1640 if (iha_msgout_sdtr(sc) == -1) 1641 return (-1); 1642 } 1643 1644 } else { 1645 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1646 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 1647 } 1648 1649 return (3); 1650 } 1651 1652 /* 1653 * iha_state_2 - selection is complete after a SEL_ATN or SEL_ATN3. If the SCSI 1654 * CDB has already been send, go to state 4 to start the data 1655 * xfer. Otherwise reset the FIFO and go to state 3, sending 1656 * the SCSI CDB. 1657 */ 1658 static int 1659 iha_state_2(sc) 1660 struct iha_softc *sc; 1661 { 1662 bus_space_tag_t iot = sc->sc_iot; 1663 bus_space_handle_t ioh = sc->sc_ioh; 1664 struct iha_scb *scb = sc->sc_actscb; 1665 1666 iha_mark_busy_scb(scb); 1667 1668 bus_space_write_1(iot, ioh, TUL_SCONFIG0, scb->tcs->sconfig0); 1669 1670 if ((sc->sc_status1 & CPDNE) != 0) 1671 return (4); 1672 1673 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1674 1675 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 1676 1677 return (3); 1678 } 1679 1680 /* 1681 * iha_state_3 - send the SCSI CDB to the target, processing any status 1682 * or other messages received until that is done or 1683 * abandoned. 1684 */ 1685 static int 1686 iha_state_3(sc) 1687 struct iha_softc *sc; 1688 { 1689 bus_space_tag_t iot = sc->sc_iot; 1690 bus_space_handle_t ioh = sc->sc_ioh; 1691 struct iha_scb *scb = sc->sc_actscb; 1692 int flags; 1693 1694 for (;;) { 1695 switch (sc->sc_phase) { 1696 case PHASE_CMD_OUT: 1697 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 1698 scb->cmd, scb->cmdlen); 1699 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1700 return (-1); 1701 else if (sc->sc_phase == PHASE_CMD_OUT) { 1702 iha_bad_seq(sc); 1703 return (-1); 1704 } else 1705 return (4); 1706 1707 case PHASE_MSG_IN: 1708 scb->nextstat = 3; 1709 if (iha_msgin(sc) == -1) 1710 return (-1); 1711 break; 1712 1713 case PHASE_STATUS_IN: 1714 if (iha_status_msg(sc) == -1) 1715 return (-1); 1716 break; 1717 1718 case PHASE_MSG_OUT: 1719 flags = scb->tcs->flags; 1720 if ((flags & FLAG_NO_NEG_SYNC) != 0) { 1721 if (iha_msgout(sc, MSG_NOOP) == -1) 1722 return (-1); 1723 } else if (iha_msgout_sdtr(sc) == -1) 1724 return (-1); 1725 break; 1726 1727 default: 1728 printf("[debug] -s3- bad phase = %d\n", sc->sc_phase); 1729 iha_bad_seq(sc); 1730 return (-1); 1731 } 1732 } 1733 } 1734 1735 /* 1736 * iha_state_4 - start a data xfer. Handle any bus state 1737 * transitions until PHASE_DATA_IN/_OUT 1738 * or the attempt is abandoned. If there is 1739 * no data to xfer, go to state 6 and finish 1740 * processing the current SCB. 1741 */ 1742 static int 1743 iha_state_4(sc) 1744 struct iha_softc *sc; 1745 { 1746 struct iha_scb *scb = sc->sc_actscb; 1747 1748 if ((scb->flags & (FLAG_DATAIN | FLAG_DATAOUT)) == 1749 (FLAG_DATAIN | FLAG_DATAOUT)) 1750 return (6); /* Both dir flags set => NO xfer was requested */ 1751 1752 for (;;) { 1753 if (scb->buflen == 0) 1754 return (6); 1755 1756 switch (sc->sc_phase) { 1757 case PHASE_STATUS_IN: 1758 if ((scb->flags & (FLAG_DATAIN | FLAG_DATAOUT)) != 0) 1759 scb->ha_stat = iha_data_over_run(scb); 1760 if ((iha_status_msg(sc)) == -1) 1761 return (-1); 1762 break; 1763 1764 case PHASE_MSG_IN: 1765 scb->nextstat = 4; 1766 if (iha_msgin(sc) == -1) 1767 return (-1); 1768 break; 1769 1770 case PHASE_MSG_OUT: 1771 if ((sc->sc_status0 & SPERR) != 0) { 1772 scb->buflen = 0; 1773 scb->ha_stat = HOST_SPERR; 1774 if (iha_msgout(sc, MSG_INITIATOR_DET_ERR) == -1) 1775 return (-1); 1776 else 1777 return (6); 1778 } else { 1779 if (iha_msgout(sc, MSG_NOOP) == -1) 1780 return (-1); 1781 } 1782 break; 1783 1784 case PHASE_DATA_IN: 1785 return (iha_xfer_data(sc, scb, FLAG_DATAIN)); 1786 1787 case PHASE_DATA_OUT: 1788 return (iha_xfer_data(sc, scb, FLAG_DATAOUT)); 1789 1790 default: 1791 iha_bad_seq(sc); 1792 return (-1); 1793 } 1794 } 1795 } 1796 1797 /* 1798 * iha_state_5 - handle the partial or final completion of the current 1799 * data xfer. If DMA is still active stop it. If there is 1800 * more data to xfer, go to state 4 and start the xfer. 1801 * If not go to state 6 and finish the SCB. 1802 */ 1803 static int 1804 iha_state_5(sc) 1805 struct iha_softc *sc; 1806 { 1807 bus_space_tag_t iot = sc->sc_iot; 1808 bus_space_handle_t ioh = sc->sc_ioh; 1809 struct iha_scb *scb = sc->sc_actscb; 1810 struct iha_sg_element *sg; 1811 u_int32_t cnt; 1812 u_int8_t period, stat; 1813 long xcnt; /* cannot use unsigned!! see code: if (xcnt < 0) */ 1814 int i; 1815 1816 cnt = bus_space_read_4(iot, ioh, TUL_STCNT0) & TCNT; 1817 1818 /* 1819 * Stop any pending DMA activity and check for parity error. 1820 */ 1821 1822 if ((bus_space_read_1(iot, ioh, TUL_DCMD) & XDIR) != 0) { 1823 /* Input Operation */ 1824 if ((sc->sc_status0 & SPERR) != 0) 1825 scb->ha_stat = HOST_SPERR; 1826 1827 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1828 bus_space_write_1(iot, ioh, TUL_DCTRL0, 1829 bus_space_read_1(iot, ioh, TUL_DCTRL0) | SXSTP); 1830 while (bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) 1831 ; 1832 } 1833 1834 } else { 1835 /* Output Operation */ 1836 if ((sc->sc_status1 & SXCMP) == 0) { 1837 period = scb->tcs->syncm; 1838 if ((period & PERIOD_WIDE_SCSI) != 0) 1839 cnt += (bus_space_read_1(iot, ioh, 1840 TUL_SFIFOCNT) & FIFOC) * 2; 1841 else 1842 cnt += bus_space_read_1(iot, ioh, 1843 TUL_SFIFOCNT) & FIFOC; 1844 } 1845 1846 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1847 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 1848 do 1849 stat = bus_space_read_1(iot, ioh, TUL_ISTUS0); 1850 while ((stat & DABT) == 0); 1851 } 1852 1853 if ((cnt == 1) && (sc->sc_phase == PHASE_DATA_OUT)) { 1854 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1855 return (-1); 1856 cnt = 0; 1857 1858 } else if ((sc->sc_status1 & SXCMP) == 0) 1859 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1860 } 1861 1862 if (cnt == 0) { 1863 scb->buflen = 0; 1864 return (6); 1865 } 1866 1867 /* Update active data pointer and restart the I/O at the new point */ 1868 1869 xcnt = scb->buflen - cnt; /* xcnt == bytes xferred */ 1870 scb->buflen = cnt; /* cnt == bytes left */ 1871 1872 if ((scb->flags & FLAG_SG) != 0) { 1873 sg = &scb->sglist[scb->sg_index]; 1874 for (i = scb->sg_index; i < scb->sg_max; sg++, i++) { 1875 xcnt -= le32toh(sg->sg_len); 1876 if (xcnt < 0) { 1877 xcnt += le32toh(sg->sg_len); 1878 1879 sg->sg_addr = 1880 htole32(le32toh(sg->sg_addr) + xcnt); 1881 sg->sg_len = 1882 htole32(le32toh(sg->sg_len) - xcnt); 1883 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1884 scb->sgoffset, IHA_SG_SIZE, 1885 BUS_DMASYNC_PREWRITE); 1886 1887 scb->bufaddr += (i - scb->sg_index) * 1888 sizeof(struct iha_sg_element); 1889 scb->sg_size = scb->sg_max - i; 1890 scb->sg_index = i; 1891 1892 return (4); 1893 } 1894 } 1895 return (6); 1896 1897 } else 1898 scb->bufaddr += xcnt; 1899 1900 return (4); 1901 } 1902 1903 /* 1904 * iha_state_6 - finish off the active scb (may require several 1905 * iterations if PHASE_MSG_IN) and return -1 to indicate 1906 * the bus is free. 1907 */ 1908 static int 1909 iha_state_6(sc) 1910 struct iha_softc *sc; 1911 { 1912 1913 for (;;) { 1914 switch (sc->sc_phase) { 1915 case PHASE_STATUS_IN: 1916 if (iha_status_msg(sc) == -1) 1917 return (-1); 1918 break; 1919 1920 case PHASE_MSG_IN: 1921 sc->sc_actscb->nextstat = 6; 1922 if ((iha_msgin(sc)) == -1) 1923 return (-1); 1924 break; 1925 1926 case PHASE_MSG_OUT: 1927 if ((iha_msgout(sc, MSG_NOOP)) == -1) 1928 return (-1); 1929 break; 1930 1931 case PHASE_DATA_IN: 1932 if (iha_xpad_in(sc) == -1) 1933 return (-1); 1934 break; 1935 1936 case PHASE_DATA_OUT: 1937 if (iha_xpad_out(sc) == -1) 1938 return (-1); 1939 break; 1940 1941 default: 1942 iha_bad_seq(sc); 1943 return (-1); 1944 } 1945 } 1946 } 1947 1948 /* 1949 * iha_state_8 - reset the active device and all busy SCBs using it 1950 */ 1951 static int 1952 iha_state_8(sc) 1953 struct iha_softc *sc; 1954 { 1955 bus_space_tag_t iot = sc->sc_iot; 1956 bus_space_handle_t ioh = sc->sc_ioh; 1957 struct iha_scb *scb; 1958 int i; 1959 u_int8_t tar; 1960 1961 if (sc->sc_phase == PHASE_MSG_OUT) { 1962 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_BUS_DEV_RESET); 1963 1964 scb = sc->sc_actscb; 1965 1966 /* This SCB finished correctly -- resetting the device */ 1967 iha_append_done_scb(sc, scb, HOST_OK); 1968 1969 iha_reset_tcs(scb->tcs, sc->sc_sconf1); 1970 1971 tar = scb->target; 1972 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 1973 if (scb->target == tar) 1974 switch (scb->status) { 1975 case STATUS_BUSY: 1976 iha_append_done_scb(sc, 1977 scb, HOST_DEV_RST); 1978 break; 1979 1980 case STATUS_SELECT: 1981 iha_push_pend_scb(sc, scb); 1982 break; 1983 1984 default: 1985 break; 1986 } 1987 1988 sc->sc_flags |= FLAG_EXPECT_DISC; 1989 1990 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1991 return (-1); 1992 } 1993 1994 iha_bad_seq(sc); 1995 return (-1); 1996 } 1997 1998 /* 1999 * iha_xfer_data - initiate the DMA xfer of the data 2000 */ 2001 static int 2002 iha_xfer_data(sc, scb, direction) 2003 struct iha_softc *sc; 2004 struct iha_scb *scb; 2005 int direction; 2006 { 2007 bus_space_tag_t iot = sc->sc_iot; 2008 bus_space_handle_t ioh = sc->sc_ioh; 2009 u_int32_t xferlen; 2010 u_int8_t xfercmd; 2011 2012 if ((scb->flags & (FLAG_DATAIN | FLAG_DATAOUT)) != direction) 2013 return (6); /* wrong direction, abandon I/O */ 2014 2015 bus_space_write_4(iot, ioh, TUL_STCNT0, scb->buflen); 2016 2017 xfercmd = STRXFR; 2018 if (direction == FLAG_DATAIN) 2019 xfercmd |= XDIR; 2020 2021 if (scb->flags & FLAG_SG) { 2022 xferlen = scb->sg_size * sizeof(struct iha_sg_element); 2023 xfercmd |= SGXFR; 2024 } else 2025 xferlen = scb->buflen; 2026 2027 bus_space_write_4(iot, ioh, TUL_DXC, xferlen); 2028 bus_space_write_4(iot, ioh, TUL_DXPA, scb->bufaddr); 2029 bus_space_write_1(iot, ioh, TUL_DCMD, xfercmd); 2030 2031 bus_space_write_1(iot, ioh, TUL_SCMD, 2032 (direction == FLAG_DATAIN) ? XF_DMA_IN : XF_DMA_OUT); 2033 2034 scb->nextstat = 5; 2035 2036 return (0); 2037 } 2038 2039 static int 2040 iha_xpad_in(sc) 2041 struct iha_softc *sc; 2042 { 2043 bus_space_tag_t iot = sc->sc_iot; 2044 bus_space_handle_t ioh = sc->sc_ioh; 2045 struct iha_scb *scb = sc->sc_actscb; 2046 2047 if ((scb->flags & (FLAG_DATAIN | FLAG_DATAOUT)) != 0) 2048 scb->ha_stat = HOST_DO_DU; 2049 2050 for (;;) { 2051 if ((scb->tcs->syncm & PERIOD_WIDE_SCSI) != 0) 2052 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 2053 else 2054 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 2055 2056 switch (iha_wait(sc, XF_FIFO_IN)) { 2057 case -1: 2058 return (-1); 2059 2060 case PHASE_DATA_IN: 2061 bus_space_read_1(iot, ioh, TUL_SFIFO); 2062 break; 2063 2064 default: 2065 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2066 return (6); 2067 } 2068 } 2069 } 2070 2071 static int 2072 iha_xpad_out(sc) 2073 struct iha_softc *sc; 2074 { 2075 bus_space_tag_t iot = sc->sc_iot; 2076 bus_space_handle_t ioh = sc->sc_ioh; 2077 struct iha_scb *scb = sc->sc_actscb; 2078 2079 if ((scb->flags & (FLAG_DATAIN | FLAG_DATAOUT)) != 0) 2080 scb->ha_stat = HOST_DO_DU; 2081 2082 for (;;) { 2083 if ((scb->tcs->syncm & PERIOD_WIDE_SCSI) != 0) 2084 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 2085 else 2086 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 2087 2088 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 2089 2090 switch (iha_wait(sc, XF_FIFO_OUT)) { 2091 case -1: 2092 return (-1); 2093 2094 case PHASE_DATA_OUT: 2095 break; 2096 2097 default: 2098 /* Disable wide CPU to allow read 16 bits */ 2099 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2100 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2101 return (6); 2102 } 2103 } 2104 } 2105 2106 static int 2107 iha_status_msg(sc) 2108 struct iha_softc *sc; 2109 { 2110 bus_space_tag_t iot = sc->sc_iot; 2111 bus_space_handle_t ioh = sc->sc_ioh; 2112 struct iha_scb *scb; 2113 u_int8_t msg; 2114 int phase; 2115 2116 if ((phase = iha_wait(sc, CMD_COMP)) == -1) 2117 return (-1); 2118 2119 scb = sc->sc_actscb; 2120 2121 scb->ta_stat = bus_space_read_1(iot, ioh, TUL_SFIFO); 2122 2123 if (phase == PHASE_MSG_OUT) { 2124 if ((sc->sc_status0 & SPERR) == 0) 2125 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_NOOP); 2126 else 2127 bus_space_write_1(iot, ioh, TUL_SFIFO, 2128 MSG_PARITY_ERROR); 2129 2130 return (iha_wait(sc, XF_FIFO_OUT)); 2131 2132 } else if (phase == PHASE_MSG_IN) { 2133 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 2134 2135 if ((sc->sc_status0 & SPERR) != 0) 2136 switch (iha_wait(sc, MSG_ACCEPT)) { 2137 case -1: 2138 return (-1); 2139 case PHASE_MSG_OUT: 2140 bus_space_write_1(iot, ioh, TUL_SFIFO, 2141 MSG_PARITY_ERROR); 2142 return (iha_wait(sc, XF_FIFO_OUT)); 2143 default: 2144 iha_bad_seq(sc); 2145 return (-1); 2146 } 2147 2148 if (msg == MSG_CMDCOMPLETE) { 2149 if ((scb->ta_stat & 2150 (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) { 2151 iha_bad_seq(sc); 2152 return (-1); 2153 } 2154 sc->sc_flags |= FLAG_EXPECT_DONE_DISC; 2155 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2156 return (iha_wait(sc, MSG_ACCEPT)); 2157 } 2158 2159 if ((msg == MSG_LINK_CMD_COMPLETE) 2160 || (msg == MSG_LINK_CMD_COMPLETEF)) { 2161 if ((scb->ta_stat & 2162 (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) 2163 return (iha_wait(sc, MSG_ACCEPT)); 2164 } 2165 } 2166 2167 iha_bad_seq(sc); 2168 return (-1); 2169 } 2170 2171 /* 2172 * iha_busfree - SCSI bus free detected as a result of a TIMEOUT or 2173 * DISCONNECT interrupt. Reset the tulip FIFO and 2174 * SCONFIG0 and enable hardware reselect. Move any active 2175 * SCB to sc_donescb list. Return an appropriate host status 2176 * if an I/O was active. 2177 */ 2178 static void 2179 iha_busfree(sc) 2180 struct iha_softc *sc; 2181 { 2182 bus_space_tag_t iot = sc->sc_iot; 2183 bus_space_handle_t ioh = sc->sc_ioh; 2184 struct iha_scb *scb; 2185 2186 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2187 bus_space_write_1(iot, ioh, TUL_SCONFIG0, SCONFIG0DEFAULT); 2188 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2189 2190 scb = sc->sc_actscb; 2191 2192 if (scb != NULL) { 2193 if (scb->status == STATUS_SELECT) 2194 /* selection timeout */ 2195 iha_append_done_scb(sc, scb, HOST_SEL_TOUT); 2196 else 2197 /* Unexpected bus free */ 2198 iha_append_done_scb(sc, scb, HOST_BAD_PHAS); 2199 } 2200 } 2201 2202 /* 2203 * iha_resel - handle a detected SCSI bus reselection request. 2204 */ 2205 static int 2206 iha_resel(sc) 2207 struct iha_softc *sc; 2208 { 2209 bus_space_tag_t iot = sc->sc_iot; 2210 bus_space_handle_t ioh = sc->sc_ioh; 2211 struct iha_scb *scb; 2212 struct tcs *tcs; 2213 u_int8_t tag, target, lun, msg, abortmsg; 2214 2215 if (sc->sc_actscb != NULL) { 2216 if ((sc->sc_actscb->status == STATUS_SELECT)) 2217 iha_push_pend_scb(sc, sc->sc_actscb); 2218 sc->sc_actscb = NULL; 2219 } 2220 2221 target = bus_space_read_1(iot, ioh, TUL_SBID); 2222 lun = bus_space_read_1(iot, ioh, TUL_SALVC) & MSG_IDENTIFY_LUNMASK; 2223 2224 tcs = &sc->sc_tcs[target]; 2225 2226 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 2227 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 2228 2229 abortmsg = MSG_ABORT; /* until a valid tag has been obtained */ 2230 2231 if (tcs->ntagscb != NULL) 2232 /* There is a non-tagged I/O active on the target */ 2233 scb = tcs->ntagscb; 2234 2235 else { 2236 /* 2237 * Since there is no active non-tagged operation 2238 * read the tag type, the tag itself, and find 2239 * the appropriate scb by indexing sc_scb with 2240 * the tag. 2241 */ 2242 2243 switch (iha_wait(sc, MSG_ACCEPT)) { 2244 case -1: 2245 return (-1); 2246 case PHASE_MSG_IN: 2247 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 2248 if ((iha_wait(sc, XF_FIFO_IN)) == -1) 2249 return (-1); 2250 break; 2251 default: 2252 goto abort; 2253 } 2254 2255 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag Msg */ 2256 2257 if ((msg < MSG_SIMPLE_Q_TAG) || (msg > MSG_ORDERED_Q_TAG)) 2258 goto abort; 2259 2260 switch (iha_wait(sc, MSG_ACCEPT)) { 2261 case -1: 2262 return (-1); 2263 case PHASE_MSG_IN: 2264 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 2265 if ((iha_wait(sc, XF_FIFO_IN)) == -1) 2266 return (-1); 2267 break; 2268 default: 2269 goto abort; 2270 } 2271 2272 tag = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag ID */ 2273 scb = &sc->sc_scb[tag]; 2274 2275 abortmsg = MSG_ABORT_TAG; /* Now that we have valdid tag! */ 2276 } 2277 2278 if ((scb->target != target) 2279 || (scb->lun != lun) 2280 || (scb->status != STATUS_BUSY)) { 2281 abort: 2282 iha_msgout_abort(sc, abortmsg); 2283 return (-1); 2284 } 2285 2286 sc->sc_actscb = scb; 2287 2288 if (iha_wait(sc, MSG_ACCEPT) == -1) 2289 return (-1); 2290 2291 return (iha_next_state(sc)); 2292 } 2293 2294 static int 2295 iha_msgin(sc) 2296 struct iha_softc *sc; 2297 { 2298 bus_space_tag_t iot = sc->sc_iot; 2299 bus_space_handle_t ioh = sc->sc_ioh; 2300 int flags; 2301 int phase; 2302 u_int8_t msg; 2303 2304 for (;;) { 2305 if ((bus_space_read_1(iot, ioh, TUL_SFIFOCNT) & FIFOC) > 0) 2306 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2307 2308 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 2309 2310 phase = iha_wait(sc, XF_FIFO_IN); 2311 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 2312 2313 switch (msg) { 2314 case MSG_DISCONNECT: 2315 sc->sc_flags |= FLAG_EXPECT_DISC; 2316 if (iha_wait(sc, MSG_ACCEPT) != -1) 2317 iha_bad_seq(sc); 2318 phase = -1; 2319 break; 2320 case MSG_SAVEDATAPOINTER: 2321 case MSG_RESTOREPOINTERS: 2322 case MSG_NOOP: 2323 phase = iha_wait(sc, MSG_ACCEPT); 2324 break; 2325 case MSG_MESSAGE_REJECT: 2326 /* XXX - need to clear FIFO like other 'Clear ATN'?*/ 2327 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 2328 flags = sc->sc_actscb->tcs->flags; 2329 if ((flags & FLAG_NO_NEG_SYNC) == 0) 2330 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2331 phase = iha_wait(sc, MSG_ACCEPT); 2332 break; 2333 case MSG_EXTENDED: 2334 phase = iha_msgin_extended(sc); 2335 break; 2336 case MSG_IGN_WIDE_RESIDUE: 2337 phase = iha_msgin_ignore_wid_resid(sc); 2338 break; 2339 case MSG_CMDCOMPLETE: 2340 sc->sc_flags |= FLAG_EXPECT_DONE_DISC; 2341 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2342 phase = iha_wait(sc, MSG_ACCEPT); 2343 if (phase != -1) { 2344 iha_bad_seq(sc); 2345 return (-1); 2346 } 2347 break; 2348 default: 2349 printf("[debug] iha_msgin: bad msg type: %d\n", msg); 2350 phase = iha_msgout_reject(sc); 2351 break; 2352 } 2353 2354 if (phase != PHASE_MSG_IN) 2355 return (phase); 2356 } 2357 /* NOTREACHED */ 2358 } 2359 2360 static int 2361 iha_msgin_extended(sc) 2362 struct iha_softc *sc; 2363 { 2364 bus_space_tag_t iot = sc->sc_iot; 2365 bus_space_handle_t ioh = sc->sc_ioh; 2366 int flags, i, phase, msglen, msgcode; 2367 2368 /* 2369 * XXX - can we just stop reading and reject, or do we have to 2370 * read all input, discarding the excess, and then reject 2371 */ 2372 for (i = 0; i < IHA_MAX_EXTENDED_MSG; i++) { 2373 phase = iha_wait(sc, MSG_ACCEPT); 2374 2375 if (phase != PHASE_MSG_IN) 2376 return (phase); 2377 2378 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 2379 2380 if (iha_wait(sc, XF_FIFO_IN) == -1) 2381 return (-1); 2382 2383 sc->sc_msg[i] = bus_space_read_1(iot, ioh, TUL_SFIFO); 2384 2385 if (sc->sc_msg[0] == i) 2386 break; 2387 } 2388 2389 msglen = sc->sc_msg[0]; 2390 msgcode = sc->sc_msg[1]; 2391 2392 if ((msglen == MSG_EXT_SDTR_LEN) && (msgcode == MSG_EXT_SDTR)) { 2393 if (iha_msgin_sdtr(sc) == 0) { 2394 iha_sync_done(sc); 2395 return (iha_wait(sc, MSG_ACCEPT)); 2396 } 2397 2398 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2399 2400 phase = iha_wait(sc, MSG_ACCEPT); 2401 if (phase != PHASE_MSG_OUT) 2402 return (phase); 2403 2404 /* Clear FIFO for important message - final SYNC offer */ 2405 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2406 2407 iha_sync_done(sc); /* This is our final offer */ 2408 2409 } else if ((msglen == MSG_EXT_WDTR_LEN) && (msgcode == MSG_EXT_WDTR)) { 2410 2411 flags = sc->sc_actscb->tcs->flags; 2412 2413 if ((flags & FLAG_NO_WIDE) != 0) 2414 /* Offer 8bit xfers only */ 2415 sc->sc_msg[2] = MSG_EXT_WDTR_BUS_8_BIT; 2416 2417 else if (sc->sc_msg[2] > MSG_EXT_WDTR_BUS_32_BIT) 2418 /* BAD MSG */ 2419 return (iha_msgout_reject(sc)); 2420 2421 else if (sc->sc_msg[2] == MSG_EXT_WDTR_BUS_32_BIT) 2422 /* Offer 16bit instead */ 2423 sc->sc_msg[2] = MSG_EXT_WDTR_BUS_16_BIT; 2424 2425 else { 2426 iha_wide_done(sc); 2427 if ((flags & FLAG_NO_NEG_SYNC) == 0) 2428 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2429 return (iha_wait(sc, MSG_ACCEPT)); 2430 } 2431 2432 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2433 2434 phase = iha_wait(sc, MSG_ACCEPT); 2435 if (phase != PHASE_MSG_OUT) 2436 return (phase); 2437 } else 2438 return (iha_msgout_reject(sc)); 2439 2440 return (iha_msgout_extended(sc)); 2441 } 2442 2443 /* 2444 * iha_msgin_sdtr - check SDTR msg in sc_msg. If the offer is 2445 * acceptable leave sc_msg as is and return 0. 2446 * If the negotiation must continue, modify sc_msg 2447 * as needed and return 1. Else return 0. 2448 */ 2449 static int 2450 iha_msgin_sdtr(sc) 2451 struct iha_softc *sc; 2452 { 2453 int flags; 2454 int newoffer; 2455 u_int8_t default_period; 2456 2457 flags = sc->sc_actscb->tcs->flags; 2458 2459 default_period = iha_rate_tbl[flags & FLAG_SCSI_RATE]; 2460 2461 if (sc->sc_msg[3] == 0) 2462 /* target offered async only. Accept it. */ 2463 return (0); 2464 2465 newoffer = 0; 2466 2467 if ((flags & FLAG_NO_SYNC) != 0) { 2468 sc->sc_msg[3] = 0; 2469 newoffer = 1; 2470 } 2471 2472 if (sc->sc_msg[3] > IHA_MAX_OFFSET) { 2473 sc->sc_msg[3] = IHA_MAX_OFFSET; 2474 newoffer = 1; 2475 } 2476 2477 if (sc->sc_msg[2] < default_period) { 2478 sc->sc_msg[2] = default_period; 2479 newoffer = 1; 2480 } 2481 2482 if (sc->sc_msg[2] > IHA_MAX_PERIOD) { 2483 /* Use async */ 2484 sc->sc_msg[3] = 0; 2485 newoffer = 1; 2486 } 2487 2488 return (newoffer); 2489 } 2490 2491 static int 2492 iha_msgin_ignore_wid_resid(sc) 2493 struct iha_softc *sc; 2494 { 2495 bus_space_tag_t iot = sc->sc_iot; 2496 bus_space_handle_t ioh = sc->sc_ioh; 2497 int phase; 2498 2499 phase = iha_wait(sc, MSG_ACCEPT); 2500 2501 if (phase == PHASE_MSG_IN) { 2502 phase = iha_wait(sc, XF_FIFO_IN); 2503 2504 if (phase != -1) { 2505 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 2506 bus_space_read_1(iot, ioh, TUL_SFIFO); 2507 bus_space_read_1(iot, ioh, TUL_SFIFO); 2508 2509 phase = iha_wait(sc, MSG_ACCEPT); 2510 } 2511 } 2512 2513 return (phase); 2514 } 2515 2516 static int 2517 iha_msgout(sc, msg) 2518 struct iha_softc *sc; 2519 u_int8_t msg; 2520 { 2521 2522 bus_space_write_1(sc->sc_iot, sc->sc_ioh, TUL_SFIFO, msg); 2523 2524 return (iha_wait(sc, XF_FIFO_OUT)); 2525 } 2526 2527 static void 2528 iha_msgout_abort(sc, aborttype) 2529 struct iha_softc *sc; 2530 u_int8_t aborttype; 2531 { 2532 2533 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2534 2535 switch (iha_wait(sc, MSG_ACCEPT)) { 2536 case -1: 2537 break; 2538 2539 case PHASE_MSG_OUT: 2540 sc->sc_flags |= FLAG_EXPECT_DISC; 2541 if (iha_msgout(sc, aborttype) != -1) 2542 iha_bad_seq(sc); 2543 break; 2544 2545 default: 2546 iha_bad_seq(sc); 2547 break; 2548 } 2549 } 2550 2551 static int 2552 iha_msgout_reject(sc) 2553 struct iha_softc *sc; 2554 { 2555 2556 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2557 2558 if (iha_wait(sc, MSG_ACCEPT) == PHASE_MSG_OUT) 2559 return (iha_msgout(sc, MSG_MESSAGE_REJECT)); 2560 2561 return (-1); 2562 } 2563 2564 static int 2565 iha_msgout_extended(sc) 2566 struct iha_softc *sc; 2567 { 2568 bus_space_tag_t iot = sc->sc_iot; 2569 bus_space_handle_t ioh = sc->sc_ioh; 2570 int phase; 2571 2572 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_EXTENDED); 2573 2574 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 2575 sc->sc_msg, sc->sc_msg[0] + 1); 2576 2577 phase = iha_wait(sc, XF_FIFO_OUT); 2578 2579 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2580 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 2581 2582 return (phase); 2583 } 2584 2585 static int 2586 iha_msgout_wdtr(sc) 2587 struct iha_softc *sc; 2588 { 2589 2590 sc->sc_actscb->tcs->flags |= FLAG_WIDE_DONE; 2591 2592 sc->sc_msg[0] = MSG_EXT_WDTR_LEN; 2593 sc->sc_msg[1] = MSG_EXT_WDTR; 2594 sc->sc_msg[2] = MSG_EXT_WDTR_BUS_16_BIT; 2595 2596 return (iha_msgout_extended(sc)); 2597 } 2598 2599 static int 2600 iha_msgout_sdtr(sc) 2601 struct iha_softc *sc; 2602 { 2603 struct tcs *tcs = sc->sc_actscb->tcs; 2604 2605 tcs->flags |= FLAG_SYNC_DONE; 2606 2607 sc->sc_msg[0] = MSG_EXT_SDTR_LEN; 2608 sc->sc_msg[1] = MSG_EXT_SDTR; 2609 sc->sc_msg[2] = iha_rate_tbl[tcs->flags & FLAG_SCSI_RATE]; 2610 sc->sc_msg[3] = IHA_MAX_OFFSET; /* REQ/ACK */ 2611 2612 return (iha_msgout_extended(sc)); 2613 } 2614 2615 static void 2616 iha_wide_done(sc) 2617 struct iha_softc *sc; 2618 { 2619 bus_space_tag_t iot = sc->sc_iot; 2620 bus_space_handle_t ioh = sc->sc_ioh; 2621 struct tcs *tcs = sc->sc_actscb->tcs; 2622 2623 tcs->syncm = 0; 2624 tcs->period = 0; 2625 tcs->offset = 0; 2626 2627 if (sc->sc_msg[2] != 0) 2628 tcs->syncm |= PERIOD_WIDE_SCSI; 2629 2630 tcs->sconfig0 &= ~ALTPD; 2631 tcs->flags &= ~FLAG_SYNC_DONE; 2632 tcs->flags |= FLAG_WIDE_DONE; 2633 2634 iha_update_xfer_mode(sc, sc->sc_actscb->target); 2635 2636 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 2637 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 2638 } 2639 2640 static void 2641 iha_sync_done(sc) 2642 struct iha_softc *sc; 2643 { 2644 bus_space_tag_t iot = sc->sc_iot; 2645 bus_space_handle_t ioh = sc->sc_ioh; 2646 struct tcs *tcs = sc->sc_actscb->tcs; 2647 int i; 2648 2649 tcs->period = sc->sc_msg[2]; 2650 tcs->offset = sc->sc_msg[3]; 2651 if (tcs->offset != 0) { 2652 tcs->syncm |= tcs->offset; 2653 2654 /* pick the highest possible rate */ 2655 for (i = 0; i < sizeof(iha_rate_tbl); i++) 2656 if (iha_rate_tbl[i] >= tcs->period) 2657 break; 2658 2659 tcs->syncm |= (i << 4); 2660 tcs->sconfig0 |= ALTPD; 2661 } 2662 2663 tcs->flags |= FLAG_SYNC_DONE; 2664 2665 iha_update_xfer_mode(sc, sc->sc_actscb->target); 2666 2667 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 2668 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 2669 } 2670 2671 /* 2672 * iha_bad_seq - a SCSI bus phase was encountered out of the 2673 * correct/expected sequence. Reset the SCSI bus. 2674 */ 2675 static void 2676 iha_bad_seq(sc) 2677 struct iha_softc *sc; 2678 { 2679 struct iha_scb *scb = sc->sc_actscb; 2680 2681 if (scb != NULL) 2682 iha_append_done_scb(sc, scb, HOST_BAD_PHAS); 2683 2684 iha_reset_scsi_bus(sc); 2685 iha_reset_chip(sc); 2686 } 2687 2688 /* 2689 * iha_read_eeprom - read Serial EEPROM value & set to defaults 2690 * if required. XXX - Writing does NOT work! 2691 */ 2692 static void 2693 iha_read_eeprom(sc, eeprom) 2694 struct iha_softc *sc; 2695 struct iha_eeprom *eeprom; 2696 { 2697 bus_space_tag_t iot = sc->sc_iot; 2698 bus_space_handle_t ioh = sc->sc_ioh; 2699 u_int16_t *buf = (u_int16_t *)eeprom; 2700 u_int8_t gctrl; 2701 2702 /* Enable EEProm programming */ 2703 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) | EEPRG; 2704 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2705 2706 /* Read EEProm */ 2707 if (iha_se2_rd_all(sc, buf) == 0) 2708 panic("%s: cannot read EEPROM\n", sc->sc_dev.dv_xname); 2709 2710 /* Disable EEProm programming */ 2711 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) & ~EEPRG; 2712 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2713 } 2714 2715 #ifdef notused 2716 /* 2717 * iha_se2_update_all - Update SCSI H/A configuration parameters from 2718 * serial EEPROM Setup default pattern. Only 2719 * change those values different from the values 2720 * in iha_eeprom. 2721 */ 2722 static void 2723 iha_se2_update_all(sc) 2724 struct iha_softc *sc; 2725 { 2726 bus_space_tag_t iot = sc->sc_iot; 2727 bus_space_handle_t ioh = sc->sc_ioh; 2728 u_int16_t *np; 2729 u_int32_t chksum; 2730 int i; 2731 2732 /* Enable erase/write state of EEPROM */ 2733 iha_se2_instr(sc, ENABLE_ERASE); 2734 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2735 EEP_WAIT(); 2736 2737 np = (u_int16_t *)&eeprom_default; 2738 2739 for (i = 0, chksum = 0; i < EEPROM_SIZE - 1; i++) { 2740 iha_se2_wr(sc, i, *np); 2741 chksum += *np++; 2742 } 2743 2744 chksum &= 0x0000ffff; 2745 iha_se2_wr(sc, 31, chksum); 2746 2747 /* Disable erase/write state of EEPROM */ 2748 iha_se2_instr(sc, 0); 2749 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2750 EEP_WAIT(); 2751 } 2752 2753 /* 2754 * iha_se2_wr - write the given 16 bit value into the Serial EEPROM 2755 * at the specified offset 2756 */ 2757 static void 2758 iha_se2_wr(sc, addr, writeword) 2759 struct iha_softc *sc; 2760 int addr; 2761 u_int16_t writeword; 2762 { 2763 bus_space_tag_t iot = sc->sc_iot; 2764 bus_space_handle_t ioh = sc->sc_ioh; 2765 int i, bit; 2766 2767 /* send 'WRITE' Instruction == address | WRITE bit */ 2768 iha_se2_instr(sc, addr | WRITE); 2769 2770 for (i = 16; i > 0; i--) { 2771 if (writeword & (1 << (i - 1))) 2772 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRDO); 2773 else 2774 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2775 EEP_WAIT(); 2776 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2777 EEP_WAIT(); 2778 } 2779 2780 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2781 EEP_WAIT(); 2782 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2783 EEP_WAIT(); 2784 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2785 EEP_WAIT(); 2786 2787 for (;;) { 2788 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2789 EEP_WAIT(); 2790 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2791 EEP_WAIT(); 2792 bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI; 2793 EEP_WAIT(); 2794 if (bit != 0) 2795 break; /* write complete */ 2796 } 2797 2798 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2799 } 2800 #endif 2801 2802 /* 2803 * iha_se2_rd - read & return the 16 bit value at the specified 2804 * offset in the Serial E2PROM 2805 * 2806 */ 2807 static u_int16_t 2808 iha_se2_rd(sc, addr) 2809 struct iha_softc *sc; 2810 int addr; 2811 { 2812 bus_space_tag_t iot = sc->sc_iot; 2813 bus_space_handle_t ioh = sc->sc_ioh; 2814 int i, bit; 2815 u_int16_t readword; 2816 2817 /* Send 'READ' instruction == address | READ bit */ 2818 iha_se2_instr(sc, addr | READ); 2819 2820 readword = 0; 2821 for (i = 16; i > 0; i--) { 2822 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2823 EEP_WAIT(); 2824 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2825 EEP_WAIT(); 2826 /* sample data after the following edge of clock */ 2827 bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI ? 1 : 0; 2828 EEP_WAIT(); 2829 2830 readword |= bit << (i - 1); 2831 } 2832 2833 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2834 2835 return (readword); 2836 } 2837 2838 /* 2839 * iha_se2_rd_all - Read SCSI H/A config parameters from serial EEPROM 2840 */ 2841 static int 2842 iha_se2_rd_all(sc, buf) 2843 struct iha_softc *sc; 2844 u_int16_t *buf; 2845 { 2846 struct iha_eeprom *eeprom = (struct iha_eeprom *)buf; 2847 u_int32_t chksum; 2848 int i; 2849 2850 for (i = 0, chksum = 0; i < EEPROM_SIZE - 1; i++) { 2851 *buf = iha_se2_rd(sc, i); 2852 chksum += *buf++; 2853 } 2854 *buf = iha_se2_rd(sc, 31); /* read checksum from EEPROM */ 2855 2856 chksum &= 0x0000ffff; /* lower 16 bits */ 2857 2858 return (eeprom->signature == EEP_SIGNATURE) && 2859 (eeprom->checksum == chksum); 2860 } 2861 2862 /* 2863 * iha_se2_instr - write an octet to serial E2PROM one bit at a time 2864 */ 2865 static void 2866 iha_se2_instr(sc, instr) 2867 struct iha_softc *sc; 2868 int instr; 2869 { 2870 bus_space_tag_t iot = sc->sc_iot; 2871 bus_space_handle_t ioh = sc->sc_ioh; 2872 int b, i; 2873 2874 b = NVRCS | NVRDO; /* Write the start bit (== 1) */ 2875 2876 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2877 EEP_WAIT(); 2878 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2879 EEP_WAIT(); 2880 2881 for (i = 8; i > 0; i--) { 2882 if (instr & (1 << (i - 1))) 2883 b = NVRCS | NVRDO; /* Write a 1 bit */ 2884 else 2885 b = NVRCS; /* Write a 0 bit */ 2886 2887 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2888 EEP_WAIT(); 2889 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2890 EEP_WAIT(); 2891 } 2892 2893 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2894 } 2895