xref: /netbsd/sys/dev/ic/mb86960.c (revision c4a72b64)
1 /*	$NetBSD: mb86960.c,v 1.54 2002/11/30 14:15:10 tsutsui Exp $	*/
2 
3 /*
4  * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
5  *
6  * This software may be used, modified, copied, distributed, and sold, in
7  * both source and binary form provided that the above copyright, these
8  * terms and the following disclaimer are retained.  The name of the author
9  * and/or the contributor may not be used to endorse or promote products
10  * derived from this software without specific prior written permission.
11  *
12  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
13  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
14  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
15  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
16  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
17  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
18  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION.
19  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
20  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
21  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
22  * SUCH DAMAGE.
23  */
24 
25 /*
26  * Portions copyright (C) 1993, David Greenman.  This software may be used,
27  * modified, copied, distributed, and sold, in both source and binary form
28  * provided that the above copyright and these terms are retained.  Under no
29  * circumstances is the author responsible for the proper functioning of this
30  * software, nor does the author assume any responsibility for damages
31  * incurred with its use.
32  */
33 
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: mb86960.c,v 1.54 2002/11/30 14:15:10 tsutsui Exp $");
36 
37 /*
38  * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards.
39  * Contributed by M.S. <seki@sysrap.cs.fujitsu.co.jp>
40  *
41  * This version is intended to be a generic template for various
42  * MB86960A/MB86965A based Ethernet cards.  It currently supports
43  * Fujitsu FMV-180 series (i.e., FMV-181 and FMV-182) and Allied-
44  * Telesis AT1700 series and RE2000 series.  There are some
45  * unnecessary hooks embedded, which are primarily intended to support
46  * other types of Ethernet cards, but the author is not sure whether
47  * they are useful.
48  */
49 
50 #include "opt_inet.h"
51 #include "opt_ns.h"
52 #include "bpfilter.h"
53 #include "rnd.h"
54 
55 #include <sys/param.h>
56 #include <sys/systm.h>
57 #include <sys/errno.h>
58 #include <sys/ioctl.h>
59 #include <sys/mbuf.h>
60 #include <sys/socket.h>
61 #include <sys/syslog.h>
62 #include <sys/device.h>
63 #if NRND > 0
64 #include <sys/rnd.h>
65 #endif
66 
67 #include <net/if.h>
68 #include <net/if_dl.h>
69 #include <net/if_types.h>
70 #include <net/if_media.h>
71 #include <net/if_ether.h>
72 
73 #ifdef INET
74 #include <netinet/in.h>
75 #include <netinet/in_systm.h>
76 #include <netinet/in_var.h>
77 #include <netinet/ip.h>
78 #include <netinet/if_inarp.h>
79 #endif
80 
81 #ifdef NS
82 #include <netns/ns.h>
83 #include <netns/ns_if.h>
84 #endif
85 
86 #if NBPFILTER > 0
87 #include <net/bpf.h>
88 #include <net/bpfdesc.h>
89 #endif
90 
91 #include <machine/bus.h>
92 
93 #include <dev/ic/mb86960reg.h>
94 #include <dev/ic/mb86960var.h>
95 
96 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
97 #define bus_space_write_stream_2	bus_space_write_2
98 #define bus_space_write_multi_stream_2	bus_space_write_multi_2
99 #define bus_space_read_multi_stream_2	bus_space_read_multi_2
100 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
101 
102 /* Standard driver entry points.  These can be static. */
103 void	mb86960_init	__P((struct mb86960_softc *));
104 int	mb86960_ioctl	__P((struct ifnet *, u_long, caddr_t));
105 void	mb86960_start	__P((struct ifnet *));
106 void	mb86960_reset	__P((struct mb86960_softc *));
107 void	mb86960_watchdog __P((struct ifnet *));
108 
109 /* Local functions.  Order of declaration is confused.  FIXME. */
110 int	mb86960_get_packet __P((struct mb86960_softc *, u_int));
111 void	mb86960_stop __P((struct mb86960_softc *));
112 void	mb86960_tint __P((struct mb86960_softc *, u_int8_t));
113 void	mb86960_rint __P((struct mb86960_softc *, u_int8_t));
114 static __inline__
115 void	mb86960_xmit __P((struct mb86960_softc *));
116 void	mb86960_write_mbufs __P((struct mb86960_softc *, struct mbuf *));
117 static __inline__
118 void	mb86960_droppacket __P((struct mb86960_softc *));
119 void	mb86960_getmcaf __P((struct ethercom *, u_int8_t *));
120 void	mb86960_setmode __P((struct mb86960_softc *));
121 void	mb86960_loadmar __P((struct mb86960_softc *));
122 
123 int	mb86960_mediachange __P((struct ifnet *));
124 void	mb86960_mediastatus __P((struct ifnet *, struct ifmediareq *));
125 
126 #if FE_DEBUG >= 1
127 void	mb86960_dump __P((int, struct mb86960_softc *));
128 #endif
129 
130 void
131 mb86960_attach(sc, myea)
132 	struct mb86960_softc *sc;
133 	u_int8_t *myea;
134 {
135 	bus_space_tag_t bst = sc->sc_bst;
136 	bus_space_handle_t bsh = sc->sc_bsh;
137 
138 	/* Register values which depend on board design. */
139 	sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL;
140 	sc->proto_dlcr5 = 0;
141 	sc->proto_dlcr7 = FE_D7_BYTSWP_LH;
142 	if ((sc->sc_flags & FE_FLAGS_MB86960) != 0)
143 		sc->proto_dlcr7 |= FE_D7_ED_TEST; /* XXX */
144 	sc->proto_bmpr13 = FE_B13_TPTYPE_UTP | FE_B13_PORT_AUTO;
145 
146 	/*
147 	 * Program the 86960 as following defaults:
148 	 *	SRAM: 32KB, 100ns, byte-wide access.
149 	 *	Transmission buffer: 4KB x 2.
150 	 *	System bus interface: 16 bits.
151 	 * These values except TXBSIZE should be modified as per
152 	 * sc_flags which is set in MD attachments, because they
153 	 * are hard-wired on the board. Modifying TXBSIZE will affect
154 	 * the driver performance.
155 	 */
156 	sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB |
157 	    FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns;
158 	if (sc->sc_flags & FE_FLAGS_SBW_BYTE)
159 		sc->proto_dlcr6 &= ~FE_D6_SBW_WORD;
160 
161 	/*
162 	 * Minimum initialization of the hardware.
163 	 * We write into registers; hope I/O ports have no
164 	 * overlap with other boards.
165 	 */
166 
167 	/* Initialize 86960. */
168 	bus_space_write_1(bst, bsh, FE_DLCR6,
169 	    sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
170 	delay(200);
171 
172 #ifdef DIAGNOSTIC
173 	if (myea == NULL) {
174 		printf("%s: ethernet address shouldn't be NULL\n",
175 		    sc->sc_dev.dv_xname);
176 		panic("NULL ethernet address");
177 	}
178 #endif
179 	memcpy(sc->sc_enaddr, myea, sizeof(sc->sc_enaddr));
180 
181 	/* Disable all interrupts. */
182 	bus_space_write_1(bst, bsh, FE_DLCR2, 0);
183 	bus_space_write_1(bst, bsh, FE_DLCR3, 0);
184 }
185 
186 /*
187  * Install interface into kernel networking data structures
188  */
189 void
190 mb86960_config(sc, media, nmedia, defmedia)
191 	struct mb86960_softc *sc;
192 	int *media, nmedia, defmedia;
193 {
194 	struct cfdata *cf = sc->sc_dev.dv_cfdata;
195 	struct ifnet *ifp = &sc->sc_ec.ec_if;
196 	int i;
197 
198 	/* Stop the 86960. */
199 	mb86960_stop(sc);
200 
201 	/* Initialize ifnet structure. */
202 	strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
203 	ifp->if_softc = sc;
204 	ifp->if_start = mb86960_start;
205 	ifp->if_ioctl = mb86960_ioctl;
206 	ifp->if_watchdog = mb86960_watchdog;
207 	ifp->if_flags =
208 	    IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
209 	IFQ_SET_READY(&ifp->if_snd);
210 
211 #if FE_DEBUG >= 3
212 	log(LOG_INFO, "%s: mb86960_config()\n", sc->sc_dev.dv_xname);
213 	mb86960_dump(LOG_INFO, sc);
214 #endif
215 
216 #if FE_SINGLE_TRANSMISSION
217 	/* Override txb config to allocate minimum. */
218 	sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
219 	sc->proto_dlcr6 |=  FE_D6_TXBSIZ_2x2KB;
220 #endif
221 
222 	/* Modify hardware config if it is requested. */
223 	if ((cf->cf_flags & FE_FLAGS_OVERRIDE_DLCR6) != 0)
224 		sc->proto_dlcr6 = cf->cf_flags & FE_FLAGS_DLCR6_VALUE;
225 
226 	/* Find TX buffer size, based on the hardware dependent proto. */
227 	switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
228 	case FE_D6_TXBSIZ_2x2KB:
229 		sc->txb_size = 2048;
230 		break;
231 	case FE_D6_TXBSIZ_2x4KB:
232 		sc->txb_size = 4096;
233 		break;
234 	case FE_D6_TXBSIZ_2x8KB:
235 		sc->txb_size = 8192;
236 		break;
237 	default:
238 		/* Oops, we can't work with single buffer configuration. */
239 #if FE_DEBUG >= 2
240 		log(LOG_WARNING, "%s: strange TXBSIZ config; fixing\n",
241 		    sc->sc_dev.dv_xname);
242 #endif
243 		sc->proto_dlcr6 &= ~FE_D6_TXBSIZ;
244 		sc->proto_dlcr6 |=  FE_D6_TXBSIZ_2x2KB;
245 		sc->txb_size = 2048;
246 		break;
247 	}
248 
249 	/* Initialize media goo. */
250 	ifmedia_init(&sc->sc_media, 0, mb86960_mediachange,
251 	    mb86960_mediastatus);
252 	if (media != NULL) {
253 		for (i = 0; i < nmedia; i++)
254 			ifmedia_add(&sc->sc_media, media[i], 0, NULL);
255 		ifmedia_set(&sc->sc_media, defmedia);
256 	} else {
257 		ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL);
258 		ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
259 	}
260 
261 	/* Attach the interface. */
262 	if_attach(ifp);
263 	ether_ifattach(ifp, sc->sc_enaddr);
264 
265 #if NRND > 0
266 	rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
267 	    RND_TYPE_NET, 0);
268 #endif
269 	/* Print additional info when attached. */
270 	printf("%s: Ethernet address %s\n", sc->sc_dev.dv_xname,
271 	    ether_sprintf(sc->sc_enaddr));
272 
273 #if FE_DEBUG >= 3
274 	{
275 		int buf, txb, bbw, sbw, ram;
276 
277 		buf = txb = bbw = sbw = ram = -1;
278 		switch (sc->proto_dlcr6 & FE_D6_BUFSIZ) {
279 		case FE_D6_BUFSIZ_8KB:
280 			buf = 8;
281 			break;
282 		case FE_D6_BUFSIZ_16KB:
283 			buf = 16;
284 			break;
285 		case FE_D6_BUFSIZ_32KB:
286 			buf = 32;
287 			break;
288 		case FE_D6_BUFSIZ_64KB:
289 			buf = 64;
290 			break;
291 		}
292 		switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) {
293 		case FE_D6_TXBSIZ_2x2KB:
294 			txb = 2;
295 			break;
296 		case FE_D6_TXBSIZ_2x4KB:
297 			txb = 4;
298 			break;
299 		case FE_D6_TXBSIZ_2x8KB:
300 			txb = 8;
301 			break;
302 		}
303 		switch (sc->proto_dlcr6 & FE_D6_BBW) {
304 		case FE_D6_BBW_BYTE:
305 			bbw = 8;
306 			break;
307 		case FE_D6_BBW_WORD:
308 			bbw = 16;
309 			break;
310 		}
311 		switch (sc->proto_dlcr6 & FE_D6_SBW) {
312 		case FE_D6_SBW_BYTE:
313 			sbw = 8;
314 			break;
315 		case FE_D6_SBW_WORD:
316 			sbw = 16;
317 			break;
318 		}
319 		switch (sc->proto_dlcr6 & FE_D6_SRAM) {
320 		case FE_D6_SRAM_100ns:
321 			ram = 100;
322 			break;
323 		case FE_D6_SRAM_150ns:
324 			ram = 150;
325 			break;
326 		}
327 		printf("%s: SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n",
328 		    sc->sc_dev.dv_xname, buf, bbw, ram, txb, sbw);
329 	}
330 #endif
331 
332 	/* The attach is successful. */
333 	sc->sc_stat |= FE_STAT_ATTACHED;
334 }
335 
336 /*
337  * Media change callback.
338  */
339 int
340 mb86960_mediachange(ifp)
341 	struct ifnet *ifp;
342 {
343 	struct mb86960_softc *sc = ifp->if_softc;
344 
345 	if (sc->sc_mediachange)
346 		return ((*sc->sc_mediachange)(sc));
347 	return (0);
348 }
349 
350 /*
351  * Media status callback.
352  */
353 void
354 mb86960_mediastatus(ifp, ifmr)
355 	struct ifnet *ifp;
356 	struct ifmediareq *ifmr;
357 {
358 	struct mb86960_softc *sc = ifp->if_softc;
359 
360 	if ((sc->sc_stat & FE_STAT_ENABLED) == 0) {
361 		ifmr->ifm_active = IFM_ETHER | IFM_NONE;
362 		ifmr->ifm_status = 0;
363 		return;
364 	}
365 
366 	if (sc->sc_mediastatus)
367 		(*sc->sc_mediastatus)(sc, ifmr);
368 }
369 
370 /*
371  * Reset interface.
372  */
373 void
374 mb86960_reset(sc)
375 	struct mb86960_softc *sc;
376 {
377 	int s;
378 
379 	s = splnet();
380 	mb86960_stop(sc);
381 	mb86960_init(sc);
382 	splx(s);
383 }
384 
385 /*
386  * Stop everything on the interface.
387  *
388  * All buffered packets, both transmitting and receiving,
389  * if any, will be lost by stopping the interface.
390  */
391 void
392 mb86960_stop(sc)
393 	struct mb86960_softc *sc;
394 {
395 	bus_space_tag_t bst = sc->sc_bst;
396 	bus_space_handle_t bsh = sc->sc_bsh;
397 
398 #if FE_DEBUG >= 3
399 	log(LOG_INFO, "%s: top of mb86960_stop()\n", sc->sc_dev.dv_xname);
400 	mb86960_dump(LOG_INFO, sc);
401 #endif
402 
403 	/* Disable interrupts. */
404 	bus_space_write_1(bst, bsh, FE_DLCR2, 0x00);
405 	bus_space_write_1(bst, bsh, FE_DLCR3, 0x00);
406 
407 	/* Stop interface hardware. */
408 	delay(200);
409 	bus_space_write_1(bst, bsh, FE_DLCR6,
410 	    sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
411 	delay(200);
412 
413 	/* Clear all interrupt status. */
414 	bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF);
415 	bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF);
416 
417 	/* Put the chip in stand-by mode. */
418 	delay(200);
419 	bus_space_write_1(bst, bsh, FE_DLCR7,
420 	    sc->proto_dlcr7 | FE_D7_POWER_DOWN);
421 	delay(200);
422 
423 	/* MAR loading can be delayed. */
424 	sc->filter_change = 0;
425 
426 	/* Call a hook. */
427 	if (sc->stop_card)
428 		(*sc->stop_card)(sc);
429 
430 #if FE_DEBUG >= 3
431 	log(LOG_INFO, "%s: end of mb86960_stop()\n", sc->sc_dev.dv_xname);
432 	mb86960_dump(LOG_INFO, sc);
433 #endif
434 }
435 
436 /*
437  * Device timeout/watchdog routine. Entered if the device neglects to
438  * generate an interrupt after a transmit has been started on it.
439  */
440 void
441 mb86960_watchdog(ifp)
442 	struct ifnet *ifp;
443 {
444 	struct mb86960_softc *sc = ifp->if_softc;
445 
446 	log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
447 #if FE_DEBUG >= 3
448 	mb86960_dump(LOG_INFO, sc);
449 #endif
450 
451 	/* Record how many packets are lost by this accident. */
452 	sc->sc_ec.ec_if.if_oerrors += sc->txb_sched + sc->txb_count;
453 
454 	mb86960_reset(sc);
455 }
456 
457 /*
458  * Drop (skip) a packet from receive buffer in 86960 memory.
459  */
460 static __inline__ void
461 mb86960_droppacket(sc)
462 	struct mb86960_softc *sc;
463 {
464 	bus_space_tag_t bst = sc->sc_bst;
465 	bus_space_handle_t bsh = sc->sc_bsh;
466 
467 	bus_space_write_1(bst, bsh, FE_BMPR14, FE_B14_FILTER | FE_B14_SKIP);
468 }
469 
470 /*
471  * Initialize device.
472  */
473 void
474 mb86960_init(sc)
475 	struct mb86960_softc *sc;
476 {
477 	bus_space_tag_t bst = sc->sc_bst;
478 	bus_space_handle_t bsh = sc->sc_bsh;
479 	struct ifnet *ifp = &sc->sc_ec.ec_if;
480 	int i;
481 
482 #if FE_DEBUG >= 3
483 	log(LOG_INFO, "%s: top of mb86960_init()\n", sc->sc_dev.dv_xname);
484 	mb86960_dump(LOG_INFO, sc);
485 #endif
486 
487 	/* Reset transmitter flags. */
488 	ifp->if_flags &= ~IFF_OACTIVE;
489 	ifp->if_timer = 0;
490 
491 	sc->txb_free = sc->txb_size;
492 	sc->txb_count = 0;
493 	sc->txb_sched = 0;
494 
495 	/* Do any card-specific initialization, if applicable. */
496 	if (sc->init_card)
497 		(*sc->init_card)(sc);
498 
499 #if FE_DEBUG >= 3
500 	log(LOG_INFO, "%s: after init hook\n", sc->sc_dev.dv_xname);
501 	mb86960_dump(LOG_INFO, sc);
502 #endif
503 
504 	/*
505 	 * Make sure to disable the chip, also.
506 	 * This may also help re-programming the chip after
507 	 * hot insertion of PCMCIAs.
508 	 */
509 	bus_space_write_1(bst, bsh, FE_DLCR6,
510 	    sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
511 	delay(200);
512 
513 	/* Power up the chip and select register bank for DLCRs. */
514 	bus_space_write_1(bst, bsh, FE_DLCR7,
515 	    sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP);
516 	delay(200);
517 
518 	/* Feed the station address. */
519 	bus_space_write_region_1(bst, bsh, FE_DLCR8,
520 	    sc->sc_enaddr, ETHER_ADDR_LEN);
521 
522 	/* Select the BMPR bank for runtime register access. */
523 	bus_space_write_1(bst, bsh, FE_DLCR7,
524 	    sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
525 
526 	/* Initialize registers. */
527 	bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF);	/* Clear all bits. */
528 	bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF);	/* ditto. */
529 	bus_space_write_1(bst, bsh, FE_DLCR2, 0x00);
530 	bus_space_write_1(bst, bsh, FE_DLCR3, 0x00);
531 	bus_space_write_1(bst, bsh, FE_DLCR4, sc->proto_dlcr4);
532 	bus_space_write_1(bst, bsh, FE_DLCR5, sc->proto_dlcr5);
533 	bus_space_write_1(bst, bsh, FE_BMPR10, 0x00);
534 	bus_space_write_1(bst, bsh, FE_BMPR11, FE_B11_CTRL_SKIP);
535 	bus_space_write_1(bst, bsh, FE_BMPR12, 0x00);
536 	bus_space_write_1(bst, bsh, FE_BMPR13, sc->proto_bmpr13);
537 	bus_space_write_1(bst, bsh, FE_BMPR14, FE_B14_FILTER);
538 	bus_space_write_1(bst, bsh, FE_BMPR15, 0x00);
539 
540 #if FE_DEBUG >= 3
541 	log(LOG_INFO, "%s: just before enabling DLC\n", sc->sc_dev.dv_xname);
542 	mb86960_dump(LOG_INFO, sc);
543 #endif
544 
545 	/* Enable interrupts. */
546 	bus_space_write_1(bst, bsh, FE_DLCR2, FE_TMASK);
547 	bus_space_write_1(bst, bsh, FE_DLCR3, FE_RMASK);
548 
549 	/* Enable transmitter and receiver. */
550 	delay(200);
551 	bus_space_write_1(bst, bsh, FE_DLCR6,
552 	    sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
553 	delay(200);
554 
555 #if FE_DEBUG >= 3
556 	log(LOG_INFO, "%s: just after enabling DLC\n", sc->sc_dev.dv_xname);
557 	mb86960_dump(LOG_INFO, sc);
558 #endif
559 
560 	/*
561 	 * Make sure to empty the receive buffer.
562 	 *
563 	 * This may be redundant, but *if* the receive buffer were full
564 	 * at this point, the driver would hang.  I have experienced
565 	 * some strange hangups just after UP.  I hope the following
566 	 * code solve the problem.
567 	 *
568 	 * I have changed the order of hardware initialization.
569 	 * I think the receive buffer cannot have any packets at this
570 	 * point in this version.  The following code *must* be
571 	 * redundant now.  FIXME.
572 	 */
573 	for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
574 		if (bus_space_read_1(bst, bsh, FE_DLCR5) & FE_D5_BUFEMP)
575 			break;
576 		mb86960_droppacket(sc);
577 	}
578 #if FE_DEBUG >= 1
579 	if (i >= FE_MAX_RECV_COUNT)
580 		log(LOG_ERR, "%s: cannot empty receive buffer\n",
581 		    sc->sc_dev.dv_xname);
582 #endif
583 #if FE_DEBUG >= 3
584 	if (i < FE_MAX_RECV_COUNT)
585 		log(LOG_INFO, "%s: receive buffer emptied (%d)\n",
586 		    sc->sc_dev.dv_xname, i);
587 #endif
588 
589 #if FE_DEBUG >= 3
590 	log(LOG_INFO, "%s: after ERB loop\n", sc->sc_dev.dv_xname);
591 	mb86960_dump(LOG_INFO, sc);
592 #endif
593 
594 	/* Do we need this here? */
595 	bus_space_write_1(bst, bsh, FE_DLCR0, 0xFF);	/* Clear all bits. */
596 	bus_space_write_1(bst, bsh, FE_DLCR1, 0xFF);	/* ditto. */
597 
598 #if FE_DEBUG >= 3
599 	log(LOG_INFO, "%s: after FIXME\n", sc->sc_dev.dv_xname);
600 	mb86960_dump(LOG_INFO, sc);
601 #endif
602 
603 	/* Set 'running' flag. */
604 	ifp->if_flags |= IFF_RUNNING;
605 
606 	/*
607 	 * At this point, the interface is runnung properly,
608 	 * except that it receives *no* packets.  we then call
609 	 * mb86960_setmode() to tell the chip what packets to be
610 	 * received, based on the if_flags and multicast group
611 	 * list.  It completes the initialization process.
612 	 */
613 	mb86960_setmode(sc);
614 
615 #if FE_DEBUG >= 3
616 	log(LOG_INFO, "%s: after setmode\n", sc->sc_dev.dv_xname);
617 	mb86960_dump(LOG_INFO, sc);
618 #endif
619 
620 	/* ...and attempt to start output. */
621 	mb86960_start(ifp);
622 
623 #if FE_DEBUG >= 3
624 	log(LOG_INFO, "%s: end of mb86960_init()\n", sc->sc_dev.dv_xname);
625 	mb86960_dump(LOG_INFO, sc);
626 #endif
627 }
628 
629 /*
630  * This routine actually starts the transmission on the interface
631  */
632 static __inline__ void
633 mb86960_xmit(sc)
634 	struct mb86960_softc *sc;
635 {
636 	bus_space_tag_t bst = sc->sc_bst;
637 	bus_space_handle_t bsh = sc->sc_bsh;
638 
639 	/*
640 	 * Set a timer just in case we never hear from the board again.
641 	 * We use longer timeout for multiple packet transmission.
642 	 * I'm not sure this timer value is appropriate.  FIXME.
643 	 */
644 	sc->sc_ec.ec_if.if_timer = 1 + sc->txb_count;
645 
646 	/* Update txb variables. */
647 	sc->txb_sched = sc->txb_count;
648 	sc->txb_count = 0;
649 	sc->txb_free = sc->txb_size;
650 
651 #if FE_DELAYED_PADDING
652 	/* Omit the postponed padding process. */
653 	sc->txb_padding = 0;
654 #endif
655 
656 	/* Start transmitter, passing packets in TX buffer. */
657 	bus_space_write_1(bst, bsh, FE_BMPR10, sc->txb_sched | FE_B10_START);
658 }
659 
660 /*
661  * Start output on interface.
662  * We make two assumptions here:
663  *  1) that the current priority is set to splnet _before_ this code
664  *     is called *and* is returned to the appropriate priority after
665  *     return
666  *  2) that the IFF_OACTIVE flag is checked before this code is called
667  *     (i.e. that the output part of the interface is idle)
668  */
669 void
670 mb86960_start(ifp)
671 	struct ifnet *ifp;
672 {
673 	struct mb86960_softc *sc = ifp->if_softc;
674 	struct mbuf *m;
675 
676 #if FE_DEBUG >= 1
677 	/* Just a sanity check. */
678 	if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) {
679 		/*
680 		 * Txb_count and txb_free co-works to manage the
681 		 * transmission buffer.  Txb_count keeps track of the
682 		 * used potion of the buffer, while txb_free does unused
683 		 * potion.  So, as long as the driver runs properly,
684 		 * txb_count is zero if and only if txb_free is same
685 		 * as txb_size (which represents whole buffer.)
686 		 */
687 		log(LOG_ERR, "%s: inconsistent txb variables (%d, %d)\n",
688 		    sc->sc_dev.dv_xname, sc->txb_count, sc->txb_free);
689 		/*
690 		 * So, what should I do, then?
691 		 *
692 		 * We now know txb_count and txb_free contradicts.  We
693 		 * cannot, however, tell which is wrong.  More
694 		 * over, we cannot peek 86960 transmission buffer or
695 		 * reset the transmission buffer.  (In fact, we can
696 		 * reset the entire interface.  I don't want to do it.)
697 		 *
698 		 * If txb_count is incorrect, leaving it as is will cause
699 		 * sending of gabages after next interrupt.  We have to
700 		 * avoid it.  Hence, we reset the txb_count here.  If
701 		 * txb_free was incorrect, resetting txb_count just loose
702 		 * some packets.  We can live with it.
703 		 */
704 		sc->txb_count = 0;
705 	}
706 #endif
707 
708 #if FE_DEBUG >= 1
709 	/*
710 	 * First, see if there are buffered packets and an idle
711 	 * transmitter - should never happen at this point.
712 	 */
713 	if ((sc->txb_count > 0) && (sc->txb_sched == 0)) {
714 		log(LOG_ERR, "%s: transmitter idle with %d buffered packets\n",
715 		    sc->sc_dev.dv_xname, sc->txb_count);
716 		mb86960_xmit(sc);
717 	}
718 #endif
719 
720 	/*
721 	 * Stop accepting more transmission packets temporarily, when
722 	 * a filter change request is delayed.  Updating the MARs on
723 	 * 86960 flushes the transmisstion buffer, so it is delayed
724 	 * until all buffered transmission packets have been sent
725 	 * out.
726 	 */
727 	if (sc->filter_change) {
728 		/*
729 		 * Filter change requst is delayed only when the DLC is
730 		 * working.  DLC soon raise an interrupt after finishing
731 		 * the work.
732 		 */
733 		goto indicate_active;
734 	}
735 
736 	for (;;) {
737 		/*
738 		 * See if there is room to put another packet in the buffer.
739 		 * We *could* do better job by peeking the send queue to
740 		 * know the length of the next packet.  Current version just
741 		 * tests against the worst case (i.e., longest packet).  FIXME.
742 		 *
743 		 * When adding the packet-peek feature, don't forget adding a
744 		 * test on txb_count against QUEUEING_MAX.
745 		 * There is a little chance the packet count exceeds
746 		 * the limit.  Assume transmission buffer is 8KB (2x8KB
747 		 * configuration) and an application sends a bunch of small
748 		 * (i.e., minimum packet sized) packets rapidly.  An 8KB
749 		 * buffer can hold 130 blocks of 62 bytes long...
750 		 */
751 		if (sc->txb_free <
752 		    (ETHER_MAX_LEN - ETHER_CRC_LEN) + FE_TXLEN_SIZE) {
753 			/* No room. */
754 			goto indicate_active;
755 		}
756 
757 #if FE_SINGLE_TRANSMISSION
758 		if (sc->txb_count > 0) {
759 			/* Just one packet per a transmission buffer. */
760 			goto indicate_active;
761 		}
762 #endif
763 
764 		/*
765 		 * Get the next mbuf chain for a packet to send.
766 		 */
767 		IFQ_DEQUEUE(&ifp->if_snd, m);
768 		if (m == 0) {
769 			/* No more packets to send. */
770 			goto indicate_inactive;
771 		}
772 
773 #if NBPFILTER > 0
774 		/* Tap off here if there is a BPF listener. */
775 		if (ifp->if_bpf)
776 			bpf_mtap(ifp->if_bpf, m);
777 #endif
778 
779 		/*
780 		 * Copy the mbuf chain into the transmission buffer.
781 		 * txb_* variables are updated as necessary.
782 		 */
783 		mb86960_write_mbufs(sc, m);
784 
785 		m_freem(m);
786 
787 		/* Start transmitter if it's idle. */
788 		if (sc->txb_sched == 0)
789 			mb86960_xmit(sc);
790 	}
791 
792 indicate_inactive:
793 	/*
794 	 * We are using the !OACTIVE flag to indicate to
795 	 * the outside world that we can accept an
796 	 * additional packet rather than that the
797 	 * transmitter is _actually_ active.  Indeed, the
798 	 * transmitter may be active, but if we haven't
799 	 * filled all the buffers with data then we still
800 	 * want to accept more.
801 	 */
802 	ifp->if_flags &= ~IFF_OACTIVE;
803 	return;
804 
805 indicate_active:
806 	/*
807 	 * The transmitter is active, and there are no room for
808 	 * more outgoing packets in the transmission buffer.
809 	 */
810 	ifp->if_flags |= IFF_OACTIVE;
811 	return;
812 }
813 
814 /*
815  * Transmission interrupt handler
816  * The control flow of this function looks silly.  FIXME.
817  */
818 void
819 mb86960_tint(sc, tstat)
820 	struct mb86960_softc *sc;
821 	u_int8_t tstat;
822 {
823 	bus_space_tag_t bst = sc->sc_bst;
824 	bus_space_handle_t bsh = sc->sc_bsh;
825 	struct ifnet *ifp = &sc->sc_ec.ec_if;
826 	int left;
827 	int col;
828 
829 	/*
830 	 * Handle "excessive collision" interrupt.
831 	 */
832 	if (tstat & FE_D0_COLL16) {
833 		/*
834 		 * Find how many packets (including this collided one)
835 		 * are left unsent in transmission buffer.
836 		 */
837 		left = bus_space_read_1(bst, bsh, FE_BMPR10);
838 
839 #if FE_DEBUG >= 2
840 		log(LOG_WARNING, "%s: excessive collision (%d/%d)\n",
841 		    sc->sc_dev.dv_xname, left, sc->txb_sched);
842 #endif
843 #if FE_DEBUG >= 3
844 		mb86960_dump(LOG_INFO, sc);
845 #endif
846 
847 		/*
848 		 * Update statistics.
849 		 */
850 		ifp->if_collisions += 16;
851 		ifp->if_oerrors++;
852 		ifp->if_opackets += sc->txb_sched - left;
853 
854 		/*
855 		 * Collision statistics has been updated.
856 		 * Clear the collision flag on 86960 now to avoid confusion.
857 		 */
858 		bus_space_write_1(bst, bsh, FE_DLCR0, FE_D0_COLLID);
859 
860 		/*
861 		 * Restart transmitter, skipping the
862 		 * collided packet.
863 		 *
864 		 * We *must* skip the packet to keep network running
865 		 * properly.  Excessive collision error is an
866 		 * indication of the network overload.  If we
867 		 * tried sending the same packet after excessive
868 		 * collision, the network would be filled with
869 		 * out-of-time packets.  Packets belonging
870 		 * to reliable transport (such as TCP) are resent
871 		 * by some upper layer.
872 		 */
873 		bus_space_write_1(bst, bsh, FE_BMPR11,
874 		    FE_B11_CTRL_SKIP | FE_B11_MODE1);
875 		sc->txb_sched = left - 1;
876 	}
877 
878 	/*
879 	 * Handle "transmission complete" interrupt.
880 	 */
881 	if (tstat & FE_D0_TXDONE) {
882 		/*
883 		 * Add in total number of collisions on last
884 		 * transmission.  We also clear "collision occurred" flag
885 		 * here.
886 		 *
887 		 * 86960 has a design flow on collision count on multiple
888 		 * packet transmission.  When we send two or more packets
889 		 * with one start command (that's what we do when the
890 		 * transmission queue is clauded), 86960 informs us number
891 		 * of collisions occurred on the last packet on the
892 		 * transmission only.  Number of collisions on previous
893 		 * packets are lost.  I have told that the fact is clearly
894 		 * stated in the Fujitsu document.
895 		 *
896 		 * I considered not to mind it seriously.  Collision
897 		 * count is not so important, anyway.  Any comments?  FIXME.
898 		 */
899 
900 		if (bus_space_read_1(bst, bsh, FE_DLCR0) & FE_D0_COLLID) {
901 			/* Clear collision flag. */
902 			bus_space_write_1(bst, bsh, FE_DLCR0, FE_D0_COLLID);
903 
904 			/* Extract collision count from 86960. */
905 			col = bus_space_read_1(bst, bsh, FE_DLCR4) & FE_D4_COL;
906 			if (col == 0) {
907 				/*
908 				 * Status register indicates collisions,
909 				 * while the collision count is zero.
910 				 * This can happen after multiple packet
911 				 * transmission, indicating that one or more
912 				 * previous packet(s) had been collided.
913 				 *
914 				 * Since the accurate number of collisions
915 				 * has been lost, we just guess it as 1;
916 				 * Am I too optimistic?  FIXME.
917 				 */
918 				col = 1;
919 			} else
920 				col >>= FE_D4_COL_SHIFT;
921 			ifp->if_collisions += col;
922 #if FE_DEBUG >= 4
923 			log(LOG_WARNING, "%s: %d collision%s (%d)\n",
924 			    sc->sc_dev.dv_xname, col, col == 1 ? "" : "s",
925 			    sc->txb_sched);
926 #endif
927 		}
928 
929 		/*
930 		 * Update total number of successfully
931 		 * transmitted packets.
932 		 */
933 		ifp->if_opackets += sc->txb_sched;
934 		sc->txb_sched = 0;
935 	}
936 
937 	if (sc->txb_sched == 0) {
938 		/*
939 		 * The transmitter is no more active.
940 		 * Reset output active flag and watchdog timer.
941 		 */
942 		ifp->if_flags &= ~IFF_OACTIVE;
943 		ifp->if_timer = 0;
944 
945 		/*
946 		 * If more data is ready to transmit in the buffer, start
947 		 * transmitting them.  Otherwise keep transmitter idle,
948 		 * even if more data is queued.  This gives receive
949 		 * process a slight priority.
950 		 */
951 		if (sc->txb_count > 0)
952 			mb86960_xmit(sc);
953 	}
954 }
955 
956 /*
957  * Ethernet interface receiver interrupt.
958  */
959 void
960 mb86960_rint(sc, rstat)
961 	struct mb86960_softc *sc;
962 	u_int8_t rstat;
963 {
964 	bus_space_tag_t bst = sc->sc_bst;
965 	bus_space_handle_t bsh = sc->sc_bsh;
966 	struct ifnet *ifp = &sc->sc_ec.ec_if;
967 	u_int status, len;
968 	int i;
969 
970 	/*
971 	 * Update statistics if this interrupt is caused by an error.
972 	 */
973 	if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | FE_D1_ALGERR |
974 	    FE_D1_SRTPKT)) {
975 #if FE_DEBUG >= 3
976 		char sbuf[sizeof(FE_D1_ERRBITS) + 64];
977 
978 		bitmask_snprintf(rstat, FE_D1_ERRBITS, sbuf, sizeof(sbuf));
979 		log(LOG_WARNING, "%s: receive error: %s\n",
980 		    sc->sc_dev.dv_xname, sbuf);
981 #endif
982 		ifp->if_ierrors++;
983 	}
984 
985 	/*
986 	 * MB86960 has a flag indicating "receive queue empty."
987 	 * We just loop checking the flag to pull out all received
988 	 * packets.
989 	 *
990 	 * We limit the number of iterrations to avoid infinite loop.
991 	 * It can be caused by a very slow CPU (some broken
992 	 * peripheral may insert incredible number of wait cycles)
993 	 * or, worse, by a broken MB86960 chip.
994 	 */
995 	for (i = 0; i < FE_MAX_RECV_COUNT; i++) {
996 		/* Stop the iterration if 86960 indicates no packets. */
997 		if (bus_space_read_1(bst, bsh, FE_DLCR5) & FE_D5_BUFEMP)
998 			break;
999 
1000 		/*
1001 		 * Extract receive packet status from the receive
1002 		 * packet header.
1003 		 */
1004 		if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
1005 			status = bus_space_read_1(bst, bsh, FE_BMPR8);
1006 			(void)bus_space_read_1(bst, bsh, FE_BMPR8);
1007 		} else
1008 			status = bus_space_read_2(bst, bsh, FE_BMPR8);
1009 
1010 #if FE_DEBUG >= 4
1011 		log(LOG_INFO, "%s: receive status = %02x\n",
1012 		    sc->sc_dev.dv_xname, status);
1013 #endif
1014 
1015 		/*
1016 		 * If there was an error, update statistics and drop
1017 		 * the packet, unless the interface is in promiscuous
1018 		 * mode.
1019 		 */
1020 		if ((status & FE_RXSTAT_GOODPKT) == 0) {
1021 			if ((ifp->if_flags & IFF_PROMISC) == 0) {
1022 				ifp->if_ierrors++;
1023 				mb86960_droppacket(sc);
1024 				continue;
1025 			}
1026 		}
1027 
1028 		/*
1029 		 * Extract the packet length from the receive packet header.
1030 		 * It is a sum of a header (14 bytes) and a payload.
1031 		 * CRC has been stripped off by the 86960.
1032 		 */
1033 		if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
1034 			len  = bus_space_read_1(bst, bsh, FE_BMPR8);
1035 			len |= bus_space_read_1(bst, bsh, FE_BMPR8) << 8;
1036 		} else
1037 			len = bus_space_read_2(bst, bsh, FE_BMPR8);
1038 
1039 		/*
1040 		 * MB86965 checks the packet length and drop big packet
1041 		 * before passing it to us.  There are no chance we can
1042 		 * get [crufty] packets.  Hence, if the length exceeds
1043 		 * the specified limit, it means some serious failure,
1044 		 * such as out-of-sync on receive buffer management.
1045 		 *
1046 		 * Is this statement true?  FIXME.
1047 		 */
1048 		if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN) ||
1049 		    len < ETHER_HDR_LEN) {
1050 #if FE_DEBUG >= 2
1051 			log(LOG_WARNING,
1052 			    "%s: received a %s packet? (%u bytes)\n",
1053 			    sc->sc_dev.dv_xname,
1054 			    len < ETHER_HDR_LEN ? "partial" : "big", len);
1055 #endif
1056 			ifp->if_ierrors++;
1057 			mb86960_droppacket(sc);
1058 			continue;
1059 		}
1060 
1061 		/*
1062 		 * Check for a short (RUNT) packet.  We *do* check
1063 		 * but do nothing other than print a message.
1064 		 * Short packets are illegal, but does nothing bad
1065 		 * if it carries data for upper layer.
1066 		 */
1067 #if FE_DEBUG >= 2
1068 		if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) {
1069 			log(LOG_WARNING,
1070 			    "%s: received a short packet? (%u bytes)\n",
1071 			    sc->sc_dev.dv_xname, len);
1072 		}
1073 #endif
1074 
1075 		/*
1076 		 * Go get a packet.
1077 		 */
1078 		if (mb86960_get_packet(sc, len) == 0) {
1079 			/* Skip a packet, updating statistics. */
1080 #if FE_DEBUG >= 2
1081 			log(LOG_WARNING,
1082 			    "%s: out of mbufs; dropping packet (%u bytes)\n",
1083 			    sc->sc_dev.dv_xname, len);
1084 #endif
1085 			ifp->if_ierrors++;
1086 			mb86960_droppacket(sc);
1087 
1088 			/*
1089 			 * We stop receiving packets, even if there are
1090 			 * more in the buffer.  We hope we can get more
1091 			 * mbufs next time.
1092 			 */
1093 			return;
1094 		}
1095 
1096 		/* Successfully received a packet.  Update stat. */
1097 		ifp->if_ipackets++;
1098 	}
1099 }
1100 
1101 /*
1102  * Ethernet interface interrupt processor
1103  */
1104 int
1105 mb86960_intr(arg)
1106 	void *arg;
1107 {
1108 	struct mb86960_softc *sc = arg;
1109 	bus_space_tag_t bst = sc->sc_bst;
1110 	bus_space_handle_t bsh = sc->sc_bsh;
1111 	struct ifnet *ifp = &sc->sc_ec.ec_if;
1112 	u_int8_t tstat, rstat;
1113 
1114 	if ((sc->sc_stat & FE_STAT_ENABLED) == 0 ||
1115 	    (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
1116 		return (0);
1117 
1118 #if FE_DEBUG >= 4
1119 	log(LOG_INFO, "%s: mb86960_intr()\n", sc->sc_dev.dv_xname);
1120 	mb86960_dump(LOG_INFO, sc);
1121 #endif
1122 
1123 	/*
1124 	 * Get interrupt conditions, masking unneeded flags.
1125 	 */
1126 	tstat = bus_space_read_1(bst, bsh, FE_DLCR0) & FE_TMASK;
1127 	rstat = bus_space_read_1(bst, bsh, FE_DLCR1) & FE_RMASK;
1128 	if (tstat == 0 && rstat == 0)
1129 		return (0);
1130 
1131 	/*
1132 	 * Loop until there are no more new interrupt conditions.
1133 	 */
1134 	for (;;) {
1135 		/*
1136 		 * Reset the conditions we are acknowledging.
1137 		 */
1138 		bus_space_write_1(bst, bsh, FE_DLCR0, tstat);
1139 		bus_space_write_1(bst, bsh, FE_DLCR1, rstat);
1140 
1141 		/*
1142 		 * Handle transmitter interrupts. Handle these first because
1143 		 * the receiver will reset the board under some conditions.
1144 		 */
1145 		if (tstat != 0)
1146 			mb86960_tint(sc, tstat);
1147 
1148 		/*
1149 		 * Handle receiver interrupts.
1150 		 */
1151 		if (rstat != 0)
1152 			mb86960_rint(sc, rstat);
1153 
1154 		/*
1155 		 * Update the multicast address filter if it is
1156 		 * needed and possible.  We do it now, because
1157 		 * we can make sure the transmission buffer is empty,
1158 		 * and there is a good chance that the receive queue
1159 		 * is empty.  It will minimize the possibility of
1160 		 * packet lossage.
1161 		 */
1162 		if (sc->filter_change &&
1163 		    sc->txb_count == 0 && sc->txb_sched == 0) {
1164 			mb86960_loadmar(sc);
1165 			ifp->if_flags &= ~IFF_OACTIVE;
1166 		}
1167 
1168 		/*
1169 		 * If it looks like the transmitter can take more data,
1170 		 * attempt to start output on the interface. This is done
1171 		 * after handling the receiver interrupt to give the
1172 		 * receive operation priority.
1173 		 */
1174 		if ((ifp->if_flags & IFF_OACTIVE) == 0)
1175 			mb86960_start(ifp);
1176 
1177 #if NRND > 0
1178 		if (rstat != 0 || tstat != 0)
1179 			rnd_add_uint32(&sc->rnd_source, rstat + tstat);
1180 #endif
1181 
1182 		/*
1183 		 * Get interrupt conditions, masking unneeded flags.
1184 		 */
1185 		tstat = bus_space_read_1(bst, bsh, FE_DLCR0) & FE_TMASK;
1186 		rstat = bus_space_read_1(bst, bsh, FE_DLCR1) & FE_RMASK;
1187 		if (tstat == 0 && rstat == 0)
1188 			return (1);
1189 	}
1190 }
1191 
1192 /*
1193  * Process an ioctl request.  This code needs some work - it looks pretty ugly.
1194  */
1195 int
1196 mb86960_ioctl(ifp, cmd, data)
1197 	struct ifnet *ifp;
1198 	u_long cmd;
1199 	caddr_t data;
1200 {
1201 	struct mb86960_softc *sc = ifp->if_softc;
1202 	struct ifaddr *ifa = (struct ifaddr *)data;
1203 	struct ifreq *ifr = (struct ifreq *)data;
1204 	int s, error = 0;
1205 
1206 #if FE_DEBUG >= 3
1207 	log(LOG_INFO, "%s: ioctl(%lx)\n", sc->sc_dev.dv_xname, cmd);
1208 #endif
1209 
1210 	s = splnet();
1211 
1212 	switch (cmd) {
1213 	case SIOCSIFADDR:
1214 		if ((error = mb86960_enable(sc)) != 0)
1215 			break;
1216 		ifp->if_flags |= IFF_UP;
1217 
1218 		switch (ifa->ifa_addr->sa_family) {
1219 #ifdef INET
1220 		case AF_INET:
1221 			mb86960_init(sc);
1222 			arp_ifinit(ifp, ifa);
1223 			break;
1224 #endif
1225 #ifdef NS
1226 		case AF_NS:
1227 		    {
1228 			struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
1229 
1230 			if (ns_nullhost(*ina))
1231 				ina->x_host =
1232 				    *(union ns_host *)LLADDR(ifp->if_sadl);
1233 			else {
1234 				memcpy(LLADDR(ifp->if_sadl),
1235 				    ina->x_host.c_host, ETHER_ADDR_LEN);
1236 			}
1237 			/* Set new address. */
1238 			mb86960_init(sc);
1239 			break;
1240 		    }
1241 #endif
1242 		default:
1243 			mb86960_init(sc);
1244 			break;
1245 		}
1246 		break;
1247 
1248 	case SIOCSIFFLAGS:
1249 		if ((ifp->if_flags & IFF_UP) == 0 &&
1250 		    (ifp->if_flags & IFF_RUNNING) != 0) {
1251 			/*
1252 			 * If interface is marked down and it is running, then
1253 			 * stop it.
1254 			 */
1255 			mb86960_stop(sc);
1256 			ifp->if_flags &= ~IFF_RUNNING;
1257 			mb86960_disable(sc);
1258 		} else if ((ifp->if_flags & IFF_UP) != 0 &&
1259 		    (ifp->if_flags & IFF_RUNNING) == 0) {
1260 			/*
1261 			 * If interface is marked up and it is stopped, then
1262 			 * start it.
1263 			 */
1264 			if ((error = mb86960_enable(sc)) != 0)
1265 				break;
1266 			mb86960_init(sc);
1267 		} else if ((ifp->if_flags & IFF_UP) != 0) {
1268 			/*
1269 			 * Reset the interface to pick up changes in any other
1270 			 * flags that affect hardware registers.
1271 			 */
1272 			mb86960_setmode(sc);
1273 		}
1274 #if FE_DEBUG >= 1
1275 		/* "ifconfig fe0 debug" to print register dump. */
1276 		if (ifp->if_flags & IFF_DEBUG) {
1277 			log(LOG_INFO, "%s: SIOCSIFFLAGS(DEBUG)\n",
1278 			    sc->sc_dev.dv_xname);
1279 			mb86960_dump(LOG_DEBUG, sc);
1280 		}
1281 #endif
1282 		break;
1283 
1284 	case SIOCADDMULTI:
1285 	case SIOCDELMULTI:
1286 		if ((sc->sc_stat & FE_STAT_ENABLED) == 0) {
1287 			error = EIO;
1288 			break;
1289 		}
1290 
1291 		/* Update our multicast list. */
1292 		error = (cmd == SIOCADDMULTI) ?
1293 		    ether_addmulti(ifr, &sc->sc_ec) :
1294 		    ether_delmulti(ifr, &sc->sc_ec);
1295 
1296 		if (error == ENETRESET) {
1297 			/*
1298 			 * Multicast list has changed; set the hardware filter
1299 			 * accordingly.
1300 			 */
1301 			mb86960_setmode(sc);
1302 			error = 0;
1303 		}
1304 		break;
1305 
1306 	case SIOCGIFMEDIA:
1307 	case SIOCSIFMEDIA:
1308 		error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
1309 		break;
1310 
1311 	default:
1312 		error = EINVAL;
1313 		break;
1314 	}
1315 
1316 	splx(s);
1317 	return (error);
1318 }
1319 
1320 /*
1321  * Retrieve packet from receive buffer and send to the next level up via
1322  * ether_input(). If there is a BPF listener, give a copy to BPF, too.
1323  * Returns 0 if success, -1 if error (i.e., mbuf allocation failure).
1324  */
1325 int
1326 mb86960_get_packet(sc, len)
1327 	struct mb86960_softc *sc;
1328 	u_int len;
1329 {
1330 	bus_space_tag_t bst = sc->sc_bst;
1331 	bus_space_handle_t bsh = sc->sc_bsh;
1332 	struct ifnet *ifp = &sc->sc_ec.ec_if;
1333 	struct mbuf *m;
1334 
1335 	/* Allocate a header mbuf. */
1336 	MGETHDR(m, M_DONTWAIT, MT_DATA);
1337 	if (m == 0)
1338 		return (0);
1339 	m->m_pkthdr.rcvif = ifp;
1340 	m->m_pkthdr.len = len;
1341 
1342 	/* The following silliness is to make NFS happy. */
1343 #define	EROUND	((sizeof(struct ether_header) + 3) & ~3)
1344 #define	EOFF	(EROUND - sizeof(struct ether_header))
1345 
1346 	/*
1347 	 * Our strategy has one more problem.  There is a policy on
1348 	 * mbuf cluster allocation.  It says that we must have at
1349 	 * least MINCLSIZE (208 bytes) to allocate a cluster.  For a
1350 	 * packet of a size between (MHLEN - 2) to (MINCLSIZE - 2),
1351 	 * our code violates the rule...
1352 	 * On the other hand, the current code is short, simple,
1353 	 * and fast, however.  It does no harmful thing, just waists
1354 	 * some memory.  Any comments?  FIXME.
1355 	 */
1356 
1357 	/* Attach a cluster if this packet doesn't fit in a normal mbuf. */
1358 	if (len > MHLEN - EOFF) {
1359 		MCLGET(m, M_DONTWAIT);
1360 		if ((m->m_flags & M_EXT) == 0) {
1361 			m_freem(m);
1362 			return (0);
1363 		}
1364 	}
1365 
1366 	/*
1367 	 * The following assumes there is room for the ether header in the
1368 	 * header mbuf.
1369 	 */
1370 	m->m_data += EOFF;
1371 
1372 	/* Set the length of this packet. */
1373 	m->m_len = len;
1374 
1375 	/* Get a packet. */
1376 	if (sc->sc_flags & FE_FLAGS_SBW_BYTE)
1377 		bus_space_read_multi_1(bst, bsh, FE_BMPR8,
1378 		    mtod(m, u_int8_t *), len);
1379 	else
1380 		bus_space_read_multi_stream_2(bst, bsh, FE_BMPR8,
1381 		    mtod(m, u_int16_t *), (len + 1) >> 1);
1382 
1383 #if NBPFILTER > 0
1384 	/*
1385 	 * Check if there's a BPF listener on this interface.  If so, hand off
1386 	 * the raw packet to bpf.
1387 	 */
1388 	if (ifp->if_bpf)
1389 		bpf_mtap(ifp->if_bpf, m);
1390 #endif
1391 
1392 	(*ifp->if_input)(ifp, m);
1393 	return (1);
1394 }
1395 
1396 /*
1397  * Write an mbuf chain to the transmission buffer memory using 16 bit PIO.
1398  * Returns number of bytes actually written, including length word.
1399  *
1400  * If an mbuf chain is too long for an Ethernet frame, it is not sent.
1401  * Packets shorter than Ethernet minimum are legal, and we pad them
1402  * before sending out.  An exception is "partial" packets which are
1403  * shorter than mandatory Ethernet header.
1404  *
1405  * I wrote a code for an experimental "delayed padding" technique.
1406  * When employed, it postpones the padding process for short packets.
1407  * If xmit() occurred at the moment, the padding process is omitted, and
1408  * garbages are sent as pad data.  If next packet is stored in the
1409  * transmission buffer before xmit(), write_mbuf() pads the previous
1410  * packet before transmitting new packet.  This *may* gain the
1411  * system performance (slightly).
1412  */
1413 void
1414 mb86960_write_mbufs(sc, m)
1415 	struct mb86960_softc *sc;
1416 	struct mbuf *m;
1417 {
1418 	bus_space_tag_t bst = sc->sc_bst;
1419 	bus_space_handle_t bsh = sc->sc_bsh;
1420 	int totlen, len;
1421 #if FE_DEBUG >= 2
1422 	struct mbuf *mp;
1423 #endif
1424 
1425 #if FE_DELAYED_PADDING
1426 	/* Do the "delayed padding." */
1427 	if (sc->txb_padding > 0) {
1428 		if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
1429 			for (len = sc->txb_padding; len > 0; len--)
1430 				bus_space_write_1(bst, bsh, FE_BMPR8, 0);
1431 		} else {
1432 			for (len = sc->txb_padding >> 1; len > 0; len--)
1433 				bus_space_write_2(bst, bsh, FE_BMPR8, 0);
1434 		}
1435 		sc->txb_padding = 0;
1436 	}
1437 #endif
1438 
1439 	/* We need to use m->m_pkthdr.len, so require the header */
1440 	if ((m->m_flags & M_PKTHDR) == 0)
1441 	  	panic("mb86960_write_mbufs: no header mbuf");
1442 
1443 #if FE_DEBUG >= 2
1444 	/* First, count up the total number of bytes to copy. */
1445 	for (totlen = 0, mp = m; mp != 0; mp = mp->m_next)
1446 		totlen += mp->m_len;
1447 	/* Check if this matches the one in the packet header. */
1448 	if (totlen != m->m_pkthdr.len)
1449 		log(LOG_WARNING, "%s: packet length mismatch? (%d/%d)\n",
1450 		    sc->sc_dev.dv_xname, totlen, m->m_pkthdr.len);
1451 #else
1452 	/* Just use the length value in the packet header. */
1453 	totlen = m->m_pkthdr.len;
1454 #endif
1455 
1456 #if FE_DEBUG >= 1
1457 	/*
1458 	 * Should never send big packets.  If such a packet is passed,
1459 	 * it should be a bug of upper layer.  We just ignore it.
1460 	 * ... Partial (too short) packets, neither.
1461 	 */
1462 	if (totlen > (ETHER_MAX_LEN - ETHER_CRC_LEN) ||
1463 	    totlen < ETHER_HDR_LEN) {
1464 		log(LOG_ERR, "%s: got a %s packet (%u bytes) to send\n",
1465 		    sc->sc_dev.dv_xname,
1466 		    totlen < ETHER_HDR_LEN ? "partial" : "big", totlen);
1467 		sc->sc_ec.ec_if.if_oerrors++;
1468 		return;
1469 	}
1470 #endif
1471 
1472 	/*
1473 	 * Put the length word for this frame.
1474 	 * Does 86960 accept odd length?  -- Yes.
1475 	 * Do we need to pad the length to minimum size by ourselves?
1476 	 * -- Generally yes.  But for (or will be) the last
1477 	 * packet in the transmission buffer, we can skip the
1478 	 * padding process.  It may gain performance slightly.  FIXME.
1479 	 */
1480 	len = max(totlen, (ETHER_MIN_LEN - ETHER_CRC_LEN));
1481 	if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
1482 		bus_space_write_1(bst, bsh, FE_BMPR8, len);
1483 		bus_space_write_1(bst, bsh, FE_BMPR8, len >> 8);
1484 	} else {
1485 		bus_space_write_2(bst, bsh, FE_BMPR8, len);
1486 		/* roundup packet length since we will use word access */
1487 		totlen = (totlen + 1) & ~1;
1488 	}
1489 
1490 	/*
1491 	 * Update buffer status now.
1492 	 * Truncate the length up to an even number
1493 	 * if the chip is set in SBW_WORD mode.
1494 	 */
1495 	sc->txb_free -= FE_TXLEN_SIZE +
1496 	    max(totlen, (ETHER_MIN_LEN - ETHER_CRC_LEN));
1497 	sc->txb_count++;
1498 
1499 #if FE_DELAYED_PADDING
1500 	/* Postpone the packet padding if necessary. */
1501 	if (totlen < (ETHER_MIN_LEN - ETHER_CRC_LEN))
1502 		sc->txb_padding = (ETHER_MIN_LEN - ETHER_CRC_LEN) - totlen;
1503 #endif
1504 
1505 	/*
1506 	 * Transfer the data from mbuf chain to the transmission buffer.
1507 	 * If the MB86960 is configured in word mode, data needs to be
1508 	 * transferred as words, and only words.
1509 	 * So that we require some extra code to patch over odd-length
1510 	 * or unaligned mbufs.
1511 	 */
1512 	if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
1513 		/* It's simple in byte mode. */
1514 		for (; m != NULL; m = m->m_next) {
1515 			if (m->m_len) {
1516 				bus_space_write_multi_1(bst, bsh, FE_BMPR8,
1517 				    mtod(m, u_int8_t *), m->m_len);
1518 			}
1519 		}
1520 	} else {
1521 		/* a bit trickier in word mode. */
1522 		u_int8_t *data, savebyte[2];
1523 		int leftover;
1524 
1525 		leftover = 0;
1526 		savebyte[0] = savebyte[1] = 0;
1527 
1528 		for (; m != NULL; m = m->m_next) {
1529 			len = m->m_len;
1530 			if (len == 0)
1531 				continue;
1532 			data = mtod(m, u_int8_t *);
1533 			while (len > 0) {
1534 				if (leftover) {
1535 					/*
1536 					 * Data left over (from mbuf or
1537 					 * realignment). Buffer the next
1538 					 * byte, and write it and the
1539 					 * leftover data out.
1540 					 */
1541 					savebyte[1] = *data++;
1542 					len--;
1543 					bus_space_write_stream_2(bst, bsh,
1544 					   FE_BMPR8, *(u_int16_t *)savebyte);
1545 					leftover = 0;
1546 				} else if (BUS_SPACE_ALIGNED_POINTER(data,
1547 				    u_int16_t) == 0) {
1548 					/*
1549 					 * Unaligned data; buffer the next byte.
1550 					 */
1551 					savebyte[0] = *data++;
1552 					len--;
1553 					leftover = 1;
1554 				} else {
1555 					/*
1556 					 * Aligned data; output contiguous
1557 					 * words as much as we can, then
1558 					 * buffer the remaining byte, if any.
1559 					 */
1560 					leftover = len & 1;
1561 					len &= ~1;
1562 					bus_space_write_multi_stream_2(bst, bsh,
1563 					    FE_BMPR8, (u_int16_t *)data,
1564 					    len >> 1);
1565 					data += len;
1566 					if (leftover)
1567 						savebyte[0] = *data++;
1568 					len = 0;
1569 				}
1570 			}
1571 			if (len < 0)
1572 				panic("mb86960_write_mbufs: negative len");
1573 		}
1574 		if (leftover) {
1575 			savebyte[1] = 0;
1576 			bus_space_write_stream_2(bst, bsh, FE_BMPR8,
1577 			    *(u_int16_t *)savebyte);
1578 		}
1579 	}
1580 #if FE_DELAYED_PADDING == 0
1581 	/*
1582 	 * Pad the packet to the minimum length if necessary.
1583 	 */
1584 	len = (ETHER_MIN_LEN - ETHER_CRC_LEN) - totlen;
1585 	if (len > 0) {
1586 		if (sc->sc_flags & FE_FLAGS_SBW_BYTE) {
1587 			while (len-- > 0)
1588 				bus_space_write_1(bst, bsh, FE_BMPR8, 0);
1589 		} else {
1590 			len >>= 1;
1591 			while (len-- > 0)
1592 				bus_space_write_2(bst, bsh, FE_BMPR8, 0);
1593 		}
1594 	}
1595 #endif
1596 }
1597 
1598 /*
1599  * Compute the multicast address filter from the
1600  * list of multicast addresses we need to listen to.
1601  */
1602 void
1603 mb86960_getmcaf(ec, af)
1604 	struct ethercom *ec;
1605 	u_int8_t *af;
1606 {
1607 	struct ifnet *ifp = &ec->ec_if;
1608 	struct ether_multi *enm;
1609 	u_int32_t crc;
1610 	struct ether_multistep step;
1611 
1612 	/*
1613 	 * Set up multicast address filter by passing all multicast addresses
1614 	 * through a crc generator, and then using the high order 6 bits as an
1615 	 * index into the 64 bit logical address filter.  The high order bit
1616 	 * selects the word, while the rest of the bits select the bit within
1617 	 * the word.
1618 	 */
1619 
1620 	if ((ifp->if_flags & IFF_PROMISC) != 0)
1621 		goto allmulti;
1622 
1623 	memset(af, 0, FE_FILTER_LEN);
1624 	ETHER_FIRST_MULTI(step, ec, enm);
1625 	while (enm != NULL) {
1626 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
1627 		    sizeof(enm->enm_addrlo)) != 0) {
1628 			/*
1629 			 * We must listen to a range of multicast addresses.
1630 			 * For now, just accept all multicasts, rather than
1631 			 * trying to set only those filter bits needed to match
1632 			 * the range.  (At this time, the only use of address
1633 			 * ranges is for IP multicast routing, for which the
1634 			 * range is big enough to require all bits set.)
1635 			 */
1636 			goto allmulti;
1637 		}
1638 
1639 		crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
1640 
1641 		/* Just want the 6 most significant bits. */
1642 		crc >>= 26;
1643 
1644 		/* Turn on the corresponding bit in the filter. */
1645 		af[crc >> 3] |= 1 << (crc & 7);
1646 
1647 		ETHER_NEXT_MULTI(step, enm);
1648 	}
1649 	ifp->if_flags &= ~IFF_ALLMULTI;
1650 	return;
1651 
1652 allmulti:
1653 	ifp->if_flags |= IFF_ALLMULTI;
1654 	memset(af, 0xff, FE_FILTER_LEN);
1655 }
1656 
1657 /*
1658  * Calculate a new "multicast packet filter" and put the 86960
1659  * receiver in appropriate mode.
1660  */
1661 void
1662 mb86960_setmode(sc)
1663 	struct mb86960_softc *sc;
1664 {
1665 	bus_space_tag_t bst = sc->sc_bst;
1666 	bus_space_handle_t bsh = sc->sc_bsh;
1667 	int flags = sc->sc_ec.ec_if.if_flags;
1668 
1669 	/*
1670 	 * If the interface is not running, we postpone the update
1671 	 * process for receive modes and multicast address filter
1672 	 * until the interface is restarted.  It reduces some
1673 	 * complicated job on maintaining chip states.  (Earlier versions
1674 	 * of this driver had a bug on that point...)
1675 	 *
1676 	 * To complete the trick, mb86960_init() calls mb86960_setmode() after
1677 	 * restarting the interface.
1678 	 */
1679 	if ((flags & IFF_RUNNING) == 0)
1680 		return;
1681 
1682 	/*
1683 	 * Promiscuous mode is handled separately.
1684 	 */
1685 	if ((flags & IFF_PROMISC) != 0) {
1686 		/*
1687 		 * Program 86960 to receive all packets on the segment
1688 		 * including those directed to other stations.
1689 		 * Multicast filter stored in MARs are ignored
1690 		 * under this setting, so we don't need to update it.
1691 		 *
1692 		 * Promiscuous mode is used solely by BPF, and BPF only
1693 		 * listens to valid (no error) packets.  So, we ignore
1694 		 * errornous ones even in this mode.
1695 		 */
1696 		bus_space_write_1(bst, bsh, FE_DLCR5,
1697 		    sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1);
1698 		sc->filter_change = 0;
1699 
1700 #if FE_DEBUG >= 3
1701 		log(LOG_INFO, "%s: promiscuous mode\n", sc->sc_dev.dv_xname);
1702 #endif
1703 		return;
1704 	}
1705 
1706 	/*
1707 	 * Turn the chip to the normal (non-promiscuous) mode.
1708 	 */
1709 	bus_space_write_1(bst, bsh, FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1);
1710 
1711 	/*
1712 	 * Find the new multicast filter value.
1713 	 */
1714 	mb86960_getmcaf(&sc->sc_ec, sc->filter);
1715 	sc->filter_change = 1;
1716 
1717 #if FE_DEBUG >= 3
1718 	log(LOG_INFO,
1719 	    "%s: address filter: [%02x %02x %02x %02x %02x %02x %02x %02x]\n",
1720 	    sc->sc_dev.dv_xname,
1721 	    sc->filter[0], sc->filter[1], sc->filter[2], sc->filter[3],
1722 	    sc->filter[4], sc->filter[5], sc->filter[6], sc->filter[7]);
1723 #endif
1724 
1725 	/*
1726 	 * We have to update the multicast filter in the 86960, A.S.A.P.
1727 	 *
1728 	 * Note that the DLC (Data Linc Control unit, i.e. transmitter
1729 	 * and receiver) must be stopped when feeding the filter, and
1730 	 * DLC trashes all packets in both transmission and receive
1731 	 * buffers when stopped.
1732 	 *
1733 	 * ... Are the above sentenses correct?  I have to check the
1734 	 *     manual of the MB86960A.  FIXME.
1735 	 *
1736 	 * To reduce the packet lossage, we delay the filter update
1737 	 * process until buffers are empty.
1738 	 */
1739 	if (sc->txb_sched == 0 && sc->txb_count == 0 &&
1740 	    (bus_space_read_1(bst, bsh, FE_DLCR1) & FE_D1_PKTRDY) == 0) {
1741 		/*
1742 		 * Buffers are (apparently) empty.  Load
1743 		 * the new filter value into MARs now.
1744 		 */
1745 		mb86960_loadmar(sc);
1746 	} else {
1747 		/*
1748 		 * Buffers are not empty.  Mark that we have to update
1749 		 * the MARs.  The new filter will be loaded by mb86960_intr()
1750 		 * later.
1751 		 */
1752 #if FE_DEBUG >= 4
1753 		log(LOG_INFO, "%s: filter change delayed\n",
1754 		    sc->sc_dev.dv_xname);
1755 #endif
1756 	}
1757 }
1758 
1759 /*
1760  * Load a new multicast address filter into MARs.
1761  *
1762  * The caller must have splnet'ed befor mb86960_loadmar.
1763  * This function starts the DLC upon return.  So it can be called only
1764  * when the chip is working, i.e., from the driver's point of view, when
1765  * a device is RUNNING.  (I mistook the point in previous versions.)
1766  */
1767 void
1768 mb86960_loadmar(sc)
1769 	struct mb86960_softc *sc;
1770 {
1771 	bus_space_tag_t bst = sc->sc_bst;
1772 	bus_space_handle_t bsh = sc->sc_bsh;
1773 
1774 	/* Stop the DLC (transmitter and receiver). */
1775 	bus_space_write_1(bst, bsh, FE_DLCR6,
1776 	    sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
1777 
1778 	/* Select register bank 1 for MARs. */
1779 	bus_space_write_1(bst, bsh, FE_DLCR7,
1780 	    sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP);
1781 
1782 	/* Copy filter value into the registers. */
1783 	bus_space_write_region_1(bst, bsh, FE_MAR8, sc->filter, FE_FILTER_LEN);
1784 
1785 	/* Restore the bank selection for BMPRs (i.e., runtime registers). */
1786 	bus_space_write_1(bst, bsh, FE_DLCR7,
1787 	    sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);
1788 
1789 	/* Restart the DLC. */
1790 	bus_space_write_1(bst, bsh, FE_DLCR6,
1791 	    sc->proto_dlcr6 | FE_D6_DLC_ENABLE);
1792 
1793 	/* We have just updated the filter. */
1794 	sc->filter_change = 0;
1795 
1796 #if FE_DEBUG >= 3
1797 	log(LOG_INFO, "%s: address filter changed\n", sc->sc_dev.dv_xname);
1798 #endif
1799 }
1800 
1801 /*
1802  * Enable power on the interface.
1803  */
1804 int
1805 mb86960_enable(sc)
1806 	struct mb86960_softc *sc;
1807 {
1808 
1809 #if FE_DEBUG >= 3
1810 	log(LOG_INFO, "%s: mb86960_enable()\n", sc->sc_dev.dv_xname);
1811 #endif
1812 
1813 	if ((sc->sc_stat & FE_STAT_ENABLED) == 0 && sc->sc_enable != NULL) {
1814 		if ((*sc->sc_enable)(sc) != 0) {
1815 			printf("%s: device enable failed\n",
1816 			    sc->sc_dev.dv_xname);
1817 			return (EIO);
1818 		}
1819 	}
1820 
1821 	sc->sc_stat |= FE_STAT_ENABLED;
1822 	return (0);
1823 }
1824 
1825 /*
1826  * Disable power on the interface.
1827  */
1828 void
1829 mb86960_disable(sc)
1830 	struct mb86960_softc *sc;
1831 {
1832 
1833 #if FE_DEBUG >= 3
1834 	log(LOG_INFO, "%s: mb86960_disable()\n", sc->sc_dev.dv_xname);
1835 #endif
1836 
1837 	if ((sc->sc_stat & FE_STAT_ENABLED) != 0 && sc->sc_disable != NULL) {
1838 		(*sc->sc_disable)(sc);
1839 		sc->sc_stat &= ~FE_STAT_ENABLED;
1840 	}
1841 }
1842 
1843 /*
1844  * mbe_activate:
1845  *
1846  *	Handle device activation/deactivation requests.
1847  */
1848 int
1849 mb86960_activate(self, act)
1850 	struct device *self;
1851 	enum devact act;
1852 {
1853 	struct mb86960_softc *sc = (struct mb86960_softc *)self;
1854 	int rv, s;
1855 
1856 	rv = 0;
1857 	s = splnet();
1858 	switch (act) {
1859 	case DVACT_ACTIVATE:
1860 		rv = EOPNOTSUPP;
1861 		break;
1862 
1863 	case DVACT_DEACTIVATE:
1864 		if_deactivate(&sc->sc_ec.ec_if);
1865 		break;
1866 	}
1867 	splx(s);
1868 	return (rv);
1869 }
1870 
1871 /*
1872  * mb86960_detach:
1873  *
1874  *	Detach a MB86960 interface.
1875  */
1876 int
1877 mb86960_detach(sc)
1878 	struct mb86960_softc *sc;
1879 {
1880 	struct ifnet *ifp = &sc->sc_ec.ec_if;
1881 
1882 	/* Succeed now if there's no work to do. */
1883 	if ((sc->sc_stat & FE_STAT_ATTACHED) == 0)
1884 		return (0);
1885 
1886 	/* Delete all media. */
1887 	ifmedia_delete_instance(&sc->sc_media, IFM_INST_ANY);
1888 
1889 #if NRND > 0
1890 	/* Unhook the entropy source. */
1891 	rnd_detach_source(&sc->rnd_source);
1892 #endif
1893 	ether_ifdetach(ifp);
1894 	if_detach(ifp);
1895 
1896 	mb86960_disable(sc);
1897 	return (0);
1898 }
1899 
1900 /*
1901  * Routines to read all bytes from the config EEPROM (93C06) through MB86965A.
1902  */
1903 void
1904 mb86965_read_eeprom(iot, ioh, data)
1905 	bus_space_tag_t iot;
1906 	bus_space_handle_t ioh;
1907 	u_int8_t *data;
1908 {
1909 	int addr, op, bit;
1910 	u_int16_t val;
1911 
1912 	/* Read bytes from EEPROM; two bytes per an iteration. */
1913 	for (addr = 0; addr < FE_EEPROM_SIZE / 2; addr++) {
1914 		/* Reset the EEPROM interface. */
1915 		bus_space_write_1(iot, ioh, FE_BMPR16, 0x00);
1916 		bus_space_write_1(iot, ioh, FE_BMPR17, 0x00);
1917 		bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT);
1918 
1919 		/* Send start bit. */
1920 		bus_space_write_1(iot, ioh, FE_BMPR17, FE_B17_DATA);
1921 		FE_EEPROM_DELAY();
1922 		bus_space_write_1(iot, ioh,
1923 		    FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK);
1924 		FE_EEPROM_DELAY();
1925 		bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT);
1926 
1927 		/* Send read command and read address. */
1928 		op = 0x80 | addr;	/* READ instruction */
1929 		for (bit = 8; bit > 0; bit--) {
1930 			bus_space_write_1(iot, ioh, FE_BMPR17,
1931 			    (op & (1 << (bit - 1))) ? FE_B17_DATA : 0);
1932 			FE_EEPROM_DELAY();
1933 			bus_space_write_1(iot, ioh,
1934 			    FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK);
1935 			FE_EEPROM_DELAY();
1936 			bus_space_write_1(iot, ioh, FE_BMPR16, FE_B16_SELECT);
1937 		}
1938 		bus_space_write_1(iot, ioh, FE_BMPR17, 0x00);
1939 
1940 		/* Read two bytes in each address */
1941 		val = 0;
1942 		for (bit = 16; bit > 0; bit--) {
1943 			FE_EEPROM_DELAY();
1944 			bus_space_write_1(iot, ioh,
1945 			    FE_BMPR16, FE_B16_SELECT | FE_B16_CLOCK);
1946 			FE_EEPROM_DELAY();
1947 			if (bus_space_read_1(iot, ioh, FE_BMPR17) &
1948 			    FE_B17_DATA)
1949 				val |= 1 << (bit - 1);
1950 			bus_space_write_1(iot, ioh,
1951 			    FE_BMPR16, FE_B16_SELECT);
1952 		}
1953 		data[addr * 2]     = val >> 8;
1954 		data[addr * 2 + 1] = val & 0xff;
1955 	}
1956 
1957 	/* Make sure the EEPROM is turned off. */
1958 	bus_space_write_1(iot, ioh, FE_BMPR16, 0);
1959 	bus_space_write_1(iot, ioh, FE_BMPR17, 0);
1960 
1961 #if FE_DEBUG >= 3
1962 	/* Report what we got. */
1963 	log(LOG_INFO, "mb86965_read_eeprom: "
1964 	    " %02x%02x%02x%02x %02x%02x%02x%02x -"
1965 	    " %02x%02x%02x%02x %02x%02x%02x%02x -"
1966 	    " %02x%02x%02x%02x %02x%02x%02x%02x -"
1967 	    " %02x%02x%02x%02x %02x%02x%02x%02x\n",
1968 	    data[ 0], data[ 1], data[ 2], data[ 3],
1969 	    data[ 4], data[ 5], data[ 6], data[ 7],
1970 	    data[ 8], data[ 9], data[10], data[11],
1971 	    data[12], data[13], data[14], data[15],
1972 	    data[16], data[17], data[18], data[19],
1973 	    data[20], data[21], data[22], data[23],
1974 	    data[24], data[25], data[26], data[27],
1975 	    data[28], data[29], data[30], data[31]);
1976 #endif
1977 }
1978 
1979 #if FE_DEBUG >= 1
1980 void
1981 mb86960_dump(level, sc)
1982 	int level;
1983 	struct mb86960_softc *sc;
1984 {
1985 	bus_space_tag_t bst = sc->sc_bst;
1986 	bus_space_handle_t bsh = sc->sc_bsh;
1987 	u_int8_t save_dlcr7;
1988 
1989 	save_dlcr7 = bus_space_read_1(bst, bsh, FE_DLCR7);
1990 
1991 	log(level, "\tDLCR = %02x %02x %02x %02x %02x %02x %02x %02x\n",
1992 	    bus_space_read_1(bst, bsh, FE_DLCR0),
1993 	    bus_space_read_1(bst, bsh, FE_DLCR1),
1994 	    bus_space_read_1(bst, bsh, FE_DLCR2),
1995 	    bus_space_read_1(bst, bsh, FE_DLCR3),
1996 	    bus_space_read_1(bst, bsh, FE_DLCR4),
1997 	    bus_space_read_1(bst, bsh, FE_DLCR5),
1998 	    bus_space_read_1(bst, bsh, FE_DLCR6),
1999 	    bus_space_read_1(bst, bsh, FE_DLCR7));
2000 
2001 	bus_space_write_1(bst, bsh, FE_DLCR7,
2002 	    (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_DLCR);
2003 	log(level, "\t       %02x %02x %02x %02x %02x %02x %02x %02x\n",
2004 	    bus_space_read_1(bst, bsh, FE_DLCR8),
2005 	    bus_space_read_1(bst, bsh, FE_DLCR9),
2006 	    bus_space_read_1(bst, bsh, FE_DLCR10),
2007 	    bus_space_read_1(bst, bsh, FE_DLCR11),
2008 	    bus_space_read_1(bst, bsh, FE_DLCR12),
2009 	    bus_space_read_1(bst, bsh, FE_DLCR13),
2010 	    bus_space_read_1(bst, bsh, FE_DLCR14),
2011 	    bus_space_read_1(bst, bsh, FE_DLCR15));
2012 
2013 	bus_space_write_1(bst, bsh, FE_DLCR7,
2014 	    (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_MAR);
2015 	log(level, "\tMAR  = %02x %02x %02x %02x %02x %02x %02x %02x\n",
2016 	    bus_space_read_1(bst, bsh, FE_MAR8),
2017 	    bus_space_read_1(bst, bsh, FE_MAR9),
2018 	    bus_space_read_1(bst, bsh, FE_MAR10),
2019 	    bus_space_read_1(bst, bsh, FE_MAR11),
2020 	    bus_space_read_1(bst, bsh, FE_MAR12),
2021 	    bus_space_read_1(bst, bsh, FE_MAR13),
2022 	    bus_space_read_1(bst, bsh, FE_MAR14),
2023 	    bus_space_read_1(bst, bsh, FE_MAR15));
2024 
2025 	bus_space_write_1(bst, bsh, FE_DLCR7,
2026 	    (save_dlcr7 & ~FE_D7_RBS) | FE_D7_RBS_BMPR);
2027 	log(level,
2028 	    "\tBMPR = xx xx %02x %02x %02x %02x %02x %02x %02x %02x xx %02x\n",
2029 	    bus_space_read_1(bst, bsh, FE_BMPR10),
2030 	    bus_space_read_1(bst, bsh, FE_BMPR11),
2031 	    bus_space_read_1(bst, bsh, FE_BMPR12),
2032 	    bus_space_read_1(bst, bsh, FE_BMPR13),
2033 	    bus_space_read_1(bst, bsh, FE_BMPR14),
2034 	    bus_space_read_1(bst, bsh, FE_BMPR15),
2035 	    bus_space_read_1(bst, bsh, FE_BMPR16),
2036 	    bus_space_read_1(bst, bsh, FE_BMPR17),
2037 	    bus_space_read_1(bst, bsh, FE_BMPR19));
2038 
2039 	bus_space_write_1(bst, bsh, FE_DLCR7, save_dlcr7);
2040 }
2041 #endif
2042 
2043