1 /* $NetBSD: mb89352.c,v 1.13 2002/05/30 21:10:36 thorpej Exp $ */ 2 /* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */ 3 4 /*- 5 * Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Charles M. Hannum. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * Copyright (c) 1994 Jarle Greipsland 26 * All rights reserved. 27 * 28 * Redistribution and use in source and binary forms, with or without 29 * modification, are permitted provided that the following conditions 30 * are met: 31 * 1. Redistributions of source code must retain the above copyright 32 * notice, this list of conditions and the following disclaimer. 33 * 2. Redistributions in binary form must reproduce the above copyright 34 * notice, this list of conditions and the following disclaimer in the 35 * documentation and/or other materials provided with the distribution. 36 * 3. The name of the author may not be used to endorse or promote products 37 * derived from this software without specific prior written permission. 38 * 39 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 40 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 41 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 42 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 43 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 44 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 45 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 47 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 48 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 49 * POSSIBILITY OF SUCH DAMAGE. 50 */ 51 /* 52 * [NetBSD for NEC PC-98 series] 53 * Copyright (c) 1996, 1997, 1998 54 * NetBSD/pc98 porting staff. All rights reserved. 55 * Copyright (c) 1996, 1997, 1998 56 * Kouichi Matsuda. All rights reserved. 57 */ 58 59 /* 60 * Acknowledgements: Many of the algorithms used in this driver are 61 * inspired by the work of Julian Elischer (julian@tfs.com) and 62 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! 63 */ 64 65 /* TODO list: 66 * 1) Get the DMA stuff working. 67 * 2) Get the iov/uio stuff working. Is this a good thing ??? 68 * 3) Get the synch stuff working. 69 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.? 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: mb89352.c,v 1.13 2002/05/30 21:10:36 thorpej Exp $"); 74 75 #ifdef DDB 76 #define integrate 77 #else 78 #define integrate __inline static 79 #endif 80 81 /* 82 * A few customizable items: 83 */ 84 85 /* Use doubleword transfers to/from SCSI chip. Note: This requires 86 * motherboard support. Basicly, some motherboard chipsets are able to 87 * split a 32 bit I/O operation into two 16 bit I/O operations, 88 * transparently to the processor. This speeds up some things, notably long 89 * data transfers. 90 */ 91 #define SPC_USE_DWORDS 0 92 93 /* Synchronous data transfers? */ 94 #define SPC_USE_SYNCHRONOUS 0 95 #define SPC_SYNC_REQ_ACK_OFS 8 96 97 /* Wide data transfers? */ 98 #define SPC_USE_WIDE 0 99 #define SPC_MAX_WIDTH 0 100 101 /* Max attempts made to transmit a message */ 102 #define SPC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */ 103 104 /* 105 * Some spin loop parameters (essentially how long to wait some places) 106 * The problem(?) is that sometimes we expect either to be able to transmit a 107 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid 108 * returning from the interrupt just to get yanked back for the next byte we 109 * may spin in the interrupt routine waiting for this byte to come. How long? 110 * This is really (SCSI) device and processor dependent. Tuneable, I guess. 111 */ 112 #define SPC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */ 113 #define SPC_MSGOUT_SPIN 1 114 115 /* Include debug functions? At the end of this file there are a bunch of 116 * functions that will print out various information regarding queued SCSI 117 * commands, driver state and chip contents. You can call them from the 118 * kernel debugger. If you set SPC_DEBUG to 0 they are not included (the 119 * kernel uses less memory) but you lose the debugging facilities. 120 */ 121 #define SPC_DEBUG 1 122 123 #define SPC_ABORT_TIMEOUT 2000 /* time to wait for abort */ 124 125 /* End of customizable parameters */ 126 127 /* 128 * MB89352 SCSI Protocol Controller (SPC) routines. 129 */ 130 131 #include "opt_ddb.h" 132 133 #include <sys/param.h> 134 #include <sys/systm.h> 135 #include <sys/kernel.h> 136 #include <sys/errno.h> 137 #include <sys/ioctl.h> 138 #include <sys/device.h> 139 #include <sys/buf.h> 140 #include <sys/proc.h> 141 #include <sys/user.h> 142 #include <sys/queue.h> 143 144 #include <machine/intr.h> 145 #include <machine/bus.h> 146 147 #include <dev/scsipi/scsi_all.h> 148 #include <dev/scsipi/scsipi_all.h> 149 #include <dev/scsipi/scsi_message.h> 150 #include <dev/scsipi/scsiconf.h> 151 152 #include <dev/ic/mb89352reg.h> 153 #include <dev/ic/mb89352var.h> 154 155 #ifndef DDB 156 #define Debugger() panic("should call debugger here (mb89352.c)") 157 #endif /* ! DDB */ 158 159 #if SPC_DEBUG 160 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */ 161 #endif 162 163 void spc_minphys __P((struct buf *)); 164 void spc_done __P((struct spc_softc *, struct spc_acb *)); 165 void spc_dequeue __P((struct spc_softc *, struct spc_acb *)); 166 void spc_scsipi_request __P((struct scsipi_channel *, 167 scsipi_adapter_req_t, void *)); 168 int spc_poll __P((struct spc_softc *, struct scsipi_xfer *, int)); 169 integrate void spc_sched_msgout __P((struct spc_softc *, u_char)); 170 integrate void spc_setsync __P((struct spc_softc *, struct spc_tinfo *)); 171 void spc_select __P((struct spc_softc *, struct spc_acb *)); 172 void spc_timeout __P((void *)); 173 void spc_scsi_reset __P((struct spc_softc *)); 174 void spc_reset __P((struct spc_softc *)); 175 void spc_free_acb __P((struct spc_softc *, struct spc_acb *, int)); 176 struct spc_acb* spc_get_acb __P((struct spc_softc *)); 177 int spc_reselect __P((struct spc_softc *, int)); 178 void spc_msgin __P((struct spc_softc *)); 179 void spc_abort __P((struct spc_softc *, struct spc_acb *)); 180 void spc_msgout __P((struct spc_softc *)); 181 int spc_dataout_pio __P((struct spc_softc *, u_char *, int)); 182 int spc_datain_pio __P((struct spc_softc *, u_char *, int)); 183 #if SPC_DEBUG 184 void spc_print_acb __P((struct spc_acb *)); 185 void spc_dump_driver __P((struct spc_softc *)); 186 void spc_dump89352 __P((struct spc_softc *)); 187 void spc_show_scsi_cmd __P((struct spc_acb *)); 188 void spc_print_active_acb __P((void)); 189 #endif 190 191 extern struct cfdriver spc_cd; 192 193 194 /* 195 * INITIALIZATION ROUTINES (probe, attach ++) 196 */ 197 198 /* 199 * Do the real search-for-device. 200 * Prerequisite: sc->sc_iobase should be set to the proper value 201 */ 202 int 203 spc_find(iot, ioh, bdid) 204 bus_space_tag_t iot; 205 bus_space_handle_t ioh; 206 int bdid; 207 { 208 long timeout = SPC_ABORT_TIMEOUT; 209 210 SPC_TRACE(("spc: probing for spc-chip\n")); 211 /* 212 * Disable interrupts then reset the FUJITSU chip. 213 */ 214 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST); 215 bus_space_write_1(iot, ioh, SCMD, 0); 216 bus_space_write_1(iot, ioh, PCTL, 0); 217 bus_space_write_1(iot, ioh, TEMP, 0); 218 bus_space_write_1(iot, ioh, TCH, 0); 219 bus_space_write_1(iot, ioh, TCM, 0); 220 bus_space_write_1(iot, ioh, TCL, 0); 221 bus_space_write_1(iot, ioh, INTS, 0); 222 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB); 223 bus_space_write_1(iot, ioh, BDID, bdid); 224 delay(400); 225 bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE); 226 227 /* The following detection is derived from spc.c 228 * (by Takahide Matsutsuka) in FreeBSD/pccard-test. 229 */ 230 while (bus_space_read_1(iot, ioh, PSNS) && timeout) 231 timeout--; 232 if (!timeout) { 233 printf("spc: find failed\n"); 234 return 0; 235 } 236 237 SPC_START(("SPC found")); 238 return 1; 239 } 240 241 void 242 spcattach(sc) 243 struct spc_softc *sc; 244 { 245 246 SPC_TRACE(("spcattach ")); 247 sc->sc_state = SPC_INIT; 248 249 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */ 250 251 #if SPC_USE_SYNCHRONOUS 252 /* 253 * These are the bounds of the sync period, based on the frequency of 254 * the chip's clock input and the size and offset of the sync period 255 * register. 256 * 257 * For a 20Mhz clock, this gives us 25, or 100nS, or 10MB/s, as a 258 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a 259 * minimum transfer rate. 260 */ 261 sc->sc_minsync = (2 * 250) / sc->sc_freq; 262 sc->sc_maxsync = (9 * 250) / sc->sc_freq; 263 #endif 264 265 spc_init(sc); /* Init chip and driver */ 266 267 /* 268 * Fill in the adapter. 269 */ 270 sc->sc_adapter.adapt_dev = &sc->sc_dev; 271 sc->sc_adapter.adapt_nchannels = 1; 272 sc->sc_adapter.adapt_openings = 7; 273 sc->sc_adapter.adapt_max_periph = 1; 274 sc->sc_adapter.adapt_minphys = spc_minphys; 275 sc->sc_adapter.adapt_request = spc_scsipi_request; 276 277 sc->sc_channel.chan_adapter = &sc->sc_adapter; 278 sc->sc_channel.chan_bustype = &scsi_bustype; 279 sc->sc_channel.chan_channel = 0; 280 sc->sc_channel.chan_ntargets = 8; 281 sc->sc_channel.chan_nluns = 8; 282 sc->sc_channel.chan_id = sc->sc_initiator; 283 284 /* 285 * ask the adapter what subunits are present 286 */ 287 config_found((struct device*)sc, &sc->sc_channel, scsiprint); 288 } 289 290 /* 291 * Initialize MB89352 chip itself 292 * The following conditions should hold: 293 * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc 294 * must be valid. 295 */ 296 void 297 spc_reset(sc) 298 struct spc_softc *sc; 299 { 300 bus_space_tag_t iot = sc->sc_iot; 301 bus_space_handle_t ioh = sc->sc_ioh; 302 303 SPC_TRACE(("spc_reset ")); 304 /* 305 * Disable interrupts then reset the FUJITSU chip. 306 */ 307 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST); 308 bus_space_write_1(iot, ioh, SCMD, 0); 309 bus_space_write_1(iot, ioh, PCTL, 0); 310 bus_space_write_1(iot, ioh, TEMP, 0); 311 bus_space_write_1(iot, ioh, TCH, 0); 312 bus_space_write_1(iot, ioh, TCM, 0); 313 bus_space_write_1(iot, ioh, TCL, 0); 314 bus_space_write_1(iot, ioh, INTS, 0); 315 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB); 316 bus_space_write_1(iot, ioh, BDID, sc->sc_initiator); 317 delay(400); 318 bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE); 319 } 320 321 322 /* 323 * Pull the SCSI RST line for 500us. 324 */ 325 void 326 spc_scsi_reset(sc) 327 struct spc_softc *sc; 328 { 329 bus_space_tag_t iot = sc->sc_iot; 330 bus_space_handle_t ioh = sc->sc_ioh; 331 332 SPC_TRACE(("spc_scsi_reset ")); 333 bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) | SCMD_RST); 334 delay(500); 335 bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST); 336 delay(50); 337 } 338 339 /* 340 * Initialize spc SCSI driver. 341 */ 342 void 343 spc_init(sc) 344 struct spc_softc *sc; 345 { 346 struct spc_acb *acb; 347 int r; 348 349 SPC_TRACE(("spc_init ")); 350 spc_reset(sc); 351 spc_scsi_reset(sc); 352 spc_reset(sc); 353 354 if (sc->sc_state == SPC_INIT) { 355 /* First time through; initialize. */ 356 TAILQ_INIT(&sc->ready_list); 357 TAILQ_INIT(&sc->nexus_list); 358 TAILQ_INIT(&sc->free_list); 359 sc->sc_nexus = NULL; 360 acb = sc->sc_acb; 361 memset(acb, 0, sizeof(sc->sc_acb)); 362 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) { 363 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain); 364 acb++; 365 } 366 memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 367 } else { 368 /* Cancel any active commands. */ 369 sc->sc_state = SPC_CLEANING; 370 if ((acb = sc->sc_nexus) != NULL) { 371 acb->xs->error = XS_DRIVER_STUFFUP; 372 callout_stop(&acb->xs->xs_callout); 373 spc_done(sc, acb); 374 } 375 while ((acb = sc->nexus_list.tqh_first) != NULL) { 376 acb->xs->error = XS_DRIVER_STUFFUP; 377 callout_stop(&acb->xs->xs_callout); 378 spc_done(sc, acb); 379 } 380 } 381 382 sc->sc_prevphase = PH_INVALID; 383 for (r = 0; r < 8; r++) { 384 struct spc_tinfo *ti = &sc->sc_tinfo[r]; 385 386 ti->flags = 0; 387 #if SPC_USE_SYNCHRONOUS 388 ti->flags |= DO_SYNC; 389 ti->period = sc->sc_minsync; 390 ti->offset = SPC_SYNC_REQ_ACK_OFS; 391 #else 392 ti->period = ti->offset = 0; 393 #endif 394 #if SPC_USE_WIDE 395 ti->flags |= DO_WIDE; 396 ti->width = SPC_MAX_WIDTH; 397 #else 398 ti->width = 0; 399 #endif 400 } 401 402 sc->sc_state = SPC_IDLE; 403 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL, 404 bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB); 405 } 406 407 void 408 spc_free_acb(sc, acb, flags) 409 struct spc_softc *sc; 410 struct spc_acb *acb; 411 int flags; 412 { 413 int s; 414 415 SPC_TRACE(("spc_free_acb ")); 416 s = splbio(); 417 418 acb->flags = 0; 419 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain); 420 splx(s); 421 } 422 423 struct spc_acb * 424 spc_get_acb(sc) 425 struct spc_softc *sc; 426 { 427 struct spc_acb *acb; 428 int s; 429 430 SPC_TRACE(("spc_get_acb ")); 431 s = splbio(); 432 acb = TAILQ_FIRST(&sc->free_list); 433 if (acb != NULL) { 434 TAILQ_REMOVE(&sc->free_list, acb, chain); 435 acb->flags |= ACB_ALLOC; 436 } 437 splx(s); 438 return acb; 439 } 440 441 /* 442 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 443 */ 444 445 /* 446 * Expected sequence: 447 * 1) Command inserted into ready list 448 * 2) Command selected for execution 449 * 3) Command won arbitration and has selected target device 450 * 4) Send message out (identify message, eventually also sync.negotiations) 451 * 5) Send command 452 * 5a) Receive disconnect message, disconnect. 453 * 5b) Reselected by target 454 * 5c) Receive identify message from target. 455 * 6) Send or receive data 456 * 7) Receive status 457 * 8) Receive message (command complete etc.) 458 */ 459 460 /* 461 * Start a SCSI-command 462 * This function is called by the higher level SCSI-driver to queue/run 463 * SCSI-commands. 464 */ 465 void 466 spc_scsipi_request(chan, req, arg) 467 struct scsipi_channel *chan; 468 scsipi_adapter_req_t req; 469 void *arg; 470 { 471 struct scsipi_xfer *xs; 472 struct scsipi_periph *periph; 473 struct spc_softc *sc = (void *)chan->chan_adapter->adapt_dev; 474 struct spc_acb *acb; 475 int s, flags; 476 477 switch (req) { 478 case ADAPTER_REQ_RUN_XFER: 479 xs = arg; 480 periph = xs->xs_periph; 481 SPC_TRACE(("spc_scsipi_request ")); 482 SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 483 periph->periph_target)); 484 485 flags = xs->xs_control; 486 if ((acb = spc_get_acb(sc)) == NULL) { 487 xs->error = XS_DRIVER_STUFFUP; 488 scsipi_done(xs); 489 return; 490 } 491 492 /* Initialize acb */ 493 acb->xs = xs; 494 acb->timeout = xs->timeout; 495 496 if (xs->xs_control & XS_CTL_RESET) { 497 acb->flags |= ACB_RESET; 498 acb->scsipi_cmd_length = 0; 499 acb->data_length = 0; 500 } else { 501 memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen); 502 #if 1 503 acb->scsipi_cmd.bytes[0] |= periph->periph_lun << 5; /* XXX? */ 504 #endif 505 acb->scsipi_cmd_length = xs->cmdlen; 506 acb->data_addr = xs->data; 507 acb->data_length = xs->datalen; 508 } 509 acb->target_stat = 0; 510 511 s = splbio(); 512 513 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain); 514 /* 515 * Start scheduling unless a queue process is in progress. 516 */ 517 if (sc->sc_state == SPC_IDLE) 518 spc_sched(sc); 519 /* 520 * After successful sending, check if we should return just now. 521 * If so, return SUCCESSFULLY_QUEUED. 522 */ 523 524 splx(s); 525 526 if ((flags & XS_CTL_POLL) == 0) 527 return; 528 529 /* Not allowed to use interrupts, use polling instead */ 530 s = splbio(); 531 if (spc_poll(sc, xs, acb->timeout)) { 532 spc_timeout(acb); 533 if (spc_poll(sc, xs, acb->timeout)) 534 spc_timeout(acb); 535 } 536 splx(s); 537 return; 538 case ADAPTER_REQ_GROW_RESOURCES: 539 /* XXX Not supported. */ 540 return; 541 case ADAPTER_REQ_SET_XFER_MODE: 542 /* XXX Not supported. */ 543 return; 544 } 545 } 546 547 /* 548 * Adjust transfer size in buffer structure 549 */ 550 void 551 spc_minphys(bp) 552 struct buf *bp; 553 { 554 555 SPC_TRACE(("spc_minphys ")); 556 minphys(bp); 557 } 558 559 /* 560 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 561 */ 562 int 563 spc_poll(sc, xs, count) 564 struct spc_softc *sc; 565 struct scsipi_xfer *xs; 566 int count; 567 { 568 bus_space_tag_t iot = sc->sc_iot; 569 bus_space_handle_t ioh = sc->sc_ioh; 570 571 SPC_TRACE(("spc_poll ")); 572 while (count) { 573 /* 574 * If we had interrupts enabled, would we 575 * have got an interrupt? 576 */ 577 if (bus_space_read_1(iot, ioh, INTS) != 0) 578 spcintr(sc); 579 if ((xs->xs_status & XS_STS_DONE) != 0) 580 return 0; 581 delay(1000); 582 count--; 583 } 584 return 1; 585 } 586 587 /* 588 * LOW LEVEL SCSI UTILITIES 589 */ 590 591 integrate void 592 spc_sched_msgout(sc, m) 593 struct spc_softc *sc; 594 u_char m; 595 { 596 bus_space_tag_t iot = sc->sc_iot; 597 bus_space_handle_t ioh = sc->sc_ioh; 598 599 SPC_TRACE(("spc_sched_msgout ")); 600 if (sc->sc_msgpriq == 0) 601 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 602 sc->sc_msgpriq |= m; 603 } 604 605 /* 606 * Set synchronous transfer offset and period. 607 */ 608 integrate void 609 spc_setsync(sc, ti) 610 struct spc_softc *sc; 611 struct spc_tinfo *ti; 612 { 613 #if SPC_USE_SYNCHRONOUS 614 bus_space_tag_t iot = sc->sc_iot; 615 bus_space_handle_t ioh = sc->sc_ioh; 616 617 SPC_TRACE(("spc_setsync ")); 618 if (ti->offset != 0) 619 bus_space_write_1(iot, ioh, TMOD, 620 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset); 621 else 622 bus_space_write_1(iot, ioh, TMOD, 0); 623 #endif 624 } 625 626 /* 627 * Start a selection. This is used by spc_sched() to select an idle target. 628 */ 629 void 630 spc_select(sc, acb) 631 struct spc_softc *sc; 632 struct spc_acb *acb; 633 { 634 struct scsipi_periph *periph = acb->xs->xs_periph; 635 int target = periph->periph_target; 636 struct spc_tinfo *ti = &sc->sc_tinfo[target]; 637 bus_space_tag_t iot = sc->sc_iot; 638 bus_space_handle_t ioh = sc->sc_ioh; 639 640 SPC_TRACE(("spc_select ")); 641 spc_setsync(sc, ti); 642 643 #if 0 644 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 645 #endif 646 #ifdef x68k /* XXX? */ 647 do { 648 asm ("nop"); 649 } while (bus_space_read_1(iot, ioh, SSTS) & 650 (SSTS_ACTIVE|SSTS_TARGET|SSTS_BUSY)); 651 #endif 652 653 bus_space_write_1(iot, ioh, PCTL, 0); 654 bus_space_write_1(iot, ioh, TEMP, (1 << sc->sc_initiator) | (1 << target)); 655 /* 656 * Setup BSY timeout (selection timeout). 657 * 250ms according to the SCSI specification. 658 * T = (X * 256 + 15) * Tclf * 2 (Tclf = 200ns on x68k) 659 * To setup 256ms timeout, 660 * 128000ns/200ns = X * 256 + 15 661 * 640 - 15 = X * 256 662 * X = 625 / 256 663 * X = 2 + 113 / 256 664 * ==> tch = 2, tcm = 113 (correct?) 665 */ 666 bus_space_write_1(iot, ioh, TCH, 2); 667 bus_space_write_1(iot, ioh, TCM, 113); 668 /* Time to the information transfer phase start. */ 669 bus_space_write_1(iot, ioh, TCL, 3); 670 bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT); 671 672 sc->sc_state = SPC_SELECTING; 673 } 674 675 int 676 spc_reselect(sc, message) 677 struct spc_softc *sc; 678 int message; 679 { 680 u_char selid, target, lun; 681 struct spc_acb *acb; 682 struct scsipi_periph *periph; 683 struct spc_tinfo *ti; 684 685 SPC_TRACE(("spc_reselect ")); 686 /* 687 * The SCSI chip made a snapshot of the data bus while the reselection 688 * was being negotiated. This enables us to determine which target did 689 * the reselect. 690 */ 691 selid = sc->sc_selid & ~(1 << sc->sc_initiator); 692 if (selid & (selid - 1)) { 693 printf("%s: reselect with invalid selid %02x; sending DEVICE RESET\n", 694 sc->sc_dev.dv_xname, selid); 695 SPC_BREAK(); 696 goto reset; 697 } 698 699 /* 700 * Search wait queue for disconnected cmd 701 * The list should be short, so I haven't bothered with 702 * any more sophisticated structures than a simple 703 * singly linked list. 704 */ 705 target = ffs(selid) - 1; 706 lun = message & 0x07; 707 for (acb = sc->nexus_list.tqh_first; acb != NULL; 708 acb = acb->chain.tqe_next) { 709 periph = acb->xs->xs_periph; 710 if (periph->periph_target == target && 711 periph->periph_lun == lun) 712 break; 713 } 714 if (acb == NULL) { 715 printf("%s: reselect from target %d lun %d with no nexus; sending ABORT\n", 716 sc->sc_dev.dv_xname, target, lun); 717 SPC_BREAK(); 718 goto abort; 719 } 720 721 /* Make this nexus active again. */ 722 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 723 sc->sc_state = SPC_CONNECTED; 724 sc->sc_nexus = acb; 725 ti = &sc->sc_tinfo[target]; 726 ti->lubusy |= (1 << lun); 727 spc_setsync(sc, ti); 728 729 if (acb->flags & ACB_RESET) 730 spc_sched_msgout(sc, SEND_DEV_RESET); 731 else if (acb->flags & ACB_ABORT) 732 spc_sched_msgout(sc, SEND_ABORT); 733 734 /* Do an implicit RESTORE POINTERS. */ 735 sc->sc_dp = acb->data_addr; 736 sc->sc_dleft = acb->data_length; 737 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 738 sc->sc_cleft = acb->scsipi_cmd_length; 739 740 return (0); 741 742 reset: 743 spc_sched_msgout(sc, SEND_DEV_RESET); 744 return (1); 745 746 abort: 747 spc_sched_msgout(sc, SEND_ABORT); 748 return (1); 749 } 750 751 /* 752 * Schedule a SCSI operation. This has now been pulled out of the interrupt 753 * handler so that we may call it from spc_scsi_cmd and spc_done. This may 754 * save us an unecessary interrupt just to get things going. Should only be 755 * called when state == SPC_IDLE and at bio pl. 756 */ 757 void 758 spc_sched(sc) 759 struct spc_softc *sc; 760 { 761 struct spc_acb *acb; 762 struct scsipi_periph *periph; 763 struct spc_tinfo *ti; 764 765 /* missing the hw, just return and wait for our hw */ 766 if (sc->sc_flags & SPC_INACTIVE) 767 return; 768 SPC_TRACE(("spc_sched ")); 769 /* 770 * Find first acb in ready queue that is for a target/lunit pair that 771 * is not busy. 772 */ 773 for (acb = sc->ready_list.tqh_first; acb != NULL; 774 acb = acb->chain.tqe_next) { 775 periph = acb->xs->xs_periph; 776 ti = &sc->sc_tinfo[periph->periph_target]; 777 if ((ti->lubusy & (1 << periph->periph_lun)) == 0) { 778 SPC_MISC(("selecting %d:%d ", 779 periph->periph_target, periph->periph_lun)); 780 TAILQ_REMOVE(&sc->ready_list, acb, chain); 781 sc->sc_nexus = acb; 782 spc_select(sc, acb); 783 return; 784 } else 785 SPC_MISC(("%d:%d busy\n", 786 periph->periph_target, periph->periph_lun)); 787 } 788 SPC_MISC(("idle ")); 789 /* Nothing to start; just enable reselections and wait. */ 790 } 791 792 /* 793 * POST PROCESSING OF SCSI_CMD (usually current) 794 */ 795 void 796 spc_done(sc, acb) 797 struct spc_softc *sc; 798 struct spc_acb *acb; 799 { 800 struct scsipi_xfer *xs = acb->xs; 801 struct scsipi_periph *periph = xs->xs_periph; 802 struct spc_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 803 804 SPC_TRACE(("spc_done ")); 805 806 if (xs->error == XS_NOERROR) { 807 if (acb->flags & ACB_ABORT) { 808 xs->error = XS_DRIVER_STUFFUP; 809 } else { 810 switch (acb->target_stat) { 811 case SCSI_CHECK: 812 /* First, save the return values */ 813 xs->resid = acb->data_length; 814 /* FALLBACK */ 815 case SCSI_BUSY: 816 xs->status = acb->target_stat; 817 xs->error = XS_BUSY; 818 break; 819 case SCSI_OK: 820 xs->resid = acb->data_length; 821 break; 822 default: 823 xs->error = XS_DRIVER_STUFFUP; 824 #if SPC_DEBUG 825 printf("%s: spc_done: bad stat 0x%x\n", 826 sc->sc_dev.dv_xname, acb->target_stat); 827 #endif 828 break; 829 } 830 } 831 } 832 833 #if SPC_DEBUG 834 if ((spc_debug & SPC_SHOWMISC) != 0) { 835 if (xs->resid != 0) 836 printf("resid=%d ", xs->resid); 837 else 838 printf("error=%d\n", xs->error); 839 } 840 #endif 841 842 /* 843 * Remove the ACB from whatever queue it happens to be on. 844 */ 845 if (acb->flags & ACB_NEXUS) 846 ti->lubusy &= ~(1 << periph->periph_lun); 847 if (acb == sc->sc_nexus) { 848 sc->sc_nexus = NULL; 849 sc->sc_state = SPC_IDLE; 850 spc_sched(sc); 851 } else 852 spc_dequeue(sc, acb); 853 854 spc_free_acb(sc, acb, xs->xs_control); 855 ti->cmds++; 856 scsipi_done(xs); 857 } 858 859 void 860 spc_dequeue(sc, acb) 861 struct spc_softc *sc; 862 struct spc_acb *acb; 863 { 864 865 SPC_TRACE(("spc_dequeue ")); 866 if (acb->flags & ACB_NEXUS) { 867 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 868 } else { 869 TAILQ_REMOVE(&sc->ready_list, acb, chain); 870 } 871 } 872 873 /* 874 * INTERRUPT/PROTOCOL ENGINE 875 */ 876 877 /* 878 * Precondition: 879 * The SCSI bus is already in the MSGI phase and there is a message byte 880 * on the bus, along with an asserted REQ signal. 881 */ 882 void 883 spc_msgin(sc) 884 struct spc_softc *sc; 885 { 886 bus_space_tag_t iot = sc->sc_iot; 887 bus_space_handle_t ioh = sc->sc_ioh; 888 int n; 889 890 SPC_TRACE(("spc_msgin ")); 891 892 if (sc->sc_prevphase == PH_MSGIN) { 893 /* This is a continuation of the previous message. */ 894 n = sc->sc_imp - sc->sc_imess; 895 goto nextbyte; 896 } 897 898 /* This is a new MESSAGE IN phase. Clean up our state. */ 899 sc->sc_flags &= ~SPC_DROP_MSGIN; 900 901 nextmsg: 902 n = 0; 903 sc->sc_imp = &sc->sc_imess[n]; 904 905 nextbyte: 906 /* 907 * Read a whole message, but don't ack the last byte. If we reject the 908 * message, we have to assert ATN during the message transfer phase 909 * itself. 910 */ 911 for (;;) { 912 #if 0 913 for (;;) { 914 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 915 break; 916 /* Wait for REQINIT. XXX Need timeout. */ 917 } 918 #endif 919 if (bus_space_read_1(iot, ioh, INTS) != 0) { 920 /* 921 * Target left MESSAGE IN, probably because it 922 * a) noticed our ATN signal, or 923 * b) ran out of messages. 924 */ 925 goto out; 926 } 927 928 /* If parity error, just dump everything on the floor. */ 929 if ((bus_space_read_1(iot, ioh, SERR) & 930 (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) { 931 sc->sc_flags |= SPC_DROP_MSGIN; 932 spc_sched_msgout(sc, SEND_PARITY_ERROR); 933 } 934 935 /* send TRANSFER command. */ 936 bus_space_write_1(iot, ioh, TCH, 0); 937 bus_space_write_1(iot, ioh, TCM, 0); 938 bus_space_write_1(iot, ioh, TCL, 1); 939 bus_space_write_1(iot, ioh, PCTL, 940 sc->sc_phase | PCTL_BFINT_ENAB); 941 #ifdef x68k 942 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* | SCMD_PROG_XFR */ 943 #else 944 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 945 #endif 946 for (;;) { 947 /*if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0 948 && (bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)*/ 949 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) == 0) 950 break; 951 if (bus_space_read_1(iot, ioh, INTS) != 0) 952 goto out; 953 } 954 955 /* Gather incoming message bytes if needed. */ 956 if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) { 957 if (n >= SPC_MAX_MSG_LEN) { 958 (void) bus_space_read_1(iot, ioh, DREG); 959 sc->sc_flags |= SPC_DROP_MSGIN; 960 spc_sched_msgout(sc, SEND_REJECT); 961 } else { 962 *sc->sc_imp++ = bus_space_read_1(iot, ioh, DREG); 963 n++; 964 /* 965 * This testing is suboptimal, but most 966 * messages will be of the one byte variety, so 967 * it should not affect performance 968 * significantly. 969 */ 970 if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0])) 971 break; 972 if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0])) 973 break; 974 if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) && 975 n == sc->sc_imess[1] + 2) 976 break; 977 } 978 } else 979 (void) bus_space_read_1(iot, ioh, DREG); 980 981 /* 982 * If we reach this spot we're either: 983 * a) in the middle of a multi-byte message, or 984 * b) dropping bytes. 985 */ 986 #if 0 987 /* Ack the last byte read. */ 988 /*(void) bus_space_read_1(iot, ioh, DREG);*/ 989 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 990 ; 991 #endif 992 } 993 994 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 995 996 /* We now have a complete message. Parse it. */ 997 switch (sc->sc_state) { 998 struct spc_acb *acb; 999 struct scsipi_periph *periph; 1000 struct spc_tinfo *ti; 1001 1002 case SPC_CONNECTED: 1003 SPC_ASSERT(sc->sc_nexus != NULL); 1004 acb = sc->sc_nexus; 1005 ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target]; 1006 1007 switch (sc->sc_imess[0]) { 1008 case MSG_CMDCOMPLETE: 1009 if (sc->sc_dleft < 0) { 1010 periph = acb->xs->xs_periph; 1011 printf("%s: %d extra bytes from %d:%d\n", 1012 sc->sc_dev.dv_xname, -sc->sc_dleft, 1013 periph->periph_target, periph->periph_lun); 1014 acb->data_length = 0; 1015 } 1016 acb->xs->resid = acb->data_length = sc->sc_dleft; 1017 sc->sc_state = SPC_CMDCOMPLETE; 1018 break; 1019 1020 case MSG_PARITY_ERROR: 1021 /* Resend the last message. */ 1022 spc_sched_msgout(sc, sc->sc_lastmsg); 1023 break; 1024 1025 case MSG_MESSAGE_REJECT: 1026 SPC_MISC(("message rejected %02x ", sc->sc_lastmsg)); 1027 switch (sc->sc_lastmsg) { 1028 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1029 case SEND_IDENTIFY: 1030 ti->flags &= ~(DO_SYNC | DO_WIDE); 1031 ti->period = ti->offset = 0; 1032 spc_setsync(sc, ti); 1033 ti->width = 0; 1034 break; 1035 #endif 1036 #if SPC_USE_SYNCHRONOUS 1037 case SEND_SDTR: 1038 ti->flags &= ~DO_SYNC; 1039 ti->period = ti->offset = 0; 1040 spc_setsync(sc, ti); 1041 break; 1042 #endif 1043 #if SPC_USE_WIDE 1044 case SEND_WDTR: 1045 ti->flags &= ~DO_WIDE; 1046 ti->width = 0; 1047 break; 1048 #endif 1049 case SEND_INIT_DET_ERR: 1050 spc_sched_msgout(sc, SEND_ABORT); 1051 break; 1052 } 1053 break; 1054 1055 case MSG_NOOP: 1056 break; 1057 1058 case MSG_DISCONNECT: 1059 ti->dconns++; 1060 sc->sc_state = SPC_DISCONNECT; 1061 break; 1062 1063 case MSG_SAVEDATAPOINTER: 1064 acb->data_addr = sc->sc_dp; 1065 acb->data_length = sc->sc_dleft; 1066 break; 1067 1068 case MSG_RESTOREPOINTERS: 1069 sc->sc_dp = acb->data_addr; 1070 sc->sc_dleft = acb->data_length; 1071 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 1072 sc->sc_cleft = acb->scsipi_cmd_length; 1073 break; 1074 1075 case MSG_EXTENDED: 1076 switch (sc->sc_imess[2]) { 1077 #if SPC_USE_SYNCHRONOUS 1078 case MSG_EXT_SDTR: 1079 if (sc->sc_imess[1] != 3) 1080 goto reject; 1081 ti->period = sc->sc_imess[3]; 1082 ti->offset = sc->sc_imess[4]; 1083 ti->flags &= ~DO_SYNC; 1084 if (ti->offset == 0) { 1085 } else if (ti->period < sc->sc_minsync || 1086 ti->period > sc->sc_maxsync || 1087 ti->offset > 8) { 1088 ti->period = ti->offset = 0; 1089 spc_sched_msgout(sc, SEND_SDTR); 1090 } else { 1091 scsipi_printaddr(acb->xs->xs_periph); 1092 printf("sync, offset %d, period %dnsec\n", 1093 ti->offset, ti->period * 4); 1094 } 1095 spc_setsync(sc, ti); 1096 break; 1097 #endif 1098 1099 #if SPC_USE_WIDE 1100 case MSG_EXT_WDTR: 1101 if (sc->sc_imess[1] != 2) 1102 goto reject; 1103 ti->width = sc->sc_imess[3]; 1104 ti->flags &= ~DO_WIDE; 1105 if (ti->width == 0) { 1106 } else if (ti->width > SPC_MAX_WIDTH) { 1107 ti->width = 0; 1108 spc_sched_msgout(sc, SEND_WDTR); 1109 } else { 1110 scsipi_printaddr(acb->xs->xs_periph); 1111 printf("wide, width %d\n", 1112 1 << (3 + ti->width)); 1113 } 1114 break; 1115 #endif 1116 1117 default: 1118 printf("%s: unrecognized MESSAGE EXTENDED; sending REJECT\n", 1119 sc->sc_dev.dv_xname); 1120 SPC_BREAK(); 1121 goto reject; 1122 } 1123 break; 1124 1125 default: 1126 printf("%s: unrecognized MESSAGE; sending REJECT\n", 1127 sc->sc_dev.dv_xname); 1128 SPC_BREAK(); 1129 reject: 1130 spc_sched_msgout(sc, SEND_REJECT); 1131 break; 1132 } 1133 break; 1134 1135 case SPC_RESELECTED: 1136 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) { 1137 printf("%s: reselect without IDENTIFY; sending DEVICE RESET\n", 1138 sc->sc_dev.dv_xname); 1139 SPC_BREAK(); 1140 goto reset; 1141 } 1142 1143 (void) spc_reselect(sc, sc->sc_imess[0]); 1144 break; 1145 1146 default: 1147 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1148 sc->sc_dev.dv_xname); 1149 SPC_BREAK(); 1150 reset: 1151 spc_sched_msgout(sc, SEND_DEV_RESET); 1152 break; 1153 1154 #ifdef notdef 1155 abort: 1156 spc_sched_msgout(sc, SEND_ABORT); 1157 break; 1158 #endif 1159 } 1160 1161 /* Ack the last message byte. */ 1162 #if 0 /* XXX? */ 1163 (void) bus_space_read_1(iot, ioh, DREG); 1164 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 1165 ; 1166 #endif 1167 1168 /* Go get the next message, if any. */ 1169 goto nextmsg; 1170 1171 out: 1172 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1173 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1174 } 1175 1176 /* 1177 * Send the highest priority, scheduled message. 1178 */ 1179 void 1180 spc_msgout(sc) 1181 struct spc_softc *sc; 1182 { 1183 bus_space_tag_t iot = sc->sc_iot; 1184 bus_space_handle_t ioh = sc->sc_ioh; 1185 #if SPC_USE_SYNCHRONOUS 1186 struct spc_tinfo *ti; 1187 #endif 1188 int n; 1189 1190 SPC_TRACE(("spc_msgout ")); 1191 1192 if (sc->sc_prevphase == PH_MSGOUT) { 1193 if (sc->sc_omp == sc->sc_omess) { 1194 /* 1195 * This is a retransmission. 1196 * 1197 * We get here if the target stayed in MESSAGE OUT 1198 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates 1199 * that all of the previously transmitted messages must 1200 * be sent again, in the same order. Therefore, we 1201 * requeue all the previously transmitted messages, and 1202 * start again from the top. Our simple priority 1203 * scheme keeps the messages in the right order. 1204 */ 1205 SPC_MISC(("retransmitting ")); 1206 sc->sc_msgpriq |= sc->sc_msgoutq; 1207 /* 1208 * Set ATN. If we're just sending a trivial 1-byte 1209 * message, we'll clear ATN later on anyway. 1210 */ 1211 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); /* XXX? */ 1212 } else { 1213 /* This is a continuation of the previous message. */ 1214 n = sc->sc_omp - sc->sc_omess; 1215 goto nextbyte; 1216 } 1217 } 1218 1219 /* No messages transmitted so far. */ 1220 sc->sc_msgoutq = 0; 1221 sc->sc_lastmsg = 0; 1222 1223 nextmsg: 1224 /* Pick up highest priority message. */ 1225 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq; 1226 sc->sc_msgpriq &= ~sc->sc_currmsg; 1227 sc->sc_msgoutq |= sc->sc_currmsg; 1228 1229 /* Build the outgoing message data. */ 1230 switch (sc->sc_currmsg) { 1231 case SEND_IDENTIFY: 1232 SPC_ASSERT(sc->sc_nexus != NULL); 1233 sc->sc_omess[0] = 1234 MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1); 1235 n = 1; 1236 break; 1237 1238 #if SPC_USE_SYNCHRONOUS 1239 case SEND_SDTR: 1240 SPC_ASSERT(sc->sc_nexus != NULL); 1241 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; 1242 sc->sc_omess[4] = MSG_EXTENDED; 1243 sc->sc_omess[3] = 3; 1244 sc->sc_omess[2] = MSG_EXT_SDTR; 1245 sc->sc_omess[1] = ti->period >> 2; 1246 sc->sc_omess[0] = ti->offset; 1247 n = 5; 1248 break; 1249 #endif 1250 1251 #if SPC_USE_WIDE 1252 case SEND_WDTR: 1253 SPC_ASSERT(sc->sc_nexus != NULL); 1254 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; 1255 sc->sc_omess[3] = MSG_EXTENDED; 1256 sc->sc_omess[2] = 2; 1257 sc->sc_omess[1] = MSG_EXT_WDTR; 1258 sc->sc_omess[0] = ti->width; 1259 n = 4; 1260 break; 1261 #endif 1262 1263 case SEND_DEV_RESET: 1264 sc->sc_flags |= SPC_ABORTING; 1265 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1266 n = 1; 1267 break; 1268 1269 case SEND_REJECT: 1270 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1271 n = 1; 1272 break; 1273 1274 case SEND_PARITY_ERROR: 1275 sc->sc_omess[0] = MSG_PARITY_ERROR; 1276 n = 1; 1277 break; 1278 1279 case SEND_INIT_DET_ERR: 1280 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1281 n = 1; 1282 break; 1283 1284 case SEND_ABORT: 1285 sc->sc_flags |= SPC_ABORTING; 1286 sc->sc_omess[0] = MSG_ABORT; 1287 n = 1; 1288 break; 1289 1290 default: 1291 printf("%s: unexpected MESSAGE OUT; sending NOOP\n", 1292 sc->sc_dev.dv_xname); 1293 SPC_BREAK(); 1294 sc->sc_omess[0] = MSG_NOOP; 1295 n = 1; 1296 break; 1297 } 1298 sc->sc_omp = &sc->sc_omess[n]; 1299 1300 nextbyte: 1301 /* Send message bytes. */ 1302 /* send TRANSFER command. */ 1303 bus_space_write_1(iot, ioh, TCH, n >> 16); 1304 bus_space_write_1(iot, ioh, TCM, n >> 8); 1305 bus_space_write_1(iot, ioh, TCL, n); 1306 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1307 #ifdef x68k 1308 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1309 #else 1310 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR); 1311 #endif 1312 for (;;) { 1313 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1314 break; 1315 if (bus_space_read_1(iot, ioh, INTS) != 0) 1316 goto out; 1317 } 1318 for (;;) { 1319 #if 0 1320 for (;;) { 1321 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1322 break; 1323 /* Wait for REQINIT. XXX Need timeout. */ 1324 } 1325 #endif 1326 if (bus_space_read_1(iot, ioh, INTS) != 0) { 1327 /* 1328 * Target left MESSAGE OUT, possibly to reject 1329 * our message. 1330 * 1331 * If this is the last message being sent, then we 1332 * deassert ATN, since either the target is going to 1333 * ignore this message, or it's going to ask for a 1334 * retransmission via MESSAGE PARITY ERROR (in which 1335 * case we reassert ATN anyway). 1336 */ 1337 #if 0 1338 if (sc->sc_msgpriq == 0) 1339 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1340 #endif 1341 goto out; 1342 } 1343 1344 #if 0 1345 /* Clear ATN before last byte if this is the last message. */ 1346 if (n == 1 && sc->sc_msgpriq == 0) 1347 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1348 #endif 1349 1350 while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0) 1351 ; 1352 /* Send message byte. */ 1353 bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp); 1354 --n; 1355 /* Keep track of the last message we've sent any bytes of. */ 1356 sc->sc_lastmsg = sc->sc_currmsg; 1357 #if 0 1358 /* Wait for ACK to be negated. XXX Need timeout. */ 1359 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 1360 ; 1361 #endif 1362 1363 if (n == 0) 1364 break; 1365 } 1366 1367 /* We get here only if the entire message has been transmitted. */ 1368 if (sc->sc_msgpriq != 0) { 1369 /* There are more outgoing messages. */ 1370 goto nextmsg; 1371 } 1372 1373 /* 1374 * The last message has been transmitted. We need to remember the last 1375 * message transmitted (in case the target switches to MESSAGE IN phase 1376 * and sends a MESSAGE REJECT), and the list of messages transmitted 1377 * this time around (in case the target stays in MESSAGE OUT phase to 1378 * request a retransmit). 1379 */ 1380 1381 out: 1382 /* Disable REQ/ACK protocol. */ 1383 return; 1384 } 1385 1386 /* 1387 * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc 1388 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted 1389 * and ACK deasserted (i.e. waiting for a data byte) 1390 * 1391 * This new revision has been optimized (I tried) to make the common case fast, 1392 * and the rarer cases (as a result) somewhat more comlex 1393 */ 1394 int 1395 spc_dataout_pio(sc, p, n) 1396 struct spc_softc *sc; 1397 u_char *p; 1398 int n; 1399 { 1400 bus_space_tag_t iot = sc->sc_iot; 1401 bus_space_handle_t ioh = sc->sc_ioh; 1402 u_char intstat = 0; 1403 int out = 0; 1404 #define DOUTAMOUNT 8 /* Full FIFO */ 1405 1406 SPC_TRACE(("spc_dataout_pio ")); 1407 /* send TRANSFER command. */ 1408 bus_space_write_1(iot, ioh, TCH, n >> 16); 1409 bus_space_write_1(iot, ioh, TCM, n >> 8); 1410 bus_space_write_1(iot, ioh, TCL, n); 1411 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1412 #ifdef x68k 1413 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1414 #else 1415 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR); /* XXX */ 1416 #endif 1417 for (;;) { 1418 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1419 break; 1420 if (bus_space_read_1(iot, ioh, INTS) != 0) 1421 break; 1422 } 1423 1424 /* 1425 * I have tried to make the main loop as tight as possible. This 1426 * means that some of the code following the loop is a bit more 1427 * complex than otherwise. 1428 */ 1429 while (n > 0) { 1430 int xfer; 1431 1432 for (;;) { 1433 intstat = bus_space_read_1(iot, ioh, INTS); 1434 /* Wait till buffer is empty. */ 1435 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0) 1436 break; 1437 /* Break on interrupt. */ 1438 if (intstat != 0) 1439 goto phasechange; 1440 } 1441 1442 xfer = min(DOUTAMOUNT, n); 1443 1444 SPC_MISC(("%d> ", xfer)); 1445 1446 n -= xfer; 1447 out += xfer; 1448 1449 while (xfer-- > 0) { 1450 bus_space_write_1(iot, ioh, DREG, *p++); 1451 } 1452 } 1453 1454 if (out == 0) { 1455 for (;;) { 1456 if (bus_space_read_1(iot, ioh, INTS) != 0) 1457 break; 1458 } 1459 SPC_MISC(("extra data ")); 1460 } else { 1461 /* See the bytes off chip */ 1462 for (;;) { 1463 /* Wait till buffer is empty. */ 1464 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0) 1465 break; 1466 intstat = bus_space_read_1(iot, ioh, INTS); 1467 /* Break on interrupt. */ 1468 if (intstat != 0) 1469 goto phasechange; 1470 } 1471 } 1472 1473 phasechange: 1474 /* Stop the FIFO data path. */ 1475 1476 if (intstat != 0) { 1477 /* Some sort of phase change. */ 1478 int amount; 1479 1480 amount = ((bus_space_read_1(iot, ioh, TCH) << 16) | 1481 (bus_space_read_1(iot, ioh, TCM) << 8) | 1482 bus_space_read_1(iot, ioh, TCL)); 1483 if (amount > 0) { 1484 out -= amount; 1485 SPC_MISC(("+%d ", amount)); 1486 } 1487 } 1488 1489 /* Turn on ENREQINIT again. */ 1490 1491 return out; 1492 } 1493 1494 /* 1495 * spc_datain_pio: perform data transfers using the FIFO datapath in the spc 1496 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted 1497 * and ACK deasserted (i.e. at least one byte is ready). 1498 * 1499 * For now, uses a pretty dumb algorithm, hangs around until all data has been 1500 * transferred. This, is OK for fast targets, but not so smart for slow 1501 * targets which don't disconnect or for huge transfers. 1502 */ 1503 int 1504 spc_datain_pio(sc, p, n) 1505 struct spc_softc *sc; 1506 u_char *p; 1507 int n; 1508 { 1509 bus_space_tag_t iot = sc->sc_iot; 1510 bus_space_handle_t ioh = sc->sc_ioh; 1511 u_short intstat; 1512 int in = 0; 1513 #define DINAMOUNT 8 /* Full FIFO */ 1514 1515 SPC_TRACE(("spc_datain_pio ")); 1516 /* send TRANSFER command. */ 1517 bus_space_write_1(iot, ioh, TCH, n >> 16); 1518 bus_space_write_1(iot, ioh, TCM, n >> 8); 1519 bus_space_write_1(iot, ioh, TCL, n); 1520 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1521 #ifdef x68k 1522 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1523 #else 1524 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 1525 #endif 1526 for (;;) { 1527 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1528 break; 1529 if (bus_space_read_1(iot, ioh, INTS) != 0) 1530 goto phasechange; 1531 } 1532 1533 /* 1534 * We leave this loop if one or more of the following is true: 1535 * a) phase != PH_DATAIN && FIFOs are empty 1536 * b) reset has occurred or busfree is detected. 1537 */ 1538 while (n > 0) { 1539 int xfer; 1540 1541 #define INTSMASK 0xff 1542 /* Wait for fifo half full or phase mismatch */ 1543 for (;;) { 1544 intstat = ((bus_space_read_1(iot, ioh, SSTS) << 8) | 1545 bus_space_read_1(iot, ioh, INTS)); 1546 if ((intstat & (INTSMASK | (SSTS_DREG_FULL << 8))) != 1547 0) 1548 break; 1549 if ((intstat & (SSTS_DREG_EMPTY << 8)) == 0) 1550 break; 1551 } 1552 1553 #if 1 1554 if ((intstat & INTSMASK) != 0) 1555 goto phasechange; 1556 #else 1557 if ((intstat & INTSMASK) != 0 && 1558 (intstat & (SSTS_DREG_EMPTY << 8))) 1559 goto phasechange; 1560 #endif 1561 if ((intstat & (SSTS_DREG_FULL << 8)) != 0) 1562 xfer = min(DINAMOUNT, n); 1563 else 1564 xfer = min(1, n); 1565 1566 SPC_MISC((">%d ", xfer)); 1567 1568 n -= xfer; 1569 in += xfer; 1570 1571 while (xfer-- > 0) { 1572 *p++ = bus_space_read_1(iot, ioh, DREG); 1573 } 1574 1575 if ((intstat & INTSMASK) != 0) 1576 goto phasechange; 1577 } 1578 1579 /* 1580 * Some SCSI-devices are rude enough to transfer more data than what 1581 * was requested, e.g. 2048 bytes from a CD-ROM instead of the 1582 * requested 512. Test for progress, i.e. real transfers. If no real 1583 * transfers have been performed (n is probably already zero) and the 1584 * FIFO is not empty, waste some bytes.... 1585 */ 1586 if (in == 0) { 1587 for (;;) { 1588 if (bus_space_read_1(iot, ioh, INTS) != 0) 1589 break; 1590 } 1591 SPC_MISC(("extra data ")); 1592 } 1593 1594 phasechange: 1595 /* Stop the FIFO data path. */ 1596 1597 /* Turn on ENREQINIT again. */ 1598 1599 return in; 1600 } 1601 1602 /* 1603 * Catch an interrupt from the adaptor 1604 */ 1605 /* 1606 * This is the workhorse routine of the driver. 1607 * Deficiencies (for now): 1608 * 1) always uses programmed I/O 1609 */ 1610 int 1611 spcintr(arg) 1612 void *arg; 1613 { 1614 struct spc_softc *sc = arg; 1615 bus_space_tag_t iot = sc->sc_iot; 1616 bus_space_handle_t ioh = sc->sc_ioh; 1617 u_char ints; 1618 struct spc_acb *acb; 1619 struct scsipi_periph *periph; 1620 struct spc_tinfo *ti; 1621 int n; 1622 1623 /* 1624 * Disable interrupt. 1625 */ 1626 bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB); 1627 1628 SPC_TRACE(("spcintr ")); 1629 1630 loop: 1631 /* 1632 * Loop until transfer completion. 1633 */ 1634 /* 1635 * First check for abnormal conditions, such as reset. 1636 */ 1637 #ifdef x68k /* XXX? */ 1638 while ((ints = bus_space_read_1(iot, ioh, INTS)) == 0) 1639 delay(1); 1640 SPC_MISC(("ints = 0x%x ", ints)); 1641 #else 1642 ints = bus_space_read_1(iot, ioh, INTS); 1643 SPC_MISC(("ints = 0x%x ", ints)); 1644 #endif 1645 1646 if ((ints & INTS_RST) != 0) { 1647 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname); 1648 goto reset; 1649 } 1650 1651 /* 1652 * Check for less serious errors. 1653 */ 1654 if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) { 1655 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 1656 if (sc->sc_prevphase == PH_MSGIN) { 1657 sc->sc_flags |= SPC_DROP_MSGIN; 1658 spc_sched_msgout(sc, SEND_PARITY_ERROR); 1659 } else 1660 spc_sched_msgout(sc, SEND_INIT_DET_ERR); 1661 } 1662 1663 /* 1664 * If we're not already busy doing something test for the following 1665 * conditions: 1666 * 1) We have been reselected by something 1667 * 2) We have selected something successfully 1668 * 3) Our selection process has timed out 1669 * 4) This is really a bus free interrupt just to get a new command 1670 * going? 1671 * 5) Spurious interrupt? 1672 */ 1673 switch (sc->sc_state) { 1674 case SPC_IDLE: 1675 case SPC_SELECTING: 1676 SPC_MISC(("ints:0x%02x ", ints)); 1677 1678 if ((ints & INTS_SEL) != 0) { 1679 /* 1680 * We don't currently support target mode. 1681 */ 1682 printf("%s: target mode selected; going to BUS FREE\n", 1683 sc->sc_dev.dv_xname); 1684 1685 goto sched; 1686 } else if ((ints & INTS_RESEL) != 0) { 1687 SPC_MISC(("reselected ")); 1688 1689 /* 1690 * If we're trying to select a target ourselves, 1691 * push our command back into the ready list. 1692 */ 1693 if (sc->sc_state == SPC_SELECTING) { 1694 SPC_MISC(("backoff selector ")); 1695 SPC_ASSERT(sc->sc_nexus != NULL); 1696 acb = sc->sc_nexus; 1697 sc->sc_nexus = NULL; 1698 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 1699 } 1700 1701 /* Save reselection ID. */ 1702 sc->sc_selid = bus_space_read_1(iot, ioh, TEMP); 1703 1704 sc->sc_state = SPC_RESELECTED; 1705 } else if ((ints & INTS_CMD_DONE) != 0) { 1706 SPC_MISC(("selected ")); 1707 1708 /* 1709 * We have selected a target. Things to do: 1710 * a) Determine what message(s) to send. 1711 * b) Verify that we're still selecting the target. 1712 * c) Mark device as busy. 1713 */ 1714 if (sc->sc_state != SPC_SELECTING) { 1715 printf("%s: selection out while idle; resetting\n", 1716 sc->sc_dev.dv_xname); 1717 SPC_BREAK(); 1718 goto reset; 1719 } 1720 SPC_ASSERT(sc->sc_nexus != NULL); 1721 acb = sc->sc_nexus; 1722 periph = acb->xs->xs_periph; 1723 ti = &sc->sc_tinfo[periph->periph_target]; 1724 1725 sc->sc_msgpriq = SEND_IDENTIFY; 1726 if (acb->flags & ACB_RESET) 1727 sc->sc_msgpriq |= SEND_DEV_RESET; 1728 else if (acb->flags & ACB_ABORT) 1729 sc->sc_msgpriq |= SEND_ABORT; 1730 else { 1731 #if SPC_USE_SYNCHRONOUS 1732 if ((ti->flags & DO_SYNC) != 0) 1733 sc->sc_msgpriq |= SEND_SDTR; 1734 #endif 1735 #if SPC_USE_WIDE 1736 if ((ti->flags & DO_WIDE) != 0) 1737 sc->sc_msgpriq |= SEND_WDTR; 1738 #endif 1739 } 1740 1741 acb->flags |= ACB_NEXUS; 1742 ti->lubusy |= (1 << periph->periph_lun); 1743 1744 /* Do an implicit RESTORE POINTERS. */ 1745 sc->sc_dp = acb->data_addr; 1746 sc->sc_dleft = acb->data_length; 1747 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 1748 sc->sc_cleft = acb->scsipi_cmd_length; 1749 1750 /* On our first connection, schedule a timeout. */ 1751 if ((acb->xs->xs_control & XS_CTL_POLL) == 0) 1752 callout_reset(&acb->xs->xs_callout, 1753 mstohz(acb->timeout), spc_timeout, acb); 1754 1755 sc->sc_state = SPC_CONNECTED; 1756 } else if ((ints & INTS_TIMEOUT) != 0) { 1757 SPC_MISC(("selection timeout ")); 1758 1759 if (sc->sc_state != SPC_SELECTING) { 1760 printf("%s: selection timeout while idle; resetting\n", 1761 sc->sc_dev.dv_xname); 1762 SPC_BREAK(); 1763 goto reset; 1764 } 1765 SPC_ASSERT(sc->sc_nexus != NULL); 1766 acb = sc->sc_nexus; 1767 1768 delay(250); 1769 1770 acb->xs->error = XS_SELTIMEOUT; 1771 goto finish; 1772 } else { 1773 if (sc->sc_state != SPC_IDLE) { 1774 printf("%s: BUS FREE while not idle; state=%d\n", 1775 sc->sc_dev.dv_xname, sc->sc_state); 1776 SPC_BREAK(); 1777 goto out; 1778 } 1779 1780 goto sched; 1781 } 1782 1783 /* 1784 * Turn off selection stuff, and prepare to catch bus free 1785 * interrupts, parity errors, and phase changes. 1786 */ 1787 1788 sc->sc_flags = 0; 1789 sc->sc_prevphase = PH_INVALID; 1790 goto dophase; 1791 } 1792 1793 if ((ints & INTS_DISCON) != 0) { 1794 /* We've gone to BUS FREE phase. */ 1795 bus_space_write_1(iot, ioh, PCTL, 1796 bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB); 1797 /* disable disconnect interrupt */ 1798 bus_space_write_1(iot, ioh, INTS, ints); 1799 /* XXX reset interrput */ 1800 1801 switch (sc->sc_state) { 1802 case SPC_RESELECTED: 1803 goto sched; 1804 1805 case SPC_CONNECTED: 1806 SPC_ASSERT(sc->sc_nexus != NULL); 1807 acb = sc->sc_nexus; 1808 1809 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1810 if (sc->sc_prevphase == PH_MSGOUT) { 1811 /* 1812 * If the target went to BUS FREE phase during 1813 * or immediately after sending a SDTR or WDTR 1814 * message, disable negotiation. 1815 */ 1816 periph = acb->xs->xs_periph; 1817 ti = &sc->sc_tinfo[periph->periph_target]; 1818 switch (sc->sc_lastmsg) { 1819 #if SPC_USE_SYNCHRONOUS 1820 case SEND_SDTR: 1821 ti->flags &= ~DO_SYNC; 1822 ti->period = ti->offset = 0; 1823 break; 1824 #endif 1825 #if SPC_USE_WIDE 1826 case SEND_WDTR: 1827 ti->flags &= ~DO_WIDE; 1828 ti->width = 0; 1829 break; 1830 #endif 1831 } 1832 } 1833 #endif 1834 1835 if ((sc->sc_flags & SPC_ABORTING) == 0) { 1836 /* 1837 * Section 5.1.1 of the SCSI 2 spec suggests 1838 * issuing a REQUEST SENSE following an 1839 * unexpected disconnect. Some devices go into 1840 * a contingent allegiance condition when 1841 * disconnecting, and this is necessary to 1842 * clean up their state. 1843 */ 1844 printf("%s: unexpected disconnect; sending REQUEST SENSE\n", 1845 sc->sc_dev.dv_xname); 1846 SPC_BREAK(); 1847 acb->target_stat = SCSI_CHECK; 1848 acb->xs->error = XS_NOERROR; 1849 goto finish; 1850 } 1851 1852 acb->xs->error = XS_DRIVER_STUFFUP; 1853 goto finish; 1854 1855 case SPC_DISCONNECT: 1856 SPC_ASSERT(sc->sc_nexus != NULL); 1857 acb = sc->sc_nexus; 1858 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain); 1859 sc->sc_nexus = NULL; 1860 goto sched; 1861 1862 case SPC_CMDCOMPLETE: 1863 SPC_ASSERT(sc->sc_nexus != NULL); 1864 acb = sc->sc_nexus; 1865 goto finish; 1866 } 1867 } 1868 else if ((ints & INTS_CMD_DONE) != 0 && 1869 sc->sc_prevphase == PH_MSGIN && sc->sc_state != SPC_CONNECTED) 1870 goto out; 1871 1872 dophase: 1873 #if 0 1874 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) { 1875 /* Wait for REQINIT. */ 1876 goto out; 1877 } 1878 #else 1879 bus_space_write_1(iot, ioh, INTS, ints); 1880 ints = 0; 1881 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) 1882 delay(1); /* need timeout XXX */ 1883 #endif 1884 1885 /* 1886 * State transition. 1887 */ 1888 sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK; 1889 /* bus_space_write_1(iot, ioh, PCTL, sc->sc_phase);*/ 1890 1891 SPC_MISC(("phase=%d\n", sc->sc_phase)); 1892 switch (sc->sc_phase) { 1893 case PH_MSGOUT: 1894 if (sc->sc_state != SPC_CONNECTED && 1895 sc->sc_state != SPC_RESELECTED) 1896 break; 1897 spc_msgout(sc); 1898 sc->sc_prevphase = PH_MSGOUT; 1899 goto loop; 1900 1901 case PH_MSGIN: 1902 if (sc->sc_state != SPC_CONNECTED && 1903 sc->sc_state != SPC_RESELECTED) 1904 break; 1905 spc_msgin(sc); 1906 sc->sc_prevphase = PH_MSGIN; 1907 goto loop; 1908 1909 case PH_CMD: 1910 if (sc->sc_state != SPC_CONNECTED) 1911 break; 1912 #if SPC_DEBUG 1913 if ((spc_debug & SPC_SHOWMISC) != 0) { 1914 SPC_ASSERT(sc->sc_nexus != NULL); 1915 acb = sc->sc_nexus; 1916 printf("cmd=0x%02x+%d ", 1917 acb->scsipi_cmd.opcode, acb->scsipi_cmd_length-1); 1918 } 1919 #endif 1920 n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft); 1921 sc->sc_cp += n; 1922 sc->sc_cleft -= n; 1923 sc->sc_prevphase = PH_CMD; 1924 goto loop; 1925 1926 case PH_DATAOUT: 1927 if (sc->sc_state != SPC_CONNECTED) 1928 break; 1929 SPC_MISC(("dataout dleft=%d ", sc->sc_dleft)); 1930 n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft); 1931 sc->sc_dp += n; 1932 sc->sc_dleft -= n; 1933 sc->sc_prevphase = PH_DATAOUT; 1934 goto loop; 1935 1936 case PH_DATAIN: 1937 if (sc->sc_state != SPC_CONNECTED) 1938 break; 1939 SPC_MISC(("datain ")); 1940 n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft); 1941 sc->sc_dp += n; 1942 sc->sc_dleft -= n; 1943 sc->sc_prevphase = PH_DATAIN; 1944 goto loop; 1945 1946 case PH_STAT: 1947 if (sc->sc_state != SPC_CONNECTED) 1948 break; 1949 SPC_ASSERT(sc->sc_nexus != NULL); 1950 acb = sc->sc_nexus; 1951 /*acb->target_stat = bus_space_read_1(iot, ioh, DREG);*/ 1952 spc_datain_pio(sc, &acb->target_stat, 1); 1953 SPC_MISC(("target_stat=0x%02x ", acb->target_stat)); 1954 sc->sc_prevphase = PH_STAT; 1955 goto loop; 1956 } 1957 1958 printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname); 1959 SPC_BREAK(); 1960 reset: 1961 spc_init(sc); 1962 return 1; 1963 1964 finish: 1965 callout_stop(&acb->xs->xs_callout); 1966 bus_space_write_1(iot, ioh, INTS, ints); 1967 ints = 0; 1968 spc_done(sc, acb); 1969 goto out; 1970 1971 sched: 1972 sc->sc_state = SPC_IDLE; 1973 spc_sched(sc); 1974 goto out; 1975 1976 out: 1977 if (ints) 1978 bus_space_write_1(iot, ioh, INTS, ints); 1979 bus_space_write_1(iot, ioh, SCTL, 1980 bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB); 1981 return 1; 1982 } 1983 1984 void 1985 spc_abort(sc, acb) 1986 struct spc_softc *sc; 1987 struct spc_acb *acb; 1988 { 1989 1990 /* 2 secs for the abort */ 1991 acb->timeout = SPC_ABORT_TIMEOUT; 1992 acb->flags |= ACB_ABORT; 1993 1994 if (acb == sc->sc_nexus) { 1995 /* 1996 * If we're still selecting, the message will be scheduled 1997 * after selection is complete. 1998 */ 1999 if (sc->sc_state == SPC_CONNECTED) 2000 spc_sched_msgout(sc, SEND_ABORT); 2001 } else { 2002 spc_dequeue(sc, acb); 2003 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 2004 if (sc->sc_state == SPC_IDLE) 2005 spc_sched(sc); 2006 } 2007 } 2008 2009 void 2010 spc_timeout(arg) 2011 void *arg; 2012 { 2013 struct spc_acb *acb = arg; 2014 struct scsipi_xfer *xs = acb->xs; 2015 struct scsipi_periph *periph = xs->xs_periph; 2016 struct spc_softc *sc = (void*)periph->periph_channel->chan_adapter->adapt_dev; 2017 int s; 2018 2019 scsipi_printaddr(periph); 2020 printf("timed out"); 2021 2022 s = splbio(); 2023 2024 if (acb->flags & ACB_ABORT) { 2025 /* abort timed out */ 2026 printf(" AGAIN\n"); 2027 /* XXX Must reset! */ 2028 } else { 2029 /* abort the operation that has timed out */ 2030 printf("\n"); 2031 acb->xs->error = XS_TIMEOUT; 2032 spc_abort(sc, acb); 2033 } 2034 2035 splx(s); 2036 } 2037 2038 #ifdef SPC_DEBUG 2039 /* 2040 * The following functions are mostly used for debugging purposes, either 2041 * directly called from the driver or from the kernel debugger. 2042 */ 2043 2044 void 2045 spc_show_scsi_cmd(acb) 2046 struct spc_acb *acb; 2047 { 2048 u_char *b = (u_char *)&acb->scsipi_cmd; 2049 int i; 2050 2051 scsipi_printaddr(acb->xs->xs_periph); 2052 if ((acb->xs->xs_control & XS_CTL_RESET) == 0) { 2053 for (i = 0; i < acb->scsipi_cmd_length; i++) { 2054 if (i) 2055 printf(","); 2056 printf("%x", b[i]); 2057 } 2058 printf("\n"); 2059 } else 2060 printf("RESET\n"); 2061 } 2062 2063 void 2064 spc_print_acb(acb) 2065 struct spc_acb *acb; 2066 { 2067 2068 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags); 2069 printf(" dp=%p dleft=%d target_stat=%x\n", 2070 acb->data_addr, acb->data_length, acb->target_stat); 2071 spc_show_scsi_cmd(acb); 2072 } 2073 2074 void 2075 spc_print_active_acb() 2076 { 2077 struct spc_acb *acb; 2078 struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */ 2079 2080 printf("ready list:\n"); 2081 for (acb = sc->ready_list.tqh_first; acb != NULL; 2082 acb = acb->chain.tqe_next) 2083 spc_print_acb(acb); 2084 printf("nexus:\n"); 2085 if (sc->sc_nexus != NULL) 2086 spc_print_acb(sc->sc_nexus); 2087 printf("nexus list:\n"); 2088 for (acb = sc->nexus_list.tqh_first; acb != NULL; 2089 acb = acb->chain.tqe_next) 2090 spc_print_acb(acb); 2091 } 2092 2093 void 2094 spc_dump89352(sc) 2095 struct spc_softc *sc; 2096 { 2097 bus_space_tag_t iot = sc->sc_iot; 2098 bus_space_handle_t ioh = sc->sc_ioh; 2099 2100 printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n", 2101 bus_space_read_1(iot, ioh, BDID), 2102 bus_space_read_1(iot, ioh, SCTL), 2103 bus_space_read_1(iot, ioh, SCMD), 2104 bus_space_read_1(iot, ioh, TMOD)); 2105 printf(" INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n", 2106 bus_space_read_1(iot, ioh, INTS), 2107 bus_space_read_1(iot, ioh, PSNS), 2108 bus_space_read_1(iot, ioh, SSTS), 2109 bus_space_read_1(iot, ioh, SERR), 2110 bus_space_read_1(iot, ioh, PCTL)); 2111 printf(" MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n", 2112 bus_space_read_1(iot, ioh, MBC), 2113 #if 0 2114 bus_space_read_1(iot, ioh, DREG), 2115 #else 2116 0, 2117 #endif 2118 bus_space_read_1(iot, ioh, TEMP), 2119 bus_space_read_1(iot, ioh, TCH), 2120 bus_space_read_1(iot, ioh, TCM)); 2121 printf(" TCL=%x EXBF=%x\n", 2122 bus_space_read_1(iot, ioh, TCL), 2123 bus_space_read_1(iot, ioh, EXBF)); 2124 } 2125 2126 void 2127 spc_dump_driver(sc) 2128 struct spc_softc *sc; 2129 { 2130 struct spc_tinfo *ti; 2131 int i; 2132 2133 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase); 2134 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x currmsg=%x\n", 2135 sc->sc_state, sc->sc_imess[0], 2136 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg); 2137 for (i = 0; i < 7; i++) { 2138 ti = &sc->sc_tinfo[i]; 2139 printf("tinfo%d: %d cmds %d disconnects %d timeouts", 2140 i, ti->cmds, ti->dconns, ti->touts); 2141 printf(" %d senses flags=%x\n", ti->senses, ti->flags); 2142 } 2143 } 2144 #endif 2145