1 /* $NetBSD: mx98905.c,v 1.2 2002/02/17 20:08:34 bjh21 Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 42 * adapters. 43 * 44 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 45 * 46 * Copyright (C) 1993, David Greenman. This software may be used, modified, 47 * copied, distributed, and sold, in both source and binary form provided that 48 * the above copyright and these terms are retained. Under no circumstances is 49 * the author responsible for the proper functioning of this software, nor does 50 * the author assume any responsibility for damages incurred with its use. 51 */ 52 53 /* 54 * Special routines for the Macronix MX 98905. For use with the "ne" driver. 55 */ 56 57 /* 58 * <URL:http://mail-index.netbsd.org/port-arm32/1996/06/23/0005.html>: 59 * There are 2 types of etherh card. One uses the macronics chipset MX98905 60 * and that chipset has a bug in it, in that it the MSB remote dma 61 * register does not work. There is a workaround for this which 62 * should be around soon. In fact, I think only the buffer ram test 63 * ever transfers more than 256 bytes across the dma channel, so diabling 64 * it will make the mx stuff work. 65 */ 66 67 #include <sys/param.h> 68 69 __KERNEL_RCSID(0, "$NetBSD: mx98905.c,v 1.2 2002/02/17 20:08:34 bjh21 Exp $"); 70 71 #include <sys/device.h> 72 #include <sys/mbuf.h> 73 #include <sys/socket.h> 74 #include <sys/syslog.h> 75 #include <sys/systm.h> 76 77 #include <net/if.h> 78 #include <net/if_ether.h> 79 #include <net/if_media.h> 80 81 #include <machine/bus.h> 82 83 #include <dev/ic/dp8390reg.h> 84 #include <dev/ic/dp8390var.h> 85 #include <dev/ic/ne2000reg.h> 86 #include <dev/ic/ne2000var.h> 87 #include <dev/ic/mx98905var.h> 88 89 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 90 #define bus_space_write_stream_2 bus_space_write_2 91 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 92 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 93 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 94 95 static __inline void mx98905_write_setup(struct dp8390_softc *, int, int); 96 static __inline void mx98905_write_wait(struct dp8390_softc *); 97 98 void 99 mx98905_attach(struct dp8390_softc *sc) 100 { 101 102 sc->ring_copy = mx98905_ring_copy; 103 sc->write_mbuf = mx98905_write_mbuf; 104 sc->read_hdr = mx98905_read_hdr; 105 } 106 107 static __inline void 108 mx98905_write_setup(sc, len, buf) 109 struct dp8390_softc *sc; 110 int len, buf; 111 { 112 bus_space_tag_t nict = sc->sc_regt; 113 bus_space_handle_t nich = sc->sc_regh; 114 115 /* Select page 0 registers. */ 116 NIC_BARRIER(nict, nich); 117 bus_space_write_1(nict, nich, ED_P0_CR, 118 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 119 NIC_BARRIER(nict, nich); 120 121 /* Reset remote DMA complete flag. */ 122 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 123 NIC_BARRIER(nict, nich); 124 125 /* Set up DMA byte count. */ 126 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 127 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 128 129 /* Set up destination address in NIC mem. */ 130 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 131 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 132 133 /* Set remote DMA write. */ 134 NIC_BARRIER(nict, nich); 135 bus_space_write_1(nict, nich, 136 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 137 NIC_BARRIER(nict, nich); 138 } 139 140 141 static __inline void 142 mx98905_write_wait(sc) 143 struct dp8390_softc *sc; 144 { 145 int maxwait = 100; /* about 120us */ 146 bus_space_tag_t nict = sc->sc_regt; 147 bus_space_handle_t nich = sc->sc_regh; 148 149 /* 150 * Wait for remote DMA to complete. This is necessary because on the 151 * transmit side, data is handled internally by the NIC in bursts, and 152 * we can't start another remote DMA until this one completes. Not 153 * waiting causes really bad things to happen - like the NIC wedging 154 * the bus. 155 */ 156 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 157 ED_ISR_RDC) && --maxwait) { 158 bus_space_read_1(nict, nich, ED_P0_CRDA1); 159 bus_space_read_1(nict, nich, ED_P0_CRDA0); 160 NIC_BARRIER(nict, nich); 161 DELAY(1); 162 } 163 164 if (maxwait == 0) { 165 log(LOG_WARNING, 166 "%s: remote transmit DMA failed to complete\n", 167 sc->sc_dev.dv_xname); 168 dp8390_reset(sc); 169 } 170 } 171 172 /* 173 * Write an mbuf chain to the destination NIC memory address using programmed 174 * I/O. 175 */ 176 int 177 mx98905_write_mbuf(sc, m, buf) 178 struct dp8390_softc *sc; 179 struct mbuf *m; 180 int buf; 181 { 182 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 183 bus_space_tag_t nict = sc->sc_regt; 184 bus_space_handle_t nich = sc->sc_regh; 185 bus_space_tag_t asict = nsc->sc_asict; 186 bus_space_handle_t asich = nsc->sc_asich; 187 int savelen, dmalen, resid, len; 188 u_int8_t *data, savebyte[2]; 189 int l, leftover; 190 #ifdef DIAGNOSTIC 191 u_int8_t *lim; 192 #endif 193 194 resid = savelen = m->m_pkthdr.len; 195 196 dmalen = min(resid, 254); 197 198 mx98905_write_setup(sc, dmalen, buf); 199 200 buf += dmalen; 201 resid -= dmalen; 202 203 /* 204 * Transfer the mbuf chain to the NIC memory. NE2000 cards 205 * require that data be transferred as words, and only words, 206 * so that case requires some extra code to patch over odd-length 207 * mbufs. 208 */ 209 /* NE2000s are a bit trickier. */ 210 /* Start out with no leftover data. */ 211 leftover = 0; 212 savebyte[0] = savebyte[1] = 0; 213 214 for (; m != 0; m = m->m_next) { 215 l = m->m_len; 216 if (l == 0) 217 continue; 218 data = mtod(m, u_int8_t *); 219 #ifdef DIAGNOSTIC 220 lim = data + l; 221 #endif 222 while (l > 0) { 223 if (leftover) { 224 /* 225 * Data left over (from mbuf or 226 * realignment). Buffer the next 227 * byte, and write it and the leftover 228 * data out. 229 */ 230 savebyte[1] = *data++; 231 l--; 232 bus_space_write_stream_2(asict, asich, 233 NE2000_ASIC_DATA, *(u_int16_t *)savebyte); 234 dmalen -= 2; 235 leftover = 0; 236 } else if (BUS_SPACE_ALIGNED_POINTER(data, 237 u_int16_t) == 0) { 238 /* Unaligned data; buffer the next byte. */ 239 savebyte[0] = *data++; 240 l--; 241 leftover = 1; 242 } else { 243 /* 244 * Aligned data; output contiguous 245 * words as much as we can, then 246 * buffer the remaining byte, if any. 247 */ 248 len = min(l, dmalen); 249 leftover = len & 1; 250 len &= ~1; 251 bus_space_write_multi_stream_2(asict, 252 asich, NE2000_ASIC_DATA, 253 (u_int16_t *)data, len >> 1); 254 dmalen -= len; 255 data += len; 256 if (leftover) 257 savebyte[0] = *data++; 258 l -= len + leftover; 259 } 260 if (dmalen == 0 && resid > 0) { 261 mx98905_write_wait(sc); 262 dmalen = min(resid, 254); 263 264 mx98905_write_setup(sc, dmalen, buf); 265 266 buf += dmalen; 267 resid -= dmalen; 268 } 269 } 270 if (l < 0) 271 panic("mx98905_write_mbuf: negative len"); 272 #ifdef DIAGNOSTIC 273 if (data != lim) 274 panic("mx98905_write_mbuf: data != lim"); 275 #endif 276 } 277 if (leftover) { 278 savebyte[1] = 0; 279 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA, 280 *(u_int16_t *)savebyte); 281 } 282 NIC_BARRIER(nict, nich); 283 284 mx98905_write_wait(sc); 285 286 return (savelen); 287 } 288 289 /* 290 * Given a source and destination address, copy 'amout' of a packet from 291 * the ring buffer into a linear destination buffer. Takes into account 292 * ring-wrap. 293 */ 294 int 295 mx98905_ring_copy(sc, src, dst, amount) 296 struct dp8390_softc *sc; 297 int src; 298 caddr_t dst; 299 u_short amount; 300 { 301 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 302 bus_space_tag_t nict = sc->sc_regt; 303 bus_space_handle_t nich = sc->sc_regh; 304 bus_space_tag_t asict = nsc->sc_asict; 305 bus_space_handle_t asich = nsc->sc_asich; 306 u_short tmp_amount; 307 int useword = NE2000_USE_WORD(nsc); 308 309 /* Does copy wrap to lower addr in ring buffer? */ 310 if (src + amount > sc->mem_end) { 311 tmp_amount = sc->mem_end - src; 312 313 /* Copy amount up to end of NIC memory. */ 314 mx98905_readmem(nict, nich, asict, asich, src, 315 (u_int8_t *)dst, tmp_amount, useword); 316 317 amount -= tmp_amount; 318 src = sc->mem_ring; 319 dst += tmp_amount; 320 } 321 322 mx98905_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst, 323 amount, useword); 324 325 return (src + amount); 326 } 327 328 void 329 mx98905_read_hdr(sc, buf, hdr) 330 struct dp8390_softc *sc; 331 int buf; 332 struct dp8390_ring *hdr; 333 { 334 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 335 336 mx98905_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich, 337 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring), 338 NE2000_USE_WORD(nsc)); 339 #if BYTE_ORDER == BIG_ENDIAN 340 hdr->count = bswap16(hdr->count); 341 #endif 342 } 343 344 static __inline void 345 mx98905_read_setup(bus_space_tag_t nict, bus_space_handle_t nich, 346 int len, int buf) 347 { 348 349 /* Select page 0 registers. */ 350 NIC_BARRIER(nict, nich); 351 bus_space_write_1(nict, nich, ED_P0_CR, 352 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 353 NIC_BARRIER(nict, nich); 354 355 /* Set up DMA byte count. */ 356 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 357 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 358 359 /* Set up source address in NIC mem. */ 360 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 361 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 362 363 NIC_BARRIER(nict, nich); 364 bus_space_write_1(nict, nich, ED_P0_CR, 365 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA); 366 367 bus_space_barrier(nict, nich, 0, NE2000_NPORTS, 368 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 369 } 370 371 /* 372 * Given a NIC memory source address and a host memory destination address, 373 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is 374 * rounded up to a word - ok as long as mbufs are word sized. 375 */ 376 void 377 mx98905_readmem(nict, nich, asict, asich, src, dst, amount, useword) 378 bus_space_tag_t nict; 379 bus_space_handle_t nich; 380 bus_space_tag_t asict; 381 bus_space_handle_t asich; 382 int src; 383 u_int8_t *dst; 384 size_t amount; 385 int useword; 386 { 387 int len, resid; 388 389 resid = amount; 390 /* Round up to a word. */ 391 if (resid & 1) 392 ++resid; 393 394 while (resid > 0) { 395 len = min(resid, 254); 396 mx98905_read_setup(nict, nich, len, src); 397 if (useword) 398 bus_space_read_multi_stream_2(asict, asich, 399 NE2000_ASIC_DATA, (u_int16_t *)dst, len >> 1); 400 else 401 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA, 402 dst, len); 403 resid -= len; 404 src += len; 405 dst += len; 406 } 407 } 408