1 /* $NetBSD: nslm7xvar.h,v 1.27 2010/02/08 21:42:01 pgoyette Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Bill Squier. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _DEV_ISA_NSLM7XVAR_H_ 33 #define _DEV_ISA_NSLM7XVAR_H_ 34 35 /* 36 * National Semiconductor LM78/79/81 registers. 37 */ 38 39 /* Control registers */ 40 41 #define LMC_ADDR 0x05 42 #define LMC_DATA 0x06 43 44 /* Data registers */ 45 46 #define LMD_POST_RAM 0x00 /* POST RAM occupies 0x00 -- 0x1f */ 47 #define LMD_VALUE_RAM 0x20 /* Value RAM occupies 0x20 -- 0x3f */ 48 #define LMD_FAN1 0x28 /* FAN1 reading */ 49 #define LMD_FAN2 0x29 /* FAN2 reading */ 50 #define LMD_FAN3 0x2a /* FAN3 reading */ 51 52 #define LMD_CONFIG 0x40 /* Configuration */ 53 #define LMD_ISR1 0x41 /* Interrupt Status 1 */ 54 #define LMD_ISR2 0x42 /* Interrupt Status 2 */ 55 #define LMD_SMI1 0x43 /* SMI Mask 1 */ 56 #define LMD_SMI2 0x44 /* SMI Mask 2 */ 57 #define LMD_NMI1 0x45 /* NMI Mask 1 */ 58 #define LMD_NMI2 0x46 /* NMI Mask 2 */ 59 #define LMD_VIDFAN 0x47 /* VID/Fan Divisor */ 60 #define LMD_SBUSADDR 0x48 /* Serial Bus Address */ 61 #define LMD_CHIPID 0x49 /* Chip Reset/ID */ 62 63 /* Chip IDs */ 64 65 #define LM_NUM_SENSORS 11 66 #define LM_ID_LM78 0x00 67 #define LM_ID_LM78J 0x40 68 #define LM_ID_LM79 0xC0 69 #define LM_ID_LM81 0x80 70 #define LM_ID_MASK 0xFE 71 72 73 /* 74 * Winbond registers 75 * 76 * Several models exists. The W83781D is mostly compatible with the 77 * LM78, but has two extra temperatures. Later models add extra 78 * voltage sensors, fans and bigger fan divisors to accomodate slow 79 * running fans. To accomodate the extra sensors some models have 80 * different memory banks. 81 */ 82 83 #define WB_T23ADDR 0x4a /* Temperature 2 and 3 Serial Bus Address */ 84 #define WB_PIN 0x4b /* Pin Control */ 85 #define WB_BANKSEL 0x4e /* Bank Select */ 86 #define WB_VENDID 0x4f /* Vendor ID */ 87 88 /* Bank 0 regs */ 89 #define WB_BANK0_CHIPID 0x58 /* Chip ID */ 90 #define WB_BANK0_RESVD1 0x59 /* Resvd, bits 6-4 select temp sensor mode */ 91 #define WB_BANK0_FAN45 0x5c /* Fan 4/5 Divisor Control (W83791D only) */ 92 #define WB_BANK0_VBAT 0x5d /* VBAT Monitor Control */ 93 #define WB_BANK0_FAN4 0xba /* Fan 4 reading (W83791D only) */ 94 #define WB_BANK0_FAN5 0xbb /* Fan 5 reading (W83791D only) */ 95 96 #define WB_BANK0_CONFIG 0x18 /* VRM & OVT Config (W83627THF/W83637HF) */ 97 98 /* Bank 1 registers */ 99 #define WB_BANK1_T2H 0x50 /* Temperature 2 High Byte */ 100 #define WB_BANK1_T2L 0x51 /* Temperature 2 Low Byte */ 101 102 /* Bank 2 registers */ 103 #define WB_BANK2_T3H 0x50 /* Temperature 3 High Byte */ 104 #define WB_BANK2_T3L 0x51 /* Temperature 3 Low Byte */ 105 106 /* Bank 4 registers (W83782D/W83627HF and later models only) */ 107 #define WB_BANK4_T1OFF 0x54 /* Temperature 1 Offset */ 108 #define WB_BANK4_T2OFF 0x55 /* Temperature 2 Offset */ 109 #define WB_BANK4_T3OFF 0x56 /* Temperature 3 Offset */ 110 111 /* Bank 5 registers (W83782D/W83627HF and later models only) */ 112 #define WB_BANK5_5VSB 0x50 /* 5VSB reading */ 113 #define WB_BANK5_VBAT 0x51 /* VBAT reading */ 114 115 /* Bank selection */ 116 #define WB_BANKSEL_B0 0x00 /* Bank 0 */ 117 #define WB_BANKSEL_B1 0x01 /* Bank 1 */ 118 #define WB_BANKSEL_B2 0x02 /* Bank 2 */ 119 #define WB_BANKSEL_B3 0x03 /* Bank 3 */ 120 #define WB_BANKSEL_B4 0x04 /* Bank 4 */ 121 #define WB_BANKSEL_B5 0x05 /* Bank 5 */ 122 #define WB_BANKSEL_HBAC 0x80 /* Register 0x4f High Byte Access */ 123 124 /* Vendor IDs */ 125 #define WB_VENDID_WINBOND 0x5ca3 /* Winbond */ 126 #define WB_VENDID_ASUS 0x12c3 /* ASUS */ 127 128 /* Chip IDs */ 129 #define WB_CHIPID_W83781D 0x10 130 #define WB_CHIPID_W83781D_2 0x11 131 #define WB_CHIPID_W83627HF 0x21 132 #define WB_CHIPID_AS99127F 0x31 /* Asus W83781D clone */ 133 #define WB_CHIPID_W83782D 0x30 134 #define WB_CHIPID_W83783S 0x40 135 #define WB_CHIPID_W83697HF 0x60 136 #define WB_CHIPID_W83791D 0x71 137 #define WB_CHIPID_W83791SD 0x72 138 #define WB_CHIPID_W83792D 0x7a 139 #define WB_CHIPID_W83637HF 0x80 140 #define WB_CHIPID_W83627EHF_A 0x88 /* early version, only for ASUS MBs */ 141 #define WB_CHIPID_W83627THF 0x90 142 #define WB_CHIPID_W83627EHF 0xa1 143 #define WB_CHIPID_W83627DHG 0xc1 144 145 /* Config bits */ 146 #define WB_CONFIG_VMR9 0x01 147 148 /* Reference voltage (mV) */ 149 #define WB_VREF 3600 150 #define WB_W83627EHF_VREF 2048 151 152 #define WB_MAX_SENSORS 19 153 154 struct lm_softc { 155 device_t sc_dev; 156 157 callout_t sc_callout; 158 159 envsys_data_t sensors[WB_MAX_SENSORS]; 160 struct sysmon_envsys *sc_sme; 161 uint8_t numsensors; 162 163 void (*refresh_sensor_data)(struct lm_softc *); 164 165 uint8_t (*lm_readreg)(struct lm_softc *, int); 166 void (*lm_writereg)(struct lm_softc *, int, int); 167 168 struct lm_sensor *lm_sensors; 169 uint8_t chipid; 170 uint8_t vrm9; 171 }; 172 173 struct lm_sensor { 174 const char *desc; 175 enum envsys_units type; 176 uint8_t bank; 177 uint8_t reg; 178 void (*refresh)(struct lm_softc *, int); 179 int rfact; 180 }; 181 182 void lm_attach(struct lm_softc *); 183 void lm_detach(struct lm_softc *); 184 int lm_probe(struct lm_softc *); 185 186 #endif /* _DEV_ISA_NSLM7XVAR_H_ */ 187