1 /* $NetBSD: nslm7xvar.h,v 1.10 2002/11/15 14:55:42 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Bill Squier. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _DEV_ISA_NSLM7XVAR_H_ 40 #define _DEV_ISA_NSLM7XVAR_H_ 41 42 /* ctl registers */ 43 44 #define LMC_ADDR 0x05 45 #define LMC_DATA 0x06 46 47 /* data registers */ 48 49 #define LMD_SENSORBASE 0x20 /* Sensors occupy 0x20 -- 0x2a */ 50 51 #define LMD_CONFIG 0x40 /* Configuration */ 52 #define LMD_ISR1 0x41 /* Interrupt Status 1 */ 53 #define LMD_ISR2 0x42 /* Interrupt Status 2 */ 54 #define LMD_SMI1 0x43 /* SMI Mask 1 */ 55 #define LMD_SMI2 0x44 /* SMI Mask 2 */ 56 #define LMD_NMI1 0x45 /* NMI Mask 1 */ 57 #define LMD_NMI2 0x46 /* NMI Mask 2 */ 58 #define LMD_VIDFAN 0x47 /* VID/Fan Divisor */ 59 #define LMD_SBUSADDR 0x48 /* Serial Bus Address */ 60 #define LMD_CHIPID 0x49 /* Chip Reset/ID */ 61 62 /* misc constants */ 63 64 #define LM_NUM_SENSORS 11 65 #define LM_ID_LM78 0x00 66 #define LM_ID_LM78J 0x40 67 #define LM_ID_LM79 0xC0 68 #define LM_ID_LM81 0x80 69 #define LM_ID_MASK 0xFE 70 71 /* 72 * additionnal registers for the Winbond chips: 73 * WB83781D: mostly lm7x compatible; extra temp sensors in bank1 & 2 74 * WB83782D & WB83627HF: voltage sensors needs different handling, more FAN 75 * dividers; mode voltage sensors, more temp sensors. 76 */ 77 #define WB_T23ADDR 0x4A /* temp sens 2/3 I2C addr */ 78 #define WB_PIN 0x4B /* pin & fan3 divider */ 79 #define WB_BANKSEL 0x4E /* banck select register */ 80 #define WB_BANKSEL_B0 0x00 /* select bank 0 */ 81 #define WB_BANKSEL_B1 0x01 /* select bank 1 */ 82 #define WB_BANKSEL_B2 0x02 /* select bank 2 */ 83 #define WB_BANKSEL_B3 0x03 /* select bank 3 */ 84 #define WB_BANKSEL_B4 0x04 /* select bank 4 */ 85 #define WB_BANKSEL_B5 0x05 /* select bank 5 */ 86 #define WB_BANKSEL_HBAC 0x80 /* hight byte access */ 87 88 #define WB_VENDID 0x4F /* vendor ID register */ 89 #define WB_VENDID_WINBOND 0x5CA3 90 /* Bank0 regs */ 91 #define WB_BANK0_CHIPID 0x58 92 #define WB_CHIPID_83781 0x10 93 #define WB_CHIPID_83781_2 0x11 94 #define WB_CHIPID_83782 0x30 95 #define WB_CHIPID_83627 0x21 96 #define WB_CHIPID_83697 0x60 97 #define WB_BANK0_FANBAT 0x5D 98 /* Bank1 regs */ 99 #define WB_BANK1_T2H 0x50 100 #define WB_BANK1_T2L 0x51 101 102 /* Bank2 regs */ 103 #define WB_BANK2_T3H 0x50 104 #define WB_BANK2_T3L 0x51 105 106 /* Bank4 regs 83782/83627 only */ 107 #define WB_BANK4_T1OFF 0x54 108 #define WB_BANK4_T2OFF 0x55 109 #define WB_BANK4_T3OFF 0x56 110 111 /* Bank5 regs 83782/83627 only */ 112 #define WB_BANK5_5VSB 0x50 113 #define WB_BANK5_VBAT 0x51 114 115 #define WB83781_NUM_SENSORS 13 116 #define WB83697_NUM_SENSORS 14 117 #define WB_NUM_SENSORS 15 118 119 struct lm_softc { 120 struct device sc_dev; 121 122 int lm_iobase; 123 bus_space_tag_t lm_iot; 124 bus_space_handle_t lm_ioh; 125 126 int sc_flags; 127 struct timeval lastread; /* only allow reads every 1.5 seconds */ 128 struct envsys_tre_data sensors[WB_NUM_SENSORS]; 129 struct envsys_basic_info info[WB_NUM_SENSORS]; 130 u_int numsensors; 131 void (*refresh_sensor_data) __P((struct lm_softc *)); 132 133 int (*lm_banksel)(struct lm_softc *, int); 134 u_int8_t (*lm_readreg)(struct lm_softc *, int); 135 void (*lm_writereg)(struct lm_softc *, int, int); 136 137 struct sysmon_envsys sc_sysmon; 138 }; 139 140 void lm_attach __P((struct lm_softc *)); 141 int lm_probe __P((bus_space_tag_t, bus_space_handle_t)); 142 143 #endif /* _DEV_ISA_NSLM7XVAR_H_ */ 144