xref: /netbsd/sys/dev/ic/sl811hsreg.h (revision 6550d01e)
1 /*	$NetBSD: sl811hsreg.h,v 1.2 2007/08/15 03:53:10 kiyohara Exp $	*/
2 
3 /*
4  * Not (c) 2007 Matthew Orgass
5  * This file is public domain, meaning anyone can make any use of part or all
6  * of this file including copying into other works without credit.  Any use,
7  * modified or not, is solely the responsibility of the user.  If this file is
8  * part of a collection then use in the collection is governed by the terms of
9  * the collection.
10  */
11 
12 /*
13  * ScanLogic SL811HS USB Host Controller
14  */
15 
16 /* note: pcmcia attachment uses 4 byte port with data repeated the last three
17  * bytes; using 0x2 instead of 0x1 solves bus corruption on the Vadem Clio
18  * C-1000.  The main driver does not use these IDX and PORT values.
19  */
20 #define SL11_IDX_ADDR	(0x00)
21 #define SL11_IDX_DATA	(0x01)
22 #define SL11_PORTSTART	(0x00)
23 #define SL11_PORTSIZE	(0x02)
24 
25 #define SL11_E0BASE	(0x00)		/* Base of Control0 */
26 #define SL11_E0CTRL	(0x00)		/* Host Control Register */
27 #define SL11_E0ADDR	(0x01)		/* Host Base Address */
28 #define SL11_E0LEN	(0x02)		/* Host Base Length */
29 #define SL11_E0STAT	(0x03)		/* USB Status (Read) */
30 #define SL11_E0PID	SL11_E0STAT	/* Host PID, Device Endpoint (Write) */
31 #define SL11_E0CONT	(0x04)		/* Transfer Count (Read) */
32 #define SL11_E0DEV	SL11_E0CONT	/* Host Device Address (Write) */
33 
34 #define SL11_E1BASE	(0x08)		/* Base of Control1 */
35 #define SL11_E1CTRL	(SL11_E1BASE + SL11_E0CTRL)
36 #define SL11_E1ADDR	(SL11_E1BASE + SL11_E0ADDR)
37 #define SL11_E1LEN	(SL11_E1BASE + SL11_E0LEN)
38 #define SL11_E1STAT	(SL11_E1BASE + SL11_E0STAT)
39 #define SL11_E1PID	(SL11_E1BASE + SL11_E0PID)
40 #define SL11_E1CONT	(SL11_E1BASE + SL11_E0CONT)
41 #define SL11_E1DEV	(SL11_E1BASE + SL11_E0DEV)
42 
43 #define SL11_CTRL	(0x05)		/* Control Register1 */
44 #define SL11_IER	(0x06)		/* Interrupt Enable Register */
45 #define SL11_ISR	(0x0d)		/* Interrupt Status Register */
46 #define SL11_SOFTIME	(0x0e)		/* SOF Counter Low (Write) */
47 #define SL11_REV	SL11_SOFTIME	/* HW Revision Register (Read) */
48 #define SL811_CSOF	(0x0f)		/* SOF Counter High(R), Control2(W) */
49 #define SL11_MEM	(0x10)		/* Memory Buffer (0x10 - 0xff) */
50 
51 #define SL11_EPCTRL_ARM		(0x01)
52 #define SL11_EPCTRL_ENABLE	(0x02)
53 #define SL11_EPCTRL_ARM_ENABLE	(SL11_EPCTRL_ARM|SL11_EPCTRL_ENABLE)
54 #define SL11_EPCTRL_DIRECTION	(0x04)
55 #define SL11_EPCTRL_ISO		(0x10)
56 #define SL11_EPCTRL_SOF		(0x20)
57 #define SL11_EPCTRL_DATATOGGLE	(0x40)
58 #define SL11_EPCTRL_PREAMBLE	(0x80)
59 
60 #define SL11_PID_BITS	(0xf0)
61 #define SL11_EP_BITS	(0x0f)
62 
63 #define SL11_PID_OUT    (0x10)
64 #define SL11_PID_IN     (0x90)
65 #define SL11_PID_SOF    (0x50)
66 #define SL11_PID_SETUP  (0xd0)
67 
68 #define SLHCI_PID_SWAP_IN_OUT	(0x80) /* xor to swap IN and OUT */
69 
70 #define SL11_EPSTAT_ACK		(0x01)
71 #define SL11_EPSTAT_ERROR	(0x02)
72 #define SL11_EPSTAT_TIMEOUT	(0x04)
73 #define SL11_EPSTAT_SEQUENCE	(0x08)
74 #define SL11_EPSTAT_SETUP	(0x10)
75 #define SL11_EPSTAT_OVERFLOW	(0x20)
76 #define SL11_EPSTAT_NAK		(0x40)
77 #define SL11_EPSTAT_STALL	(0x80)
78 #define SL11_EPSTAT_STATBITS	(0xf7)
79 #define SL11_EPSTAT_ERRBITS	(0xf6)
80 
81 #define SL11_CTRL_ENABLESOF	(0x01)
82 /* #define SL11_CTRL_EOF2		(0x04) XXX ? Reserved in 1.5 */
83 #define SL11_CTRL_RESETENGINE	(0x08)
84 #define SL11_CTRL_JKSTATE	(0x10)
85 #define SL11_CTRL_LOWSPEED	(0x20)
86 #define SL11_CTRL_SUSPEND	(0x40)
87 
88 #define SL11_IER_USBA		(0x01)	/* USB-A done */
89 #define SL11_IER_USBB		(0x02)	/* USB-B done */
90 #define SL11_IER_BABBLE		(0x04)	/* Babble detection */
91 #define SL11_IER_SOF		(0x10)	/* 1ms Start Of Frame timer */
92 #define SL11_IER_INSERT		(0x20)	/* Slave Insert/Remove detection */
93 #define SL11_IER_DEVDET		(0x40)	/* USB Device Detect */
94 #define SL11_IER_RESUME		(0x40)	/* USB Resume */
95 #define SLHCI_NORMAL_INTERRUPTS (0x33)	/* A, B, SOFTIMER, INSERT */
96 
97 #define SL11_ISR_USBA		(0x01)	/* USB-A done */
98 #define SL11_ISR_USBB		(0x02)	/* USB-B done */
99 #define SL11_ISR_BABBLE		(0x04)	/* Babble detection or reserved */
100 #define SL11_ISR_RES		(0x08)	/* Reserved */
101 #define SL11_ISR_SOF		(0x10)	/* 1ms Start Of Frame timer */
102 #define SL11_ISR_INSERT		(0x20)	/* Slave Insert/Remove detection */
103 #define SL11_ISR_NODEV		(0x40)	/* USB Device Not Present */
104 #define SL11_ISR_RESUME		(0x40)	/* USB Resume */
105 #define SL11_ISR_DATA		(0x80)	/* Value of the Data+ pin */
106 
107 #define SL11_REV_USBA		(0x01)	/* USB-A */
108 #define SL11_REV_USBB		(0x02)	/* USB-B */
109 #define SL11_REV_REVMASK	(0xf0)	/* HW Revision */
110 
111 #define SL11_GET_REV(x)		((x) >> 4)
112 #define SLTYPE_SL11H		(0x00)	/* SL11H not supported */
113 #define SLTYPE_SL811HS		(0x01)
114 #define SLTYPE_SL811HS_R12	SLTYPE_SL811HS
115 #define SLTYPE_SL811HS_R14	(0x02)
116 #define SLTYPE_SL811HS_R15	SLTYPE_SL811HS_R14
117 
118 #define SLHCI_USBAB		(0x03)	/* USB A/B bits in IER/ISR/flags */
119 
120 #define SL811_CSOF_SOFMASK	(0x3f)	/* SOF High Counter */
121 #define SL811_CSOF_POLARITY	(0x40)	/* Change polarity */
122 #define SL811_CSOF_MASTER	(0x80)	/* Master/Slave selection */
123 
124 #define SL11_BUFFER_START	(0x10)	/* Start of buffer memory */
125 #define SL11_BUFFER_END		(0xff)	/* End of buffer memory */
126 
127 #define SL11_MAX_PACKET_SIZE	240
128 
129