xref: /netbsd/sys/dev/ic/smc93cx6.c (revision bf9ec67e)
1 /*	$NetBSD: smc93cx6.c,v 1.9 2001/11/13 13:14:45 lukem Exp $	*/
2 
3 /*
4  * Interface for the 93C66/56/46/26/06 serial eeprom parts.
5  *
6  * Copyright (c) 1995, 1996 Daniel M. Eischen
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice immediately at the beginning of the file, without modification,
14  *    this list of conditions, and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. Absolutely no warranty of function or purpose is made by the author
19  *    Daniel M. Eischen.
20  * 4. Modifications may be freely made to this file if the above conditions
21  *    are met.
22  *
23  * $FreeBSD: src/sys/dev/aic7xxx/93cx6.c,v 1.5 2000/01/07 23:08:17 gibbs Exp $
24  */
25 
26 /*
27  *   The instruction set of the 93C66/56/46/26/06 chips are as follows:
28  *
29  *               Start  OP	    *
30  *     Function   Bit  Code  Address**  Data     Description
31  *     -------------------------------------------------------------------
32  *     READ        1    10   A5 - A0             Reads data stored in memory,
33  *                                               starting at specified address
34  *     EWEN        1    00   11XXXX              Write enable must precede
35  *                                               all programming modes
36  *     ERASE       1    11   A5 - A0             Erase register A5A4A3A2A1A0
37  *     WRITE       1    01   A5 - A0   D15 - D0  Writes register
38  *     ERAL        1    00   10XXXX              Erase all registers
39  *     WRAL        1    00   01XXXX    D15 - D0  Writes to all registers
40  *     EWDS        1    00   00XXXX              Disables all programming
41  *                                               instructions
42  *     *Note: A value of X for address is a don't care condition.
43  *    **Note: There are 8 address bits for the 93C56/66 chips unlike
44  *	      the 93C46/26/06 chips which have 6 address bits.
45  *
46  *   The 93C46 has a four wire interface: clock, chip select, data in, and
47  *   data out.  In order to perform one of the above functions, you need
48  *   to enable the chip select for a clock period (typically a minimum of
49  *   1 usec, with the clock high and low a minimum of 750 and 250 nsec
50  *   respectively).  While the chip select remains high, you can clock in
51  *   the instructions (above) starting with the start bit, followed by the
52  *   OP code, Address, and Data (if needed).  For the READ instruction, the
53  *   requested 16-bit register contents is read from the data out line but
54  *   is preceded by an initial zero (leading 0, followed by 16-bits, MSB
55  *   first).  The clock cycling from low to high initiates the next data
56  *   bit to be sent from the chip.
57  *
58  */
59 
60 #include <sys/cdefs.h>
61 __KERNEL_RCSID(0, "$NetBSD: smc93cx6.c,v 1.9 2001/11/13 13:14:45 lukem Exp $");
62 
63 #ifndef __NetBSD__
64 #include "opt_aic7xxx.h"
65 #endif
66 
67 #include <sys/param.h>
68 #include <sys/systm.h>
69 #ifdef __NetBSD__
70 #include <machine/bus.h>
71 #include <dev/ic/smc93cx6var.h>
72 #else
73 #include <machine/bus_memio.h>
74 #include <machine/bus_pio.h>
75 #include <machine/bus.h>
76 #include <dev/aic7xxx/93cx6.h>
77 #endif
78 
79 /*
80  * Right now, we only have to read the SEEPROM.  But we make it easier to
81  * add other 93Cx6 functions.
82  */
83 static struct seeprom_cmd {
84   	unsigned char len;
85  	unsigned char bits[3];
86 } seeprom_read = {3, {1, 1, 0}};
87 
88 /*
89  * Wait for the SEERDY to go high; about 800 ns.
90  */
91 #define CLOCK_PULSE(sd, rdy)	{					\
92 	int cpi = 1000;							\
93 	while ((SEEPROM_STATUS_INB(sd) & rdy) == 0 && cpi-- > 0) {	\
94 		;  /* Do nothing */					\
95 	}								\
96 	(void)SEEPROM_INB(sd);	/* Clear clock */			\
97 }
98 
99 /*
100  * Read the serial EEPROM and returns 1 if successful and 0 if
101  * not successful.
102  */
103 int
104 read_seeprom(sd, buf, start_addr, count)
105 	struct seeprom_descriptor *sd;
106 	u_int16_t *buf;
107 	bus_size_t start_addr;
108 	bus_size_t count;
109 {
110 	int i = 0;
111 	u_int k = 0;
112 	u_int16_t v;
113 	u_int8_t temp;
114 
115 	/*
116 	 * Read the requested registers of the seeprom.  The loop
117 	 * will range from 0 to count-1.
118 	 */
119 	for (k = start_addr; k < count + start_addr; k++) {
120 		/* Send chip select for one clock cycle. */
121 		temp = sd->sd_MS ^ sd->sd_CS;
122 		SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
123 		CLOCK_PULSE(sd, sd->sd_RDY);
124 
125 		/*
126 		 * Now we're ready to send the read command followed by the
127 		 * address of the 16-bit register we want to read.
128 		 */
129 		for (i = 0; i < seeprom_read.len; i++) {
130 			if (seeprom_read.bits[i] != 0)
131 				temp ^= sd->sd_DO;
132 			SEEPROM_OUTB(sd, temp);
133 			CLOCK_PULSE(sd, sd->sd_RDY);
134 			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
135 			CLOCK_PULSE(sd, sd->sd_RDY);
136 			if (seeprom_read.bits[i] != 0)
137 				temp ^= sd->sd_DO;
138 		}
139 		/* Send the 6 or 8 bit address (MSB first, LSB last). */
140 		for (i = (sd->sd_chip - 1); i >= 0; i--) {
141 			if ((k & (1 << i)) != 0)
142 				temp ^= sd->sd_DO;
143 			SEEPROM_OUTB(sd, temp);
144 			CLOCK_PULSE(sd, sd->sd_RDY);
145 			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
146 			CLOCK_PULSE(sd, sd->sd_RDY);
147 			if ((k & (1 << i)) != 0)
148 				temp ^= sd->sd_DO;
149 		}
150 
151 		/*
152 		 * Now read the 16 bit register.  An initial 0 precedes the
153 		 * register contents which begins with bit 15 (MSB) and ends
154 		 * with bit 0 (LSB).  The initial 0 will be shifted off the
155 		 * top of our word as we let the loop run from 0 to 16.
156 		 */
157 		v = 0;
158 		for (i = 16; i >= 0; i--) {
159 			SEEPROM_OUTB(sd, temp);
160 			CLOCK_PULSE(sd, sd->sd_RDY);
161 			v <<= 1;
162 			if (SEEPROM_DATA_INB(sd) & sd->sd_DI)
163 				v |= 1;
164 			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
165 			CLOCK_PULSE(sd, sd->sd_RDY);
166 		}
167 
168 		buf[k - start_addr] = v;
169 
170 		/* Reset the chip select for the next command cycle. */
171 		temp = sd->sd_MS;
172 		SEEPROM_OUTB(sd, temp);
173 		CLOCK_PULSE(sd, sd->sd_RDY);
174 		SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
175 		CLOCK_PULSE(sd, sd->sd_RDY);
176 		SEEPROM_OUTB(sd, temp);
177 		CLOCK_PULSE(sd, sd->sd_RDY);
178 	}
179 #ifdef AHC_DUMP_EEPROM
180 	printf("\nSerial EEPROM:\n\t");
181 	for (k = 0; k < count; k = k + 1) {
182 		if (((k % 8) == 0) && (k != 0)) {
183 			printf ("\n\t");
184 		}
185 		printf (" 0x%x", buf[k]);
186 	}
187 	printf ("\n");
188 #endif
189 	return (1);
190 }
191