1 /* $NetBSD: adv_isa.c,v 1.5 2002/01/07 21:47:03 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved. 5 * 6 * Author: Baldassare Dante Profeta <dante@mclink.it> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the NetBSD 19 * Foundation, Inc. and its contributors. 20 * 4. Neither the name of The NetBSD Foundation nor the names of its 21 * contributors may be used to endorse or promote products derived 22 * from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 /* 37 * Device probe and attach routines for the following 38 * Advanced Systems Inc. SCSI controllers: 39 * 40 * Connectivity Products: 41 * ABP510/5150 - Bus-Master ISA (240 CDB) (Footnote 1) 42 * ABP5140 - Bus-Master ISA (16 CDB) (Footnote 1) (Footnote 2) 43 * ABP5142 - Bus-Master ISA with floppy (16 CDB) (Footnote 3) 44 * 45 * Single Channel Products: 46 * ABP542 - Bus-Master ISA with floppy (240 CDB) 47 * ABP842 - Bus-Master VL (240 CDB) 48 * 49 * Dual Channel Products: 50 * ABP852 - Dual Channel Bus-Master VL (240 CDB Per Channel) 51 * 52 * Footnotes: 53 * 1. This board has been shipped by HP with the 4020i CD-R drive. 54 * The board has no BIOS so it cannot control a boot device, but 55 * it can control any secondary SCSI device. 56 * 2. This board has been sold by SIIG as the i540 SpeedMaster. 57 * 3. This board has been sold by SIIG as the i542 SpeedMaster. 58 */ 59 60 #include <sys/cdefs.h> 61 __KERNEL_RCSID(0, "$NetBSD: adv_isa.c,v 1.5 2002/01/07 21:47:03 thorpej Exp $"); 62 63 #include <sys/param.h> 64 #include <sys/systm.h> 65 #include <sys/kernel.h> 66 #include <sys/errno.h> 67 #include <sys/ioctl.h> 68 #include <sys/device.h> 69 #include <sys/buf.h> 70 #include <sys/proc.h> 71 #include <sys/user.h> 72 #include <sys/queue.h> 73 74 #include <machine/bus.h> 75 76 #include <dev/scsipi/scsi_all.h> 77 #include <dev/scsipi/scsipi_all.h> 78 #include <dev/scsipi/scsiconf.h> 79 80 #include <dev/isa/isavar.h> 81 82 #include <dev/ic/advlib.h> 83 #include <dev/ic/adv.h> 84 85 86 /* Possible port addresses an ISA or VL adapter can live at */ 87 static int asc_ioport[ASC_IOADR_TABLE_MAX_IX] = 88 { 89 0x100, 90 ASC_IOADR_1, /* First selection in BIOS setup */ 91 0x120, 92 ASC_IOADR_2, /* Second selection in BIOS setup */ 93 0x140, 94 ASC_IOADR_3, /* Third selection in BIOS setup */ 95 ASC_IOADR_4, /* Fourth selection in BIOS setup */ 96 ASC_IOADR_5, /* Fifth selection in BIOS setup */ 97 ASC_IOADR_6, /* Sixth selection in BIOS setup */ 98 ASC_IOADR_7, /* Seventh selection in BIOS setup */ 99 ASC_IOADR_8 /* Eighth and default selection in BIOS setup */ 100 }; 101 102 /******************************************************************************/ 103 104 int adv_isa_probe __P((struct device *, struct cfdata *, void *)); 105 void adv_isa_attach __P((struct device *, struct device *, void *)); 106 107 struct cfattach adv_isa_ca = 108 { 109 sizeof(ASC_SOFTC), adv_isa_probe, adv_isa_attach 110 }; 111 112 /******************************************************************************/ 113 114 int 115 adv_isa_probe(parent, match, aux) 116 struct device *parent; 117 struct cfdata *match; 118 void *aux; 119 { 120 struct isa_attach_args *ia = aux; 121 bus_space_tag_t iot = ia->ia_iot; 122 bus_space_handle_t ioh; 123 int port_index; 124 int iobase, irq, drq; 125 int rv = 0; 126 127 if (ia->ia_nio < 1) 128 return (0); 129 if (ia->ia_nirq < 1) 130 return (0); 131 if (ia->ia_ndrq < 1) 132 return (0); 133 134 if (ISA_DIRECT_CONFIG(ia)) 135 return (0); 136 137 /* 138 * If the I/O address is wildcarded, look for boards 139 * in ascending order. 140 */ 141 if (ia->ia_io[0].ir_addr == ISACF_PORT_DEFAULT) { 142 for (port_index = 0; port_index < ASC_IOADR_TABLE_MAX_IX; 143 port_index++) { 144 iobase = asc_ioport[port_index]; 145 146 if (iobase) { 147 if (bus_space_map(iot, iobase, ASC_IOADR_GAP, 148 0, &ioh)) 149 continue; 150 151 rv = AscFindSignature(iot, ioh); 152 153 if (rv) { 154 ia->ia_io[0].ir_addr = iobase; 155 break; 156 } 157 158 bus_space_unmap(iot, ioh, ASC_IOADR_GAP); 159 } 160 } 161 if (rv == 0) 162 return (0); 163 } else { 164 iobase = ia->ia_io[0].ir_addr; 165 if (bus_space_map(iot, iobase, ASC_IOADR_GAP, 0, &ioh)) 166 return (0); 167 168 rv = AscFindSignature(iot, ioh); 169 170 if (rv == 0) { 171 bus_space_unmap(iot, ioh, ASC_IOADR_GAP); 172 return (0); 173 } 174 } 175 176 /* XXXJRT Probe routines should not have side-effects!! */ 177 ASC_SET_CHIP_CONTROL(iot, ioh, ASC_CC_HALT); 178 ASC_SET_CHIP_STATUS(iot, ioh, 0); 179 180 irq = AscGetChipIRQ(iot, ioh, ASC_IS_ISA); 181 drq = AscGetIsaDmaChannel(iot, ioh); 182 183 /* Verify that the IRQ/DRQ match (or are wildcarded). */ 184 if (ia->ia_irq[0].ir_irq != ISACF_IRQ_DEFAULT && 185 ia->ia_irq[0].ir_irq != irq) { 186 rv = 0; 187 goto out; 188 } 189 if (ia->ia_drq[0].ir_drq != ISACF_DRQ_DEFAULT && 190 ia->ia_drq[0].ir_drq != drq) { 191 rv = 0; 192 goto out; 193 } 194 195 ia->ia_nio = 1; 196 ia->ia_io[0].ir_addr = iobase; 197 ia->ia_io[0].ir_size = ASC_IOADR_GAP; 198 199 ia->ia_nirq = 1; 200 ia->ia_irq[0].ir_irq = irq; 201 202 ia->ia_ndrq = 1; 203 ia->ia_drq[0].ir_drq = drq; 204 205 ia->ia_niomem = 0; 206 207 out: 208 bus_space_unmap(iot, ioh, ASC_IOADR_GAP); 209 return rv; 210 } 211 212 213 void 214 adv_isa_attach(parent, self, aux) 215 struct device *parent, *self; 216 void *aux; 217 { 218 struct isa_attach_args *ia = aux; 219 ASC_SOFTC *sc = (void *) self; 220 bus_space_tag_t iot = ia->ia_iot; 221 bus_space_handle_t ioh; 222 isa_chipset_tag_t ic = ia->ia_ic; 223 int error; 224 225 printf("\n"); 226 227 sc->sc_flags = 0x0; 228 229 if (bus_space_map(iot, ia->ia_io[0].ir_addr, ASC_IOADR_GAP, 0, &ioh)) { 230 printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname); 231 return; 232 } 233 234 sc->sc_iot = iot; 235 sc->sc_ioh = ioh; 236 sc->sc_dmat = ia->ia_dmat; 237 sc->bus_type = ASC_IS_ISA; 238 sc->chip_version = ASC_GET_CHIP_VER_NO(iot, ioh); 239 /* 240 * Memo: 241 * for EISA cards: 242 * sc->chip_version = (ASC_CHIP_MIN_VER_EISA - 1) + ea->ea_pid[1]; 243 */ 244 245 /* 246 * Initialize the board 247 */ 248 if (adv_init(sc)) { 249 printf("%s: adv_init failed\n", sc->sc_dev.dv_xname); 250 return; 251 } 252 253 if ((error = isa_dmacascade(ic, ia->ia_drq[0].ir_drq)) != 0) { 254 printf("%s: unable to cascade DRQ, error = %d\n", 255 sc->sc_dev.dv_xname, error); 256 return; 257 } 258 259 sc->sc_ih = isa_intr_establish(ic, ia->ia_irq[0].ir_irq, IST_EDGE, 260 IPL_BIO, adv_intr, sc); 261 if (sc->sc_ih == NULL) { 262 printf("%s: couldn't establish interrupt\n", 263 sc->sc_dev.dv_xname); 264 return; 265 } 266 267 adv_attach(sc); 268 } 269