1 /* $NetBSD: cs89x0isa.c,v 1.15 2009/09/22 15:34:22 tsutsui Exp $ */ 2 3 /* 4 * Copyright 1997 5 * Digital Equipment Corporation. All rights reserved. 6 * 7 * This software is furnished under license and may be used and 8 * copied only in accordance with the following terms and conditions. 9 * Subject to these conditions, you may download, copy, install, 10 * use, modify and distribute this software in source and/or binary 11 * form. No title or ownership is transferred hereby. 12 * 13 * 1) Any source code used, modified or distributed must reproduce 14 * and retain this copyright notice and list of conditions as 15 * they appear in the source file. 16 * 17 * 2) No right is granted to use any trade name, trademark, or logo of 18 * Digital Equipment Corporation. Neither the "Digital Equipment 19 * Corporation" name nor any trademark or logo of Digital Equipment 20 * Corporation may be used to endorse or promote products derived 21 * from this software without the prior written permission of 22 * Digital Equipment Corporation. 23 * 24 * 3) This software is provided "AS-IS" and any express or implied 25 * warranties, including but not limited to, any implied warranties 26 * of merchantability, fitness for a particular purpose, or 27 * non-infringement are disclaimed. In no event shall DIGITAL be 28 * liable for any damages whatsoever, and in particular, DIGITAL 29 * shall not be liable for special, indirect, consequential, or 30 * incidental damages or damages for lost profits, loss of 31 * revenue or loss of use, whether such damages arise in contract, 32 * negligence, tort, under statute, in equity, at law or otherwise, 33 * even if advised of the possibility of such damage. 34 */ 35 36 /* isa DMA routines for cs89x0 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: cs89x0isa.c,v 1.15 2009/09/22 15:34:22 tsutsui Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/socket.h> 45 #include <sys/device.h> 46 47 #include "rnd.h" 48 #if NRND > 0 49 #include <sys/rnd.h> 50 #endif 51 52 #include <net/if.h> 53 #include <net/if_ether.h> 54 #include <net/if_media.h> 55 56 #include <sys/bus.h> 57 58 #include <dev/isa/isareg.h> 59 #include <dev/isa/isavar.h> 60 #include <dev/isa/isadmavar.h> 61 62 #include <dev/ic/cs89x0reg.h> 63 #include <dev/ic/cs89x0var.h> 64 #include <dev/isa/cs89x0isavar.h> 65 66 #define DMA_STATUS_BITS 0x0007 /* bit masks for checking DMA status */ 67 #define DMA_STATUS_OK 0x0004 68 69 void 70 cs_isa_dma_attach(struct cs_softc *sc) 71 { 72 struct cs_softc_isa *isc = (struct cs_softc_isa *)sc; 73 74 if (isc->sc_drq == ISA_UNKNOWN_DRQ) 75 printf("%s: DMA channel unspecified, not using DMA\n", 76 device_xname(sc->sc_dev)); 77 else if (isc->sc_drq < 5 || isc->sc_drq > 7) 78 printf("%s: invalid DMA channel, not using DMA\n", 79 device_xname(sc->sc_dev)); 80 else { 81 bus_size_t maxsize; 82 bus_addr_t dma_addr; 83 84 maxsize = isa_dmamaxsize(isc->sc_ic, isc->sc_drq); 85 if (maxsize < CS8900_DMASIZE) { 86 printf("%s: max DMA size %lu is" 87 " less than required %d\n", 88 device_xname(sc->sc_dev), (u_long)maxsize, 89 CS8900_DMASIZE); 90 goto after_dma_block; 91 } 92 93 if (isa_drq_alloc(isc->sc_ic, isc->sc_drq) != 0) { 94 aprint_error_dev(sc->sc_dev, 95 "unable to reserve drq %d\n", 96 isc->sc_drq); 97 goto after_dma_block; 98 } 99 100 if (isa_dmamap_create(isc->sc_ic, isc->sc_drq, 101 CS8900_DMASIZE, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW) != 0) { 102 aprint_error_dev(sc->sc_dev, 103 "unable to create ISA DMA map\n"); 104 goto after_dma_block; 105 } 106 if (isa_dmamem_alloc(isc->sc_ic, isc->sc_drq, 107 CS8900_DMASIZE, &dma_addr, BUS_DMA_NOWAIT) != 0) { 108 aprint_error_dev(sc->sc_dev, 109 "unable to allocate DMA buffer\n"); 110 goto after_dma_block; 111 } 112 if (isa_dmamem_map(isc->sc_ic, isc->sc_drq, dma_addr, 113 CS8900_DMASIZE, (void **)&isc->sc_dmabase, 114 BUS_DMA_NOWAIT | BUS_DMA_COHERENT /* XXX */ ) != 0) { 115 aprint_error_dev(sc->sc_dev, 116 "unable to map DMA buffer\n"); 117 isa_dmamem_free(isc->sc_ic, isc->sc_drq, dma_addr, 118 CS8900_DMASIZE); 119 goto after_dma_block; 120 } 121 122 isc->sc_dmasize = CS8900_DMASIZE; 123 sc->sc_cfgflags |= CFGFLG_DMA_MODE; 124 isc->sc_dmaaddr = dma_addr; 125 after_dma_block: 126 ; 127 } 128 } 129 130 void cs_isa_dma_chipinit(struct cs_softc *sc) 131 { 132 struct cs_softc_isa *isc = (struct cs_softc_isa *)sc; 133 134 if (sc->sc_cfgflags & CFGFLG_DMA_MODE) { 135 /* 136 * First we program the DMA controller and ensure the memory 137 * buffer is valid. If it isn't then we just go on without 138 * DMA. 139 */ 140 if (isa_dmastart(isc->sc_ic, isc->sc_drq, isc->sc_dmabase, 141 isc->sc_dmasize, NULL, DMAMODE_READ | DMAMODE_LOOPDEMAND, 142 BUS_DMA_NOWAIT)) { 143 /* XXX XXX XXX */ 144 panic("%s: unable to start DMA", 145 device_xname(sc->sc_dev)); 146 } 147 isc->sc_dmacur = isc->sc_dmabase; 148 149 /* interrupt when a DMA'd frame is received */ 150 CS_WRITE_PACKET_PAGE(sc, PKTPG_RX_CFG, 151 RX_CFG_ALL_IE | RX_CFG_RX_DMA_ONLY); 152 153 /* 154 * set the DMA burst bit so we don't tie up the bus for too 155 * long. 156 */ 157 if (isc->sc_dmasize == 16384) { 158 CS_WRITE_PACKET_PAGE(sc, PKTPG_BUS_CTL, 159 ((CS_READ_PACKET_PAGE(sc, PKTPG_BUS_CTL) & 160 ~BUS_CTL_DMA_SIZE) | BUS_CTL_DMA_BURST)); 161 } else { /* use 64K */ 162 CS_WRITE_PACKET_PAGE(sc, PKTPG_BUS_CTL, 163 CS_READ_PACKET_PAGE(sc, PKTPG_BUS_CTL) | 164 BUS_CTL_DMA_SIZE | BUS_CTL_DMA_BURST); 165 } 166 167 CS_WRITE_PACKET_PAGE(sc, PKTPG_DMA_CHANNEL, isc->sc_drq - 5); 168 } 169 } 170 171 void cs_process_rx_dma(struct cs_softc *sc) 172 { 173 struct cs_softc_isa *isc = (struct cs_softc_isa *)sc; 174 struct ifnet *ifp; 175 u_int16_t num_dma_frames; 176 u_int16_t pkt_length; 177 u_int16_t status; 178 u_int to_copy; 179 char *dma_mem_ptr; 180 struct mbuf *m; 181 u_char *pBuff; 182 int pad; 183 184 /* initialise the pointers */ 185 ifp = &sc->sc_ethercom.ec_if; 186 187 /* Read the number of frames DMAed. */ 188 num_dma_frames = CS_READ_PACKET_PAGE(sc, PKTPG_DMA_FRAME_COUNT); 189 num_dma_frames &= (u_int16_t) (0x0fff); 190 191 /* 192 * Loop till number of DMA frames ready to read is zero. After 193 * reading the frame out of memory we must check if any have been 194 * received while we were processing 195 */ 196 while (num_dma_frames != 0) { 197 dma_mem_ptr = isc->sc_dmacur; 198 199 /* 200 * process all of the DMA frames in memory 201 * 202 * This loop relies on the dma_mem_ptr variable being set to the 203 * next frames start address. 204 */ 205 for (; num_dma_frames > 0; num_dma_frames--) { 206 207 /* 208 * Get the length and status of the packet. Only the 209 * status is guaranteed to be at dma_mem_ptr, ie need 210 * to check for wraparound before reading the length 211 */ 212 status = *((u_int16_t *) dma_mem_ptr); 213 dma_mem_ptr += 2; 214 if (dma_mem_ptr > (isc->sc_dmabase + isc->sc_dmasize)) { 215 dma_mem_ptr = isc->sc_dmabase; 216 } 217 pkt_length = *((u_int16_t *) dma_mem_ptr); 218 dma_mem_ptr += 2; 219 220 /* Do some sanity checks on the length and status. */ 221 if ((pkt_length > ETHER_MAX_LEN) || 222 ((status & DMA_STATUS_BITS) != DMA_STATUS_OK)) { 223 /* 224 * the SCO driver kills the adapter in this 225 * situation 226 */ 227 /* 228 * should increment the error count and reset 229 * the DMA operation. 230 */ 231 printf("%s: cs_process_rx_dma: " 232 "DMA buffer out of sync about to reset\n", 233 device_xname(sc->sc_dev)); 234 ifp->if_ierrors++; 235 236 /* skip the rest of the DMA buffer */ 237 isa_dmaabort(isc->sc_ic, isc->sc_drq); 238 239 /* now reset the chip and reinitialise */ 240 cs_init(&sc->sc_ethercom.ec_if); 241 return; 242 } 243 /* Check the status of the received packet. */ 244 if (status & RX_EVENT_RX_OK) { 245 /* get a new mbuf */ 246 MGETHDR(m, M_DONTWAIT, MT_DATA); 247 if (m == 0) { 248 printf("%s: cs_process_rx_dma: " 249 "unable to allocate mbuf\n", 250 device_xname(sc->sc_dev)); 251 ifp->if_ierrors++; 252 /* 253 * couldn't allocate an mbuf so 254 * things are not good, may as well 255 * drop all the packets I think. 256 */ 257 CS_READ_PACKET_PAGE(sc, 258 PKTPG_DMA_FRAME_COUNT); 259 260 /* now reset DMA operation */ 261 isa_dmaabort(isc->sc_ic, isc->sc_drq); 262 263 /* 264 * now reset the chip and 265 * reinitialise 266 */ 267 cs_init(&sc->sc_ethercom.ec_if); 268 return; 269 } 270 /* 271 * save processing by always using a mbuf 272 * cluster, guaranteed to fit packet 273 */ 274 MCLGET(m, M_DONTWAIT); 275 if ((m->m_flags & M_EXT) == 0) { 276 /* couldn't allocate an mbuf cluster */ 277 printf("%s: cs_process_rx_dma: " 278 "unable to allocate a cluster\n", 279 device_xname(sc->sc_dev)); 280 m_freem(m); 281 282 /* skip the frame */ 283 CS_READ_PACKET_PAGE(sc, PKTPG_DMA_FRAME_COUNT); 284 isa_dmaabort(isc->sc_ic, isc->sc_drq); 285 286 /* 287 * now reset the chip and 288 * reinitialise 289 */ 290 cs_init(&sc->sc_ethercom.ec_if); 291 return; 292 } 293 m->m_pkthdr.rcvif = ifp; 294 m->m_pkthdr.len = pkt_length; 295 m->m_len = pkt_length; 296 297 /* 298 * align ip header on word boundary for 299 * ipintr 300 */ 301 pad = ALIGN(sizeof(struct ether_header)) - 302 sizeof(struct ether_header); 303 m->m_data += pad; 304 305 /* 306 * set up the buffer pointer to point to the 307 * data area 308 */ 309 pBuff = mtod(m, char *); 310 311 /* 312 * Read the frame into free_pktbuf 313 * The buffer is circular buffer, either 314 * 16K or 64K in length. 315 * 316 * need to check where the end of the buffer 317 * is and go back to the start. 318 */ 319 if ((dma_mem_ptr + pkt_length) < 320 (isc->sc_dmabase + isc->sc_dmasize)) { 321 /* 322 * No wrap around. Copy the frame 323 * header 324 */ 325 memcpy(pBuff, dma_mem_ptr, pkt_length); 326 dma_mem_ptr += pkt_length; 327 } else { 328 to_copy = (u_int) 329 ((isc->sc_dmabase + isc->sc_dmasize) - 330 dma_mem_ptr); 331 332 /* Copy the first half of the frame. */ 333 memcpy(pBuff, dma_mem_ptr, to_copy); 334 pBuff += to_copy; 335 336 /* 337 * Rest of the frame is to be read 338 * from the first byte of the DMA 339 * memory. 340 */ 341 /* 342 * Get the number of bytes leftout in 343 * the frame. 344 */ 345 to_copy = pkt_length - to_copy; 346 347 dma_mem_ptr = isc->sc_dmabase; 348 349 /* Copy rest of the frame. */ 350 memcpy(pBuff, dma_mem_ptr, to_copy); 351 dma_mem_ptr += to_copy; 352 } 353 354 cs_ether_input(sc, m); 355 } 356 /* (status & RX_OK) */ 357 else { 358 /* the frame was not received OK */ 359 /* Increment the input error count */ 360 ifp->if_ierrors++; 361 362 /* 363 * If debugging is enabled then log error 364 * messages if we got any. 365 */ 366 if ((ifp->if_flags & IFF_DEBUG) && 367 status != REG_NUM_RX_EVENT) 368 cs_print_rx_errors(sc, status); 369 } 370 /* 371 * now update the current frame pointer. the 372 * dma_mem_ptr should point to the next packet to be 373 * received, without the alignment considerations. 374 * 375 * The cs8900 pads all frames to start at the next 32bit 376 * aligned addres. hence we need to pad our offset 377 * pointer. 378 */ 379 dma_mem_ptr += 3; 380 dma_mem_ptr = (char *) 381 ((long) dma_mem_ptr & 0xfffffffc); 382 if (dma_mem_ptr < (isc->sc_dmabase + isc->sc_dmasize)) { 383 isc->sc_dmacur = dma_mem_ptr; 384 } else { 385 dma_mem_ptr = isc->sc_dmacur = isc->sc_dmabase; 386 } 387 } /* for all frames */ 388 /* Read the number of frames DMAed again. */ 389 num_dma_frames = CS_READ_PACKET_PAGE(sc, PKTPG_DMA_FRAME_COUNT); 390 num_dma_frames &= (u_int16_t) (0x0fff); 391 } /* while there are frames left */ 392 } 393